Offset tuning test

Removed_REF_marker
erikkaashoek 5 years ago
parent 65f269059b
commit d42454e054

@ -1008,9 +1008,11 @@ void setupSA(void)
#define OFFSET_LOWER_BOUND 0 #define OFFSET_LOWER_BOUND 0
#endif #endif
static uint32_t old_frequency_step;
void set_freq(int V, unsigned long freq) // translate the requested frequency into a setting of the SI4432 void set_freq(int V, unsigned long freq) // translate the requested frequency into a setting of the SI4432
{ {
if (old_freq[V] == freq) // Do not change HW if not needed if (old_freq[V] == freq && setting.frequency_step == old_frequency_step) // Do not change HW if not needed
return; return;
#ifdef __SI4432__ #ifdef __SI4432__
if (V <= 1) { if (V <= 1) {
@ -1076,10 +1078,26 @@ void set_freq(int V, unsigned long freq) // translate the requested frequency
} else } else
#endif #endif
if (V==ADF4351_LO){ if (V==ADF4351_LO){
ADF4351_set_frequency(V-2,freq,3); if (setting.step_delay_mode == SD_FAST) { // If in fast scanning mode and NOT SI4432_RX !!!!!!
int delta = - (freq - real_old_freq[V]); // delta grows with increasing freq
if (setting.frequency_step < 100000 && 0 < delta && delta < 100000) {
SI4463_start_rx(delta / setting.frequency_step); // with increasing delta, set smaller offset
freq = 0;
} else {
SI4463_start_rx(0 / setting.frequency_step); // Start at maximum positive offset
}
}
if (freq) {
ADF4351_set_frequency(V-2,freq,3);
real_old_freq[V] = freq;
}
} }
if (V==SI4463_RX) { if (V==SI4463_RX) {
SI4463_set_freq(freq,1000); if (setting.frequency_step<930000) // maximum step size is 937.49kHz
SI4463_set_freq(freq,setting.frequency_step);
else
SI4463_set_freq(freq,1000);
old_frequency_step = setting.frequency_step;
} }
#ifdef __ULTRA_SA__ #ifdef __ULTRA_SA__
else { else {

@ -1213,6 +1213,8 @@ void ADF4351_prep_frequency(int channel, unsigned long freq, int drive) // freq
// ------------------------------ SI4463 ------------------------------------- // ------------------------------ SI4463 -------------------------------------
#define Npresc 0 // No High performance mode
#include <string.h> #include <string.h>
void SI4463_write_byte(uint8_t ADR, uint8_t DATA) void SI4463_write_byte(uint8_t ADR, uint8_t DATA)
@ -1394,6 +1396,8 @@ void SI4463_start_rx(uint8_t CHANNEL)
}; };
//retry: //retry:
SI4463_do_api(data, sizeof(data), NULL, 0); SI4463_do_api(data, sizeof(data), NULL, 0);
my_microsecond_delay(SI4432_offset_delay);
#if 0 #if 0
// my_microsecond_delay(15000); // my_microsecond_delay(15000);
// si446x_state_t s = getState(); // si446x_state_t s = getState();
@ -1714,6 +1718,8 @@ static RBW_t RBW_choices[] =
{SI4463_RBW_850kHz,0,8500}, {SI4463_RBW_850kHz,0,8500},
}; };
const int SI4432_RBW_count = ((int)(sizeof(RBW_choices)/sizeof(RBW_t)));
static pureRSSI_t SI4463_RSSI_correction = float_TO_PURE_RSSI(-120); static pureRSSI_t SI4463_RSSI_correction = float_TO_PURE_RSSI(-120);
uint16_t SI4463_force_RBW(int f) uint16_t SI4463_force_RBW(int f)
@ -1731,8 +1737,8 @@ uint16_t SI4463_force_RBW(int f)
} }
SI4463_start_rx(0); SI4463_start_rx(0);
my_microsecond_delay(1000); my_microsecond_delay(1000);
SI4463_RSSI_correction = float_TO_PURE_RSSI(RBW_choices[i].RSSI_correction_x_10 - 1200)/10; // Set RSSI correction SI4463_RSSI_correction = float_TO_PURE_RSSI(RBW_choices[f].RSSI_correction_x_10 - 1200)/10; // Set RSSI correction
return RBW_choices[i].RBWx10; // RBW achieved by SI4463 in kHz * 10 return RBW_choices[f].RBWx10; // RBW achieved by SI4463 in kHz * 10
} }
uint16_t SI4463_SET_RBW(uint16_t WISH) { uint16_t SI4463_SET_RBW(uint16_t WISH) {
@ -1765,9 +1771,9 @@ void SI4463_set_freq(uint32_t freq, uint32_t step_size)
Odiv = 13; Odiv = 13;
D = 12; D = 12;
} }
int32_t R = (RFout * D) / 26.0 - 1; int32_t R = (RFout * D) / ((Npresc+1)*26.0) - 1;
float MOD = 520251.0; float MOD = 520251.0;
int32_t F = (((RFout * D) / 26.0) - R) * MOD; int32_t F = (((RFout * D) / ((Npresc+1)*26.0)) - R) * MOD;
int S = (int)(step_size / 14.305); int S = (int)(step_size / 14.305);
if (S == 0) S = 1; if (S == 0) S = 1;
@ -1816,7 +1822,7 @@ void SI4463_set_freq(uint32_t freq, uint32_t step_size)
#define RF_MODEM_CLKGEN_BAND_1 0x11, 0x20, 0x01, 0x51, 0x0A #define RF_MODEM_CLKGEN_BAND_1 0x11, 0x20, 0x01, 0x51, 0x0A
uint8_t data2[] = { uint8_t data2[] = {
0x11, 0x20, 0x01, 0x51, 0x11, 0x20, 0x01, 0x51,
(uint8_t)Odiv (uint8_t)Odiv + (Npresc*0x08) // 0x08 for high performance mode
}; };
SI4463_do_api(data2, sizeof(data2), NULL, 0); SI4463_do_api(data2, sizeof(data2), NULL, 0);
SI4463_start_rx(0); SI4463_start_rx(0);

@ -179,6 +179,7 @@ int16_t Si446x_RSSI(void);
uint8_t getFRR(uint8_t reg); uint8_t getFRR(uint8_t reg);
si446x_state_t getState(void); si446x_state_t getState(void);
void setState(si446x_state_t newState); void setState(si446x_state_t newState);
extern const int SI4432_RBW_count;
extern si446x_info_t SI4463_info; extern si446x_info_t SI4463_info;
void Si446x_getInfo(si446x_info_t* info); void Si446x_getInfo(si446x_info_t* info);
void SI4463_init(void); void SI4463_init(void);

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