Sweep progress bar

pull/4/head
erikkaashoek 6 years ago
parent 5140ccde5a
commit 46616a6ce7

@ -1526,13 +1526,22 @@ again:
} }
// back to toplevel to handle ui operation // back to toplevel to handle ui operation
if ((operation_requested || shell_function) && break_on_operation) if ((operation_requested || shell_function) && break_on_operation) {
if (setting.actual_sweep_time > 1000) {
ili9341_fill(OFFSETX, HEIGHT_NOSCROLL+1, WIDTH, 1, 0);
}
return false; return false;
}
if (MODE_OUTPUT(setting.mode)) { if (MODE_OUTPUT(setting.mode)) {
continue; // Skip all other processing continue; // Skip all other processing
} }
if (MODE_INPUT(setting.mode)) { if (MODE_INPUT(setting.mode)) {
if (setting.actual_sweep_time > 1000 && (i & 0x07) == 0) {
ili9341_fill(OFFSETX, HEIGHT_NOSCROLL+1, i, 1, BRIGHT_COLOR_GREEN);
ili9341_fill(OFFSETX+i, HEIGHT_NOSCROLL+1, WIDTH-i, 1, 0);
}
if (setting.average != AV_OFF) if (setting.average != AV_OFF)
temp_t[i] = RSSI; temp_t[i] = RSSI;
@ -1809,6 +1818,10 @@ again:
// redraw_marker(peak_marker, FALSE); // redraw_marker(peak_marker, FALSE);
// STOP_PROFILE; // STOP_PROFILE;
if (setting.actual_sweep_time > 1000) {
ili9341_fill(OFFSETX, HEIGHT_NOSCROLL+1, WIDTH, 1, 0);
}
palSetPad(GPIOB, GPIOB_LED); palSetPad(GPIOB, GPIOB_LED);
return true; return true;
} }
@ -2705,14 +2718,14 @@ void self_test(int test)
shell_printf("Attenuation %ddB, measured level %.2fdBm, delta %.2fdB\n\r",j, peakLevel, peakLevel - reference_peak_level); shell_printf("Attenuation %ddB, measured level %.2fdBm, delta %.2fdB\n\r",j, peakLevel, peakLevel - reference_peak_level);
} }
reset_settings(M_LOW); reset_settings(M_LOW);
} else if (test == 3) { } else if (test == 3) { // RBW step time search
// RBW step time search
in_selftest = true; in_selftest = true;
reset_settings(M_LOW); reset_settings(M_HIGH);
setting.auto_IF = false; setting.auto_IF = false;
setting.frequency_IF=433900000; setting.frequency_IF=433900000;
ui_mode_normal(); ui_mode_normal();
int i = 15; // calibrate low mode power on 30 MHz; int i = 13; // calibrate low mode power on 30 MHz;
// int i = 15; // calibrate low mode power on 30 MHz;
test_prepare(i); test_prepare(i);
setting.step_delay = 8000; setting.step_delay = 8000;
for (int j= 0; j < 57; j++ ) { for (int j= 0; j < 57; j++ ) {
@ -2725,10 +2738,10 @@ void self_test(int test)
test_acquire(i); // Acquire test test_acquire(i); // Acquire test
test_validate(i); // Validate test test_validate(i); // Validate test
float saved_peakLevel = peakLevel; float saved_peakLevel = peakLevel;
if (peakLevel < -35) { // if (peakLevel < -35) {
shell_printf("Peak level too low, abort\n\r"); // shell_printf("Peak level too low, abort\n\r");
return; // return;
} // }
shell_printf("Start level = %f, ",peakLevel); shell_printf("Start level = %f, ",peakLevel);
while (setting.step_delay > 10 && peakLevel > saved_peakLevel - 1) { while (setting.step_delay > 10 && peakLevel > saved_peakLevel - 1) {

@ -189,7 +189,7 @@ void SI4432_Transmit(int d)
if (( SI4432_Read_Byte ( 0x02 ) & 0x03 ) == 2) if (( SI4432_Read_Byte ( 0x02 ) & 0x03 ) == 2)
return; // Already in transmit mode return; // Already in transmit mode
chThdSleepMilliseconds(20); chThdSleepMilliseconds(20);
SI4432_Write_Byte( 0x07, 0x03); SI4432_Write_Byte( 0x07, 0x02);
chThdSleepMilliseconds(20); chThdSleepMilliseconds(20);
SI4432_Write_Byte( 0x07, 0x0b); SI4432_Write_Byte( 0x07, 0x0b);
chThdSleepMilliseconds(30); chThdSleepMilliseconds(30);
@ -204,7 +204,7 @@ void SI4432_Receive(void)
if (( SI4432_Read_Byte ( 0x02 ) & 0x03 ) == 1) if (( SI4432_Read_Byte ( 0x02 ) & 0x03 ) == 1)
return; // Already in receive mode return; // Already in receive mode
chThdSleepMilliseconds(20); chThdSleepMilliseconds(20);
SI4432_Write_Byte( 0x07, 0x03); SI4432_Write_Byte( 0x07, 0x02);
chThdSleepMilliseconds(20); chThdSleepMilliseconds(20);
SI4432_Write_Byte( 0x07, 0x07); SI4432_Write_Byte( 0x07, 0x07);
chThdSleepMilliseconds(30); chThdSleepMilliseconds(30);
@ -310,10 +310,14 @@ void set_10mhz(uint32_t f)
} }
int SI4432_frequency_changed = false; int SI4432_frequency_changed = false;
//static int old_freq_band[2] = {-1,-1}; #if 0
//static int written[2]= {0,0}; static int old_freq_band[2] = {-1,-1};
static int written[2]= {0,0};
#endif
void SI4432_Set_Frequency ( uint32_t Freq ) { void SI4432_Set_Frequency ( uint32_t Freq ) {
// int mode = SI4432_Read_Byte(0x02) & 0x03;
// SI4432_Write_Byte(0x07, 0x02); // Switch to tune mode
uint8_t hbsel; uint8_t hbsel;
if (Freq >= 480000000U) { if (Freq >= 480000000U) {
hbsel = 1<<5; hbsel = 1<<5;
@ -326,17 +330,35 @@ void SI4432_Set_Frequency ( uint32_t Freq ) {
uint32_t K = Freq % setting_frequency_10mhz; uint32_t K = Freq % setting_frequency_10mhz;
uint32_t Carrier = (K<<2) / 625; uint32_t Carrier = (K<<2) / 625;
uint8_t Freq_Band = N | hbsel | sbsel; uint8_t Freq_Band = N | hbsel | sbsel;
// if (old_freq_band[SI4432_Sel] == Freq_Band) { // int count = 0;
// if (written[SI4432_Sel]++ < 6) // my_microsecond_delay(200);
// SI4432_Write_Byte ( 0x75, Freq_Band ); // int s;
// SI4432_Write_Byte ( 0x76, (Carrier>>8) & 0xFF ); // while (count++ < 100 && ( (s = SI4432_Read_Byte ( 0x02 )) & 0x03 ) != 0) {
// SI4432_Write_Byte ( 0x77, Carrier & 0xFF ); // my_microsecond_delay(100);
// } else {
SI4432_Write_3_Byte ( 0x75, Freq_Band, (Carrier>>8) & 0xFF, Carrier & 0xFF);
// old_freq_band[SI4432_Sel] = Freq_Band;
// written[SI4432_Sel] = 0;
// } // }
#if 0
if (old_freq_band[SI4432_Sel] == Freq_Band) {
if (written[SI4432_Sel] < 4) {
SI4432_Write_Byte ( 0x75, Freq_Band );
written[SI4432_Sel]++;
}
SI4432_Write_Byte ( 0x76, (Carrier>>8) & 0xFF );
SI4432_Write_Byte ( 0x77, Carrier & 0xFF );
} else {
#endif
SI4432_Write_3_Byte ( 0x75, Freq_Band, (Carrier>>8) & 0xFF, Carrier & 0xFF);
#if 0
old_freq_band[SI4432_Sel] = Freq_Band;
written[SI4432_Sel] = 0;
}
#endif
SI4432_frequency_changed = true; SI4432_frequency_changed = true;
// if (mode == 1) // RX mode
// SI4432_Write_Byte( 0x07, 0x07);
// else
// SI4432_Write_Byte( 0x07, 0x0B);
} }
int actualStepDelay = 1500; int actualStepDelay = 1500;
@ -471,34 +493,35 @@ void SI4432_Sub_Init(void)
// byte fb = 19 ; // 430<33>439.9 MHz // byte fb = 19 ; // 430<33>439.9 MHz
// byte FBS = (sbsel << 6 ) | (hbsel << 5 ) | fb ; // byte FBS = (sbsel << 6 ) | (hbsel << 5 ) | fb ;
// SI4432_Write_Byte(0x75, FBS) ; // SI4432_Write_Byte(0x75, FBS) ;
SI4432_Write_Byte(0x75, 0x46) ; // SI4432_Write_Byte(0x75, 0x46) ;
// Register 0x76 Nominal Carrier Frequency // Register 0x76 Nominal Carrier Frequency
// WE USE 433.92 MHz // WE USE 433.92 MHz
// Si443x-Register-Settings_RevB1.xls // Si443x-Register-Settings_RevB1.xls
// SI4432_Write_Byte(0x76, 0x62) ; // SI4432_Write_Byte(0x76, 0x62) ;
SI4432_Write_Byte(0x76, 0x00) ; // SI4432_Write_Byte(0x76, 0x00) ;
// Register 0x77 Nominal Carrier Frequency // Register 0x77 Nominal Carrier Frequency
SI4432_Write_Byte(0x77, 0x00) ; // SI4432_Write_Byte(0x77, 0x00) ;
// RX MODEM SETTINGS // RX MODEM SETTINGS
SI4432_Write_3_Byte(0x1C, 0x81, 0x3C, 0x02) ; // SI4432_Write_3_Byte(0x1C, 0x81, 0x3C, 0x02) ;
// SI4432_Write_Byte(0x1C, 0x81) ; // SI4432_Write_Byte(0x1C, 0x81) ;
// SI4432_Write_Byte(0x1D, 0x3C) ; SI4432_Write_Byte(0x1D, 0x00) ;
// SI4432_Write_Byte(0x1E, 0x02) ; // SI4432_Write_Byte(0x1E, 0x02) ;
SI4432_Write_Byte(0x1F, 0x03) ; SI4432_Write_Byte(0x1F, 0x03) ;
// SI4432_Write_Byte(0x20, 0x78) ; // SI4432_Write_Byte(0x20, 0x78) ;
SI4432_Write_3_Byte(0x21, 0x01, 0x11, 0x11) ; // SI4432_Write_3_Byte(0x21, 0x01, 0x11, 0x11) ;
// SI4432_Write_Byte(0x21, 0x01) ; SI4432_Write_Byte(0x21, 0x01) ;
// SI4432_Write_Byte(0x22, 0x11) ; SI4432_Write_Byte(0x22, 0x11) ;
// SI4432_Write_Byte(0x23, 0x11) ; SI4432_Write_Byte(0x23, 0x11) ;
SI4432_Write_Byte(0x24, 0x01) ; SI4432_Write_Byte(0x24, 0x01) ;
SI4432_Write_Byte(0x25, 0x13) ; SI4432_Write_Byte(0x25, 0x13) ;
SI4432_Write_Byte(0x2A, 0xFF) ; SI4432_Write_Byte(0x2A, 0xFF) ;
SI4432_Write_3_Byte(0x2C, 0x28, 0x0c, 0x28) ; // SI4432_Write_3_Byte(0x2C, 0x28, 0x0c, 0x28) ;
// SI4432_Write_Byte(0x2C, 0x28) ; // SI4432_Write_Byte(0x2C, 0x28) ;
// SI4432_Write_Byte(0x2D, 0x0C) ; // SI4432_Write_Byte(0x2D, 0x0C) ;
// SI4432_Write_Byte(0x2E, 0x28) ; // SI4432_Write_Byte(0x2E, 0x28) ;
SI4432_Write_Byte(0x30, 0x61); // Disable all packet handling
SI4432_Write_Byte(0x69, 0x60); // AGC, no LNA, fast gain increment SI4432_Write_Byte(0x69, 0x60); // AGC, no LNA, fast gain increment

Loading…
Cancel
Save

Powered by TurnKey Linux.