|
|
|
|
@ -17,254 +17,6 @@
|
|
|
|
|
#ifndef MCUCONF_H
|
|
|
|
|
#define MCUCONF_H
|
|
|
|
|
|
|
|
|
|
#ifdef TINYSA_F303
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* STM32F3xx drivers configuration.
|
|
|
|
|
* The following settings override the default settings present in
|
|
|
|
|
* the various device driver implementation headers.
|
|
|
|
|
* Note that the settings for each driver only have effect if the whole
|
|
|
|
|
* driver is enabled in halconf.h.
|
|
|
|
|
*
|
|
|
|
|
* IRQ priorities:
|
|
|
|
|
* 15...0 Lowest...Highest.
|
|
|
|
|
*
|
|
|
|
|
* DMA priorities:
|
|
|
|
|
* 0...3 Lowest...Highest.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#define STM32F3xx_MCUCONF
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* HAL driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_NO_INIT FALSE
|
|
|
|
|
#define STM32_PVD_ENABLE FALSE
|
|
|
|
|
#define STM32_PLS STM32_PLS_LEV0
|
|
|
|
|
#if 0 // 72MHz
|
|
|
|
|
#define STM32_HSI_ENABLED FALSE
|
|
|
|
|
#define STM32_HSE_ENABLED TRUE
|
|
|
|
|
#define STM32_SW STM32_SW_PLL
|
|
|
|
|
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
|
|
|
|
#define STM32_PREDIV_VALUE 1
|
|
|
|
|
#define STM32_PLLMUL_VALUE 9
|
|
|
|
|
#define STM32_USBPRE STM32_USBPRE_DIV1P5
|
|
|
|
|
#else
|
|
|
|
|
#define STM32_HSI_ENABLED TRUE // 48MHz
|
|
|
|
|
#define STM32_HSE_ENABLED FALSE
|
|
|
|
|
#define STM32_SW STM32_SW_PLL
|
|
|
|
|
#define STM32_PLLSRC STM32_PLLSRC_HSI
|
|
|
|
|
#define STM32_PREDIV_VALUE 1
|
|
|
|
|
#define STM32_PLLMUL_VALUE 12 // prediv HSI always 2
|
|
|
|
|
#define STM32_USBPRE STM32_USBPRE_DIV1
|
|
|
|
|
#endif
|
|
|
|
|
#define STM32_HPRE STM32_HPRE_DIV1
|
|
|
|
|
#define STM32_PPRE1 STM32_PPRE1_DIV2
|
|
|
|
|
// Set SPI1 more faster use PPRE2 max speed
|
|
|
|
|
#define STM32_PPRE2 STM32_PPRE2_DIV1
|
|
|
|
|
#define STM32_MCOSEL STM32_MCOSEL_PLLDIV2
|
|
|
|
|
#define STM32_ADC12PRES STM32_ADC12PRES_DIV2
|
|
|
|
|
//#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
|
|
|
|
|
#define STM32_USART1SW STM32_USART1SW_PCLK
|
|
|
|
|
//#define STM32_USART2SW STM32_USART2SW_PCLK
|
|
|
|
|
//#define STM32_USART3SW STM32_USART3SW_PCLK
|
|
|
|
|
#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
|
|
|
|
|
//#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
|
|
|
|
|
#define STM32_TIM1SW STM32_TIM1SW_PCLK2
|
|
|
|
|
#define STM32_TIM8SW STM32_TIM8SW_PCLK2
|
|
|
|
|
#define STM32_USB_CLOCK_REQUIRED TRUE
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* RTC driver system settings for stm32f303
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#ifndef VNA_USE_LSE
|
|
|
|
|
// Use 40kHz LSI
|
|
|
|
|
#define STM32_LSE_ENABLED FALSE
|
|
|
|
|
#define STM32_LSI_ENABLED TRUE
|
|
|
|
|
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
|
|
|
|
#define STM32_RTC_PRESA_VALUE 40
|
|
|
|
|
#define STM32_RTC_PRESS_VALUE 1000
|
|
|
|
|
#else
|
|
|
|
|
// Use 32768Hz LSE
|
|
|
|
|
#define STM32_LSE_ENABLED TRUE
|
|
|
|
|
#define STM32_LSI_ENABLED FALSE
|
|
|
|
|
#define STM32_RTCSEL STM32_RTCSEL_LSE
|
|
|
|
|
#define STM32_RTC_PRESA_VALUE 32
|
|
|
|
|
#define STM32_RTC_PRESS_VALUE 1024
|
|
|
|
|
#define STM32_LSEDRV (3 << 3)
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* ADC driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_ADC_USE_ADC1 TRUE
|
|
|
|
|
#define STM32_ADC_USE_ADC2 TRUE
|
|
|
|
|
#define STM32_ADC_USE_ADC3 FALSE
|
|
|
|
|
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
|
|
|
|
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
|
|
|
|
//#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
|
|
|
|
//#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
|
|
|
|
#define STM32_ADC_ADC12_DMA_PRIORITY 2
|
|
|
|
|
//#define STM32_ADC_ADC34_DMA_PRIORITY 2
|
|
|
|
|
#define STM32_ADC_ADC12_IRQ_PRIORITY 2
|
|
|
|
|
//#define STM32_ADC_ADC34_IRQ_PRIORITY 5
|
|
|
|
|
#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2
|
|
|
|
|
//#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5
|
|
|
|
|
//#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_ADCCK
|
|
|
|
|
//#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV2
|
|
|
|
|
#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
|
|
|
|
//#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
|
|
|
|
#define STM32_ADC_DUAL_MODE FALSE
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* CAN driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_CAN_USE_CAN1 FALSE
|
|
|
|
|
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* DAC driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_DAC_DUAL_MODE FALSE
|
|
|
|
|
#define STM32_DAC_USE_DAC1_CH1 TRUE
|
|
|
|
|
#define STM32_DAC_USE_DAC1_CH2 TRUE
|
|
|
|
|
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
|
|
|
|
|
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
|
|
|
|
|
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
|
|
|
|
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* EXT driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3
|
|
|
|
|
|
|
|
|
|
#define STM32_DISABLE_EXTI2122_HANDLER TRUE
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* GPT driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_GPT_USE_TIM1 FALSE
|
|
|
|
|
#define STM32_GPT_USE_TIM2 FALSE
|
|
|
|
|
#define STM32_GPT_USE_TIM3 TRUE
|
|
|
|
|
#define STM32_GPT_USE_TIM4 TRUE
|
|
|
|
|
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_GPT_TIM4_IRQ_PRIORITY 2
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* I2C driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_I2C_USE_I2C1 TRUE
|
|
|
|
|
#define STM32_I2C_USE_I2C2 FALSE
|
|
|
|
|
#define STM32_I2C_BUSY_TIMEOUT 50
|
|
|
|
|
#define STM32_I2C_I2C1_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_I2C_I2C2_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_I2C_USE_DMA TRUE
|
|
|
|
|
#define STM32_I2C_I2C1_DMA_PRIORITY 1
|
|
|
|
|
#define STM32_I2C_I2C2_DMA_PRIORITY 1
|
|
|
|
|
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* I2S driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_I2S_USE_SPI1 FALSE
|
|
|
|
|
#define STM32_I2S_USE_SPI2 FALSE
|
|
|
|
|
#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \
|
|
|
|
|
STM32_I2S_MODE_RX)
|
|
|
|
|
#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_SLAVE | \
|
|
|
|
|
STM32_I2S_MODE_RX )
|
|
|
|
|
#define STM32_I2S_SPI1_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_I2S_SPI2_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_I2S_SPI1_DMA_PRIORITY 1
|
|
|
|
|
#define STM32_I2S_SPI2_DMA_PRIORITY 1
|
|
|
|
|
#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
|
|
|
|
#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
|
|
|
|
#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
|
|
|
|
#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
|
|
|
|
#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* ICU driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_ICU_USE_TIM1 FALSE
|
|
|
|
|
#define STM32_ICU_USE_TIM2 FALSE
|
|
|
|
|
#define STM32_ICU_USE_TIM3 FALSE
|
|
|
|
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* PWM driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_PWM_USE_ADVANCED FALSE
|
|
|
|
|
#define STM32_PWM_USE_TIM1 FALSE
|
|
|
|
|
#define STM32_PWM_USE_TIM2 FALSE
|
|
|
|
|
#define STM32_PWM_USE_TIM3 FALSE
|
|
|
|
|
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* SERIAL driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_SERIAL_USE_USART1 TRUE
|
|
|
|
|
#define STM32_SERIAL_USE_USART2 FALSE
|
|
|
|
|
#define STM32_SERIAL_USART1_PRIORITY 3
|
|
|
|
|
#define STM32_SERIAL_USART2_PRIORITY 3
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* SPI driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_SPI_USE_SPI1 FALSE
|
|
|
|
|
#define STM32_SPI_USE_SPI2 FALSE
|
|
|
|
|
#define STM32_SPI_USE_SPI3 FALSE
|
|
|
|
|
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
|
|
|
|
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
|
|
|
|
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
|
|
|
|
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
|
|
|
|
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* ST driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_ST_IRQ_PRIORITY 2
|
|
|
|
|
#define STM32_ST_USE_TIMER 2
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* UART driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_UART_USE_USART1 FALSE
|
|
|
|
|
#define STM32_UART_USE_USART2 FALSE
|
|
|
|
|
#define STM32_UART_USART1_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_UART_USART2_IRQ_PRIORITY 3
|
|
|
|
|
#define STM32_UART_USART1_DMA_PRIORITY 0
|
|
|
|
|
#define STM32_UART_USART2_DMA_PRIORITY 0
|
|
|
|
|
#define STM32_UART_USART3_DMA_PRIORITY 0
|
|
|
|
|
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* USB driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_USB_USE_USB1 TRUE
|
|
|
|
|
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
|
|
|
|
|
#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* WDG driver system settings.
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_WDG_USE_IWDG FALSE
|
|
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* STM32F0xx drivers configuration.
|
|
|
|
|
* The following settings override the default settings present in
|
|
|
|
|
@ -473,6 +225,4 @@
|
|
|
|
|
*/
|
|
|
|
|
#define STM32_WDG_USE_IWDG FALSE
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#endif /* MCUCONF_H */
|
|
|
|
|
|
DiSlord
5 years ago
committed by
erikkaashoek