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MMDVM_HS
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Support for interrupt counter test mode

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pull/80/head
Andy CA6JAU 7 years ago
parent c45a7cf38f
commit 1aab7ec355
13 changed files with 93 additions and 59 deletions
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55
ADF7021.cpp
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@ -20,7 +20,7 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
#include "Config.h" #include "Config.h"
#if defined(ENABLE_ADF7021) #if defined(ENABLE_ADF7021)
@ -283,7 +283,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
m_RX_F_divider = floor(divider + 0.5); m_RX_F_divider = floor(divider + 0.5);
ADF7021_RX_REG0 = (uint32_t) 0b0000; ADF7021_RX_REG0 = (uint32_t) 0b0000;
#if defined(BIDIR_DATA_PIN) #if defined(BIDIR_DATA_PIN)
ADF7021_RX_REG0 |= (uint32_t) 0b01001 << 27; // mux regulator/receive ADF7021_RX_REG0 |= (uint32_t) 0b01001 << 27; // mux regulator/receive
#else #else
@ -292,7 +292,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_RX_REG0 |= (uint32_t) m_RX_N_divider << 19; // frequency; ADF7021_RX_REG0 |= (uint32_t) m_RX_N_divider << 19; // frequency;
ADF7021_RX_REG0 |= (uint32_t) m_RX_F_divider << 4; // frequency; ADF7021_RX_REG0 |= (uint32_t) m_RX_F_divider << 4; // frequency;
if( div2 == 1U ) if( div2 == 1U )
divider = m_frequency_tx / (ADF7021_PFD / 2U); divider = m_frequency_tx / (ADF7021_PFD / 2U);
else else
@ -369,7 +369,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_REG3 = ADF7021_REG3_DSTAR; ADF7021_REG3 = ADF7021_REG3_DSTAR;
ADF7021_REG10 = ADF7021_REG10_DSTAR; ADF7021_REG10 = ADF7021_REG10_DSTAR;
// K=32 // K=32
ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4 ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4
ADF7021_REG4 |= (uint32_t) 0b001 << 4; // mode, GMSK ADF7021_REG4 |= (uint32_t) 0b001 << 4; // mode, GMSK
@ -386,10 +386,10 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_REG2 |= (uint32_t) (m_dstarDev / div2) << 19; // deviation ADF7021_REG2 |= (uint32_t) (m_dstarDev / div2) << 19; // deviation
ADF7021_REG2 |= (uint32_t) 0b001 << 4; // modulation (GMSK) ADF7021_REG2 |= (uint32_t) 0b001 << 4; // modulation (GMSK)
break; break;
case STATE_DMR: case STATE_DMR:
// Dev: +1 symb 648 Hz, symb rate = 4800 // Dev: +1 symb 648 Hz, symb rate = 4800
ADF7021_REG3 = ADF7021_REG3_DMR; ADF7021_REG3 = ADF7021_REG3_DMR;
ADF7021_REG10 = ADF7021_REG10_DMR; ADF7021_REG10 = ADF7021_REG10_DMR;
@ -413,7 +413,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
#endif #endif
break; break;
case STATE_YSF: case STATE_YSF:
// Dev: +1 symb 900 Hz, symb rate = 4800 // Dev: +1 symb 900 Hz, symb rate = 4800
@ -440,7 +440,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
#endif #endif
break; break;
case STATE_P25: case STATE_P25:
// Dev: +1 symb 600 Hz, symb rate = 4800 // Dev: +1 symb 600 Hz, symb rate = 4800
@ -467,7 +467,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
#endif #endif
break; break;
case STATE_NXDN: case STATE_NXDN:
// Dev: +1 symb 350 Hz, symb rate = 2400 // Dev: +1 symb 350 Hz, symb rate = 2400
@ -494,7 +494,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
#endif #endif
break; break;
default: default:
break; break;
} }
@ -531,7 +531,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA
AD7021_control_word = ADF7021_REG2; AD7021_control_word = ADF7021_REG2;
Send_AD7021_control(); Send_AD7021_control();
// TEST DAC (14) // TEST DAC (14)
#if defined(TEST_DAC) #if defined(TEST_DAC)
AD7021_control_word = 0x0000001E; AD7021_control_word = 0x0000001E;
@ -567,7 +567,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
// 3FSK/4FSK DEMOD (13) // 3FSK/4FSK DEMOD (13)
AD7021_control_word = ADF7021_REG13; AD7021_control_word = ADF7021_REG13;
Send_AD7021_control(); Send_AD7021_control();
#if defined(TEST_TX) #if defined(TEST_TX)
PTT_pin(HIGH); PTT_pin(HIGH);
AD7021_control_word = ADF7021_TX_REG0; AD7021_control_word = ADF7021_TX_REG0;
@ -607,7 +607,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
ADF7021_REG3 = ADF7021_REG3_DSTAR; ADF7021_REG3 = ADF7021_REG3_DSTAR;
ADF7021_REG10 = ADF7021_REG10_DSTAR; ADF7021_REG10 = ADF7021_REG10_DSTAR;
// K=32 // K=32
ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4 ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4
ADF7021_REG4 |= (uint32_t) 0b001 << 4; // mode, GMSK ADF7021_REG4 |= (uint32_t) 0b001 << 4; // mode, GMSK
@ -624,10 +624,10 @@ void CIO::ifConf2(MMDVM_STATE modemState)
ADF7021_REG2 |= (uint32_t) (m_dstarDev / div2)<< 19; // deviation ADF7021_REG2 |= (uint32_t) (m_dstarDev / div2)<< 19; // deviation
ADF7021_REG2 |= (uint32_t) 0b001 << 4; // modulation (GMSK) ADF7021_REG2 |= (uint32_t) 0b001 << 4; // modulation (GMSK)
break; break;
case STATE_DMR: case STATE_DMR:
// Dev: +1 symb 648 Hz, symb rate = 4800 // Dev: +1 symb 648 Hz, symb rate = 4800
ADF7021_REG3 = ADF7021_REG3_DMR; ADF7021_REG3 = ADF7021_REG3_DMR;
ADF7021_REG10 = ADF7021_REG10_DMR; ADF7021_REG10 = ADF7021_REG10_DMR;
@ -647,7 +647,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
ADF7021_REG2 |= (uint32_t) (m_dmrDev / div2) << 19; // deviation ADF7021_REG2 |= (uint32_t) (m_dmrDev / div2) << 19; // deviation
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
break; break;
case STATE_YSF: case STATE_YSF:
// Dev: +1 symb 900 Hz, symb rate = 4800 // Dev: +1 symb 900 Hz, symb rate = 4800
@ -670,7 +670,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
ADF7021_REG2 |= (uint32_t) (m_ysfDev / div2) << 19; // deviation ADF7021_REG2 |= (uint32_t) (m_ysfDev / div2) << 19; // deviation
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
break; break;
case STATE_P25: case STATE_P25:
// Dev: +1 symb 600 Hz, symb rate = 4800 // Dev: +1 symb 600 Hz, symb rate = 4800
@ -740,7 +740,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
// IF coarse cal (5) // IF coarse cal (5)
AD7021_control_word = ADF7021_REG5; AD7021_control_word = ADF7021_REG5;
Send_AD7021_control2(); Send_AD7021_control2();
// Delay for coarse IF filter calibration // Delay for coarse IF filter calibration
delay_IFcal(); delay_IFcal();
@ -754,7 +754,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA
AD7021_control_word = ADF7021_REG2; AD7021_control_word = ADF7021_REG2;
Send_AD7021_control2(); Send_AD7021_control2();
// TEST DAC (14) // TEST DAC (14)
AD7021_control_word = 0x0000000E; AD7021_control_word = 0x0000000E;
Send_AD7021_control2(); Send_AD7021_control2();
@ -778,7 +778,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
// 3FSK/4FSK DEMOD (13) // 3FSK/4FSK DEMOD (13)
AD7021_control_word = ADF7021_REG13; AD7021_control_word = ADF7021_REG13;
Send_AD7021_control2(); Send_AD7021_control2();
// TEST MODE (disabled) (15) // TEST MODE (disabled) (15)
AD7021_control_word = 0x000E000F; AD7021_control_word = 0x000E000F;
Send_AD7021_control2(); Send_AD7021_control2();
@ -788,7 +788,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
void CIO::interrupt() void CIO::interrupt()
{ {
uint8_t bit = 0U; uint8_t bit = 0U;
if (!m_started) if (!m_started)
return; return;
@ -850,7 +850,7 @@ void CIO::interrupt()
even = ADF7021_EVEN_BIT; even = ADF7021_EVEN_BIT;
} }
} }
// we sample the RX bit at rising TXD clock edge, so TXD must be 1 and we are not in tx mode // we sample the RX bit at rising TXD clock edge, so TXD must be 1 and we are not in tx mode
if (!m_tx && clk == 1U && !m_duplex) { if (!m_tx && clk == 1U && !m_duplex) {
if(RXD_pin()) if(RXD_pin())
@ -860,7 +860,7 @@ void CIO::interrupt()
m_rxBuffer.put(bit, m_control); m_rxBuffer.put(bit, m_control);
} }
if (torx_request == true && even == ADF7021_EVEN_BIT && m_tx && clk == 0U) { if (torx_request == true && even == ADF7021_EVEN_BIT && m_tx && clk == 0U) {
// that is absolutely crucial in 4FSK, see datasheet: // that is absolutely crucial in 4FSK, see datasheet:
// enable sle after 1/4 tBit == 26uS when sending MSB (even == false) and clock is low // enable sle after 1/4 tBit == 26uS when sending MSB (even == false) and clock is low
@ -881,14 +881,15 @@ void CIO::interrupt()
// last tranmittted bit is always the even bit // last tranmittted bit is always the even bit
// since the current bit is a transitional "don't care" bit, never transmitted // since the current bit is a transitional "don't care" bit, never transmitted
even = !ADF7021_EVEN_BIT; even = !ADF7021_EVEN_BIT;
} }
m_watchdog++; m_watchdog++;
m_modeTimerCnt++; m_modeTimerCnt++;
m_int1counter++;
if(m_scanPauseCnt >= SCAN_PAUSE) if(m_scanPauseCnt >= SCAN_PAUSE)
m_scanPauseCnt = 0U; m_scanPauseCnt = 0U;
if(m_scanPauseCnt != 0U) if(m_scanPauseCnt != 0U)
m_scanPauseCnt++; m_scanPauseCnt++;
} }
@ -897,7 +898,7 @@ void CIO::interrupt()
void CIO::interrupt2() void CIO::interrupt2()
{ {
uint8_t bit = 0U; uint8_t bit = 0U;
if(m_duplex) { if(m_duplex) {
if(RXD2_pin()) if(RXD2_pin())
bit = 1U; bit = 1U;
@ -906,6 +907,8 @@ void CIO::interrupt2()
m_rxBuffer.put(bit, m_control); m_rxBuffer.put(bit, m_control);
} }
m_int2counter++;
} }
#endif #endif

14
CalDMR.cpp
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@ -53,7 +53,8 @@ CCalDMR::CCalDMR() :
m_transmit(false), m_transmit(false),
m_state(DMRCAL1K_IDLE), m_state(DMRCAL1K_IDLE),
m_dmr1k(), m_dmr1k(),
m_audioSeq(0) m_audioSeq(0),
m_count(0)
{ {
::memcpy(m_dmr1k, VOICE_1K, DMR_FRAME_LENGTH_BYTES + 1U); ::memcpy(m_dmr1k, VOICE_1K, DMR_FRAME_LENGTH_BYTES + 1U);
} }
@ -72,6 +73,17 @@ void CCalDMR::process()
case STATE_DMRDMO1K: case STATE_DMRDMO1K:
dmrdmo1k(); dmrdmo1k();
break; break;
case STATE_INTCAL:
// Simple interrupt counter for board diagnostics (TCXO, connections, etc)
// Not intended for precise interrupt frequency measurements
m_count++;
if (m_count >= CAL_DLY_LOOP) {
m_count = 0U;
uint16_t int1, int2;
io.getIntCounter(int1, int2);
DEBUG3("Counter INT1/INT2:", int1 >> 1U, int2);
}
break;
default: default:
break; break;
} }

1
CalDMR.h
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@ -47,6 +47,7 @@ private:
DMRCAL1K m_state; DMRCAL1K m_state;
uint8_t m_dmr1k[DMR_FRAME_LENGTH_BYTES + 1U]; uint8_t m_dmr1k[DMR_FRAME_LENGTH_BYTES + 1U];
uint8_t m_audioSeq; uint8_t m_audioSeq;
uint32_t m_count;
}; };
#endif #endif

2
CalRSSI.cpp
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@ -51,7 +51,7 @@ void CCalRSSI::process()
if (m_navg >= 6U) { if (m_navg >= 6U) {
uint16_t ave = m_accum / 6U; uint16_t ave = m_accum / 6U;
uint8_t buffer[6U]; uint8_t buffer[6U];
buffer[0U] = (m_max >> 8) & 0xFFU; buffer[0U] = (m_max >> 8) & 0xFFU;
buffer[1U] = (m_max >> 0) & 0xFFU; buffer[1U] = (m_max >> 0) & 0xFFU;

2
Debug.h
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@ -36,7 +36,7 @@
#define DEBUG1(a) #define DEBUG1(a)
#define DEBUG2(a,b) #define DEBUG2(a,b)
#define DEBUG2I(a,b) #define DEBUG2I(a,b)
#define DEBUG3(a,b,c) #define DEBUG3(a,b,c) serial.writeDebug((a),(b),(c))
#define DEBUG4(a,b,c,d) #define DEBUG4(a,b,c,d)
#define DEBUG5(a,b,c,d,e) #define DEBUG5(a,b,c,d,e)

3
Globals.h
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@ -47,7 +47,8 @@ enum MMDVM_STATE {
STATE_RSSICAL = 96, STATE_RSSICAL = 96,
STATE_CWID = 97, STATE_CWID = 97,
STATE_DMRCAL = 98, STATE_DMRCAL = 98,
STATE_DSTARCAL = 99 STATE_DSTARCAL = 99,
STATE_INTCAL = 100
}; };
const uint8_t MARK_SLOT1 = 0x08U; const uint8_t MARK_SLOT1 = 0x08U;

18
IO.cpp
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@ -17,7 +17,7 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
#include "Config.h" #include "Config.h"
#include "Globals.h" #include "Globals.h"
#include "IO.h" #include "IO.h"
@ -37,10 +37,12 @@ m_scanEnable(false),
m_scanPauseCnt(0U), m_scanPauseCnt(0U),
m_scanPos(0U), m_scanPos(0U),
m_ledValue(true), m_ledValue(true),
m_watchdog(0U) m_watchdog(0U),
m_int1counter(0U),
m_int2counter(0U)
{ {
Init(); Init();
CE_pin(HIGH); CE_pin(HIGH);
LED_pin(HIGH); LED_pin(HIGH);
PTT_pin(LOW); PTT_pin(LOW);
@ -165,7 +167,7 @@ void CIO::process()
} }
setRX(false); setRX(false);
} }
if(m_modemState_prev == STATE_DSTAR) if(m_modemState_prev == STATE_DSTAR)
scantime = SCAN_TIME; scantime = SCAN_TIME;
else if(m_modemState_prev == STATE_DMR) else if(m_modemState_prev == STATE_DMR)
@ -402,3 +404,11 @@ uint32_t CIO::getWatchdog()
{ {
return m_watchdog; return m_watchdog;
} }
void CIO::getIntCounter(uint16_t &int1, uint16_t &int2)
{
int1 = m_int1counter;
int2 = m_int2counter;
m_int1counter = 0U;
m_int2counter = 0U;
}

13
IO.h
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@ -47,6 +47,12 @@
#define SCAN_TIME 1920 #define SCAN_TIME 1920
#define SCAN_PAUSE 20000 #define SCAN_PAUSE 20000
#if defined(DUPLEX)
#define CAL_DLY_LOOP 96100U
#else
#define CAL_DLY_LOOP 106000U
#endif
extern uint32_t m_frequency_rx; extern uint32_t m_frequency_rx;
extern uint32_t m_frequency_tx; extern uint32_t m_frequency_tx;
extern uint32_t m_pocsag_freq_tx; extern uint32_t m_pocsag_freq_tx;
@ -70,7 +76,7 @@ public:
void CE_pin(bool on); void CE_pin(bool on);
bool RXD_pin(void); bool RXD_pin(void);
bool CLK_pin(void); bool CLK_pin(void);
#if defined(BIDIR_DATA_PIN) #if defined(BIDIR_DATA_PIN)
void RXD_pin_write(bool on); void RXD_pin_write(bool on);
#endif #endif
@ -90,7 +96,7 @@ public:
#if defined(DUPLEX) #if defined(DUPLEX)
void interrupt2(void); void interrupt2(void);
#endif #endif
#if defined(BIDIR_DATA_PIN) #if defined(BIDIR_DATA_PIN)
void Data_dir_out(bool dir); void Data_dir_out(bool dir);
#endif #endif
@ -108,6 +114,7 @@ public:
void setLoDevYSF(bool ysfLoDev); void setLoDevYSF(bool ysfLoDev);
void resetWatchdog(void); void resetWatchdog(void);
uint32_t getWatchdog(void); uint32_t getWatchdog(void);
void getIntCounter(uint16_t &int1, uint16_t &int2);
void selfTest(void); void selfTest(void);
// RF interface API // RF interface API
@ -162,6 +169,8 @@ private:
MMDVM_STATE m_Modes[5]; MMDVM_STATE m_Modes[5];
bool m_ledValue; bool m_ledValue;
volatile uint32_t m_watchdog; volatile uint32_t m_watchdog;
volatile uint16_t m_int1counter;
volatile uint16_t m_int2counter;
}; };

2
MMDVM_HS.cpp
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@ -123,7 +123,7 @@ void loop()
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy())) if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process(); pocsagTX.process();
if (m_calState == STATE_DMRCAL || m_calState == STATE_DMRDMO1K) if (m_calState == STATE_DMRCAL || m_calState == STATE_DMRDMO1K || m_calState == STATE_INTCAL)
calDMR.process(); calDMR.process();
#if defined(SEND_RSSI_DATA) #if defined(SEND_RSSI_DATA)

2
MMDVM_HS.ino
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@ -118,7 +118,7 @@ void loop()
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy())) if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process(); pocsagTX.process();
if (m_calState == STATE_DMRCAL || m_calState == STATE_DMRDMO1K) if (m_calState == STATE_DMRCAL || m_calState == STATE_DMRDMO1K || m_calState == STATE_INTCAL)
calDMR.process(); calDMR.process();
#if defined(SEND_RSSI_DATA) #if defined(SEND_RSSI_DATA)

31
SerialPort.cpp
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@ -212,7 +212,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
{ {
if (length < 13U) if (length < 13U)
return 4U; return 4U;
bool ysfLoDev = (data[0U] & 0x08U) == 0x08U; bool ysfLoDev = (data[0U] & 0x08U) == 0x08U;
bool simplex = (data[0U] & 0x80U) == 0x80U; bool simplex = (data[0U] & 0x80U) == 0x80U;
@ -231,7 +231,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
MMDVM_STATE modemState = MMDVM_STATE(data[3U]); MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_RSSICAL) if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_INTCAL && modemState != STATE_RSSICAL)
return 4U; return 4U;
if (modemState == STATE_DSTAR && !dstarEnable) if (modemState == STATE_DSTAR && !dstarEnable)
return 4U; return 4U;
@ -278,7 +278,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
m_nxdnEnable = nxdnEnable; m_nxdnEnable = nxdnEnable;
m_pocsagEnable = pocsagEnable; m_pocsagEnable = pocsagEnable;
if (modemState == STATE_DMRCAL || modemState == STATE_DMRDMO1K || modemState == STATE_RSSICAL) { if (modemState == STATE_DMRCAL || modemState == STATE_DMRDMO1K || modemState == STATE_RSSICAL || modemState == STATE_INTCAL) {
m_dmrEnable = true; m_dmrEnable = true;
m_modemState = STATE_DMR; m_modemState = STATE_DMR;
m_calState = modemState; m_calState = modemState;
@ -319,7 +319,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
io.setLoDevYSF(ysfLoDev); io.setLoDevYSF(ysfLoDev);
if (!m_firstCal || (modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_RSSICAL)) { if (!m_firstCal || (modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_RSSICAL && modemState != STATE_INTCAL)) {
if(m_dstarEnable) if(m_dstarEnable)
io.ifConf(STATE_DSTAR, true); io.ifConf(STATE_DSTAR, true);
else if(m_dmrEnable) else if(m_dmrEnable)
@ -339,7 +339,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
io.printConf(); io.printConf();
#endif #endif
if (modemState == STATE_DMRCAL || modemState == STATE_DMRDMO1K || modemState == STATE_RSSICAL) if (modemState == STATE_DMRCAL || modemState == STATE_DMRDMO1K || modemState == STATE_RSSICAL || modemState == STATE_INTCAL)
m_firstCal = true; m_firstCal = true;
return 0U; return 0U;
@ -356,7 +356,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
if (modemState == m_modemState) if (modemState == m_modemState)
return 0U; return 0U;
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_RSSICAL) if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_RSSICAL && modemState != STATE_INTCAL)
return 4U; return 4U;
if (modemState == STATE_DSTAR && !m_dstarEnable) if (modemState == STATE_DSTAR && !m_dstarEnable)
return 4U; return 4U;
@ -371,7 +371,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
if (modemState == STATE_POCSAG && !m_pocsagEnable) if (modemState == STATE_POCSAG && !m_pocsagEnable)
return 4U; return 4U;
if (modemState == STATE_DMRCAL || modemState == STATE_DMRDMO1K || modemState == STATE_RSSICAL) { if (modemState == STATE_DMRCAL || modemState == STATE_DMRDMO1K || modemState == STATE_RSSICAL || modemState == STATE_INTCAL) {
m_dmrEnable = true; m_dmrEnable = true;
tmpState = STATE_DMR; tmpState = STATE_DMR;
m_calState = modemState; m_calState = modemState;
@ -589,7 +589,7 @@ void CSerialPort::process()
case MMDVM_CAL_DATA: case MMDVM_CAL_DATA:
if (m_calState == STATE_DMRCAL || m_calState == STATE_DMRDMO1K) { if (m_calState == STATE_DMRCAL || m_calState == STATE_DMRDMO1K) {
err = calDMR.write(m_buffer + 3U, m_len - 3U); err = calDMR.write(m_buffer + 3U, m_len - 3U);
} else if (m_calState == STATE_RSSICAL) { } else if (m_calState == STATE_RSSICAL || m_calState == STATE_INTCAL) {
err = 0U; err = 0U;
} }
if (err == 0U) { if (err == 0U) {
@ -1129,12 +1129,11 @@ void CSerialPort::writeRSSIData(const uint8_t* data, uint8_t length)
#endif #endif
#if defined(ENABLE_DEBUG) #if defined(ENABLE_DEBUG)
void CSerialPort::writeDebug(const char* text) void CSerialPort::writeDebug(const char* text)
{ {
if (!m_debug) if (!m_debug)
return; return;
uint8_t reply[130U]; uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START; reply[0U] = MMDVM_FRAME_START;
@ -1154,7 +1153,7 @@ void CSerialPort::writeDebugI(const char* text, int32_t n1)
{ {
if (!m_debug) if (!m_debug)
return; return;
uint8_t reply[130U]; uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START; reply[0U] = MMDVM_FRAME_START;
@ -1180,7 +1179,7 @@ void CSerialPort::writeDebug(const char* text, int16_t n1)
{ {
if (!m_debug) if (!m_debug)
return; return;
uint8_t reply[130U]; uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START; reply[0U] = MMDVM_FRAME_START;
@ -1198,12 +1197,13 @@ void CSerialPort::writeDebug(const char* text, int16_t n1)
writeInt(1U, reply, count, true); writeInt(1U, reply, count, true);
} }
#endif
void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2) void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2)
{ {
if (!m_debug) if (!m_debug)
return; return;
uint8_t reply[130U]; uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START; reply[0U] = MMDVM_FRAME_START;
@ -1225,11 +1225,12 @@ void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2)
writeInt(1U, reply, count, true); writeInt(1U, reply, count, true);
} }
#if defined(ENABLE_DEBUG)
void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3) void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3)
{ {
if (!m_debug) if (!m_debug)
return; return;
uint8_t reply[130U]; uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START; reply[0U] = MMDVM_FRAME_START;
@ -1285,6 +1286,4 @@ void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n
writeInt(1U, reply, count, true); writeInt(1U, reply, count, true);
} }
#endif #endif

5
SerialPort.h
Unescape View File

@ -56,10 +56,10 @@ public:
void writeDebug(const char* text); void writeDebug(const char* text);
void writeDebug(const char* text, int16_t n1); void writeDebug(const char* text, int16_t n1);
void writeDebugI(const char* text, int32_t n1); void writeDebugI(const char* text, int32_t n1);
void writeDebug(const char* text, int16_t n1, int16_t n2);
void writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3); void writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3);
void writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3, int16_t n4); void writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3, int16_t n4);
#endif #endif
void writeDebug(const char* text, int16_t n1, int16_t n2);
private: private:
uint8_t m_buffer[256U]; uint8_t m_buffer[256U];
@ -76,7 +76,7 @@ private:
uint8_t setMode(const uint8_t* data, uint8_t length); uint8_t setMode(const uint8_t* data, uint8_t length);
void setMode(MMDVM_STATE modemState); void setMode(MMDVM_STATE modemState);
uint8_t setFreq(const uint8_t* data, uint8_t length); uint8_t setFreq(const uint8_t* data, uint8_t length);
// Hardware versions // Hardware versions
void beginInt(uint8_t n, int speed); void beginInt(uint8_t n, int speed);
int availableInt(uint8_t n); int availableInt(uint8_t n);
@ -85,4 +85,3 @@ private:
}; };
#endif #endif

4
version.h
Unescape View File

@ -24,8 +24,8 @@
#define VER_MAJOR "1" #define VER_MAJOR "1"
#define VER_MINOR "4" #define VER_MINOR "4"
#define VER_REV "11" #define VER_REV "12"
#define VERSION_DATE "20181028" #define VERSION_DATE "20181104"
#if defined(ZUMSPOT_ADF7021) #if defined(ZUMSPOT_ADF7021)
#define BOARD_INFO "ZUMspot" #define BOARD_INFO "ZUMspot"

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