Fix power level bit length for ADF7021

ADF7021.cpp

@@ -627,7 +627,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
 
   // MODULATION (2)
   ADF7021_REG2 |= (uint32_t) 0b0010;                  // register 2
-  ADF7021_REG2 |= (uint32_t) m_power       << 13;  // power level
+  ADF7021_REG2 |= (uint32_t) (m_power & 0x3F) << 13;  // power level
   ADF7021_REG2 |= (uint32_t) 0b110001         << 7;   // PA  
   AD7021_control_word = ADF7021_REG2;
   Send_AD7021_control2();
@@ -786,7 +786,6 @@ void CIO::interrupt2()
 }
 #endif
 
-//======================================================================================================================
 void CIO::setTX()
 { 
   // PTT pin on (doing it earlier helps to measure timing impact)
@@ -806,7 +805,6 @@ void CIO::setTX()
   while(CLK_pin());
 }
 
-//======================================================================================================================
 void CIO::setRX(bool doSle)
 { 
   // PTT pin off (doing it earlier helps to measure timing impact)
@@ -827,6 +825,11 @@ void CIO::setRX(bool doSle)
   }
 }
 
+void CIO::setPower(uint8_t power)
+{
+  m_power = power >> 2;
+}
+
 uint32_t CIO::RXfreq()
 {
   return (uint32_t)((float)(ADF7021_PFD / f_div) * ((float)((32768 * m_RX_N_divider) + m_RX_F_divider) / 32768.0)) + 100000;

IO.cpp

@@ -269,7 +269,7 @@ bool CIO::hasRXOverflow()
 uint8_t CIO::setFreq(uint32_t frequency_rx, uint32_t frequency_tx, uint8_t rf_power)
 {
   // Configure power level
-  m_power = rf_power;
+  setPower(rf_power);
 
   // Check frequency ranges
   if( !( ((frequency_rx >= VHF1_MIN)&&(frequency_rx < VHF1_MAX)) || ((frequency_tx >= VHF1_MIN)&&(frequency_tx < VHF1_MAX)) || \

IO.h

@@ -92,6 +92,7 @@ public:
   bool      hasTXOverflow(void);
   bool      hasRXOverflow(void);
   uint8_t   setFreq(uint32_t frequency_rx, uint32_t frequency_tx, uint8_t rf_power);
+  void      setPower(uint8_t power);
   void      setMode(MMDVM_STATE modemState);
   void      setDecode(bool dcd);
   void      setLoDevYSF(bool ysfLoDev);