ensure CSBKs for TSCC are written on the TSCC slot and not on the slot the request came in on; slow down generation of TSCC CC stream packets to double the slot size (60ms);

2.0-maint
Bryan Biedenkapp 3 years ago
parent a10c64b950
commit 0ea57c37c8

@ -137,6 +137,15 @@ namespace dmr
const uint32_t DEFAULT_SILENCE_THRESHOLD = 21U; const uint32_t DEFAULT_SILENCE_THRESHOLD = 21U;
const uint32_t MAX_DMR_VOICE_ERRORS = 141U; const uint32_t MAX_DMR_VOICE_ERRORS = 141U;
const uint32_t DMR_WUID_SUPLI = 0xFFFEC4U;
const uint32_t DMR_WUID_SDMI = 0xFFFEC5U;
const uint32_t DMR_WUID_REGI = 0xFFFEC6U;
const uint32_t DMR_WUID_STUNI = 0xFFFECCU;
const uint32_t DMR_WUID_AUTHI = 0xFFFECDU;
const uint32_t DMR_WUID_KILLI = 0xFFFECFU;
const uint32_t DMR_WUID_TATTSI = 0xFFFED7U;
const uint32_t DMR_WUID_ALL = 0xFFFFFFU;
// PDU Data Formats // PDU Data Formats
const uint8_t DPF_UDT = 0x00U; const uint8_t DPF_UDT = 0x00U;
const uint8_t DPF_RESPONSE = 0x01U; const uint8_t DPF_RESPONSE = 0x01U;

@ -135,7 +135,7 @@ Slot::Slot(uint32_t slotNo, uint32_t timeout, uint32_t tgHang, uint32_t queueSiz
m_rfTGHang(1000U, tgHang), m_rfTGHang(1000U, tgHang),
m_netTimeoutTimer(1000U, timeout), m_netTimeoutTimer(1000U, timeout),
m_packetTimer(1000U, 0U, 50U), m_packetTimer(1000U, 0U, 50U),
m_ccPacketInterval(1000U, 0U, 5U), m_ccPacketInterval(1000U, 0U, 60U),
m_interval(), m_interval(),
m_elapsed(), m_elapsed(),
m_rfFrames(0U), m_rfFrames(0U),

@ -568,37 +568,50 @@ ControlSignaling::~ControlSignaling()
/// <param name="clearBeforeWrite"></param> /// <param name="clearBeforeWrite"></param>
void ControlSignaling::writeRF_CSBK(lc::CSBK csbk, bool clearBeforeWrite) void ControlSignaling::writeRF_CSBK(lc::CSBK csbk, bool clearBeforeWrite)
{ {
uint8_t data[DMR_FRAME_LENGTH_BYTES + 2U]; Slot *m_tscc = m_slot->m_dmr->getTSCCSlot();
::memset(data + 2U, 0x00U, DMR_FRAME_LENGTH_BYTES); if (m_tscc != NULL) {
if (!m_tscc->m_enableTSCC)
return;
SlotType slotType; // don't add any frames if the queue is full
slotType.setColorCode(m_slot->m_colorCode); uint8_t len = DMR_FRAME_LENGTH_BYTES + 2U;
slotType.setDataType(DT_CSBK); uint32_t space = m_tscc->m_queue.freeSpace();
if (space < (len + 1U)) {
return;
}
// Regenerate the CSBK data uint8_t data[DMR_FRAME_LENGTH_BYTES + 2U];
csbk.encode(data + 2U); ::memset(data + 2U, 0x00U, DMR_FRAME_LENGTH_BYTES);
// Regenerate the Slot Type SlotType slotType;
slotType.encode(data + 2U); slotType.setColorCode(m_tscc->m_colorCode);
slotType.setDataType(DT_CSBK);
// Convert the Data Sync to be from the BS or MS as needed // Regenerate the CSBK data
Sync::addDMRDataSync(data + 2U, m_slot->m_duplex); csbk.encode(data + 2U);
m_slot->m_rfSeqNo = 0U; // Regenerate the Slot Type
slotType.encode(data + 2U);
data[0U] = modem::TAG_DATA; // Convert the Data Sync to be from the BS or MS as needed
data[1U] = 0x00U; Sync::addDMRDataSync(data + 2U, m_tscc->m_duplex);
if (clearBeforeWrite) { m_tscc->m_rfSeqNo = 0U;
if (m_slot->m_slotNo == 1U)
m_slot->m_modem->clearDMRData1(); data[0U] = modem::TAG_DATA;
if (m_slot->m_slotNo == 2U) data[1U] = 0x00U;
m_slot->m_modem->clearDMRData2();
m_slot->m_queue.clear(); if (clearBeforeWrite) {
} if (m_tscc->m_slotNo == 1U)
m_tscc->m_modem->clearDMRData1();
if (m_tscc->m_slotNo == 2U)
m_tscc->m_modem->clearDMRData2();
m_tscc->m_queue.clear();
}
if (m_slot->m_duplex) if (m_tscc->m_duplex)
m_slot->addFrame(data); m_tscc->addFrame(data);
}
} }
/// <summary> /// <summary>
@ -624,6 +637,8 @@ void ControlSignaling::writeRF_CSBK_ACK_RSP(uint8_t reason, uint8_t service)
/// <param name="srcId"></param> /// <param name="srcId"></param>
void ControlSignaling::writeRF_CSBK_U_Reg_Rsp(uint32_t srcId) void ControlSignaling::writeRF_CSBK_U_Reg_Rsp(uint32_t srcId)
{ {
Slot *m_tscc = m_slot->m_dmr->getTSCCSlot();
lc::CSBK csbk = lc::CSBK(m_slot->m_siteData, m_slot->m_idenEntry, m_slot->m_dumpCSBKData); lc::CSBK csbk = lc::CSBK(m_slot->m_siteData, m_slot->m_idenEntry, m_slot->m_dumpCSBKData);
csbk.setVerbose(m_dumpCSBKData); csbk.setVerbose(m_dumpCSBKData);
csbk.setCSBKO(CSBKO_ACK_RSP); csbk.setCSBKO(CSBKO_ACK_RSP);
@ -633,14 +648,14 @@ void ControlSignaling::writeRF_CSBK_U_Reg_Rsp(uint32_t srcId)
// validate the source RID // validate the source RID
if (!acl::AccessControl::validateSrcId(srcId)) { if (!acl::AccessControl::validateSrcId(srcId)) {
LogWarning(LOG_RF, "DMR Slot %u, DT_CSBK, CSBKO_RAND (Random Access), SVC_KIND_REG_SVC (Registration Service), denial, RID rejection, srcId = %u", m_slot->m_slotNo, srcId); LogWarning(LOG_RF, "DMR Slot %u, DT_CSBK, CSBKO_RAND (Random Access), SVC_KIND_REG_SVC (Registration Service), denial, RID rejection, srcId = %u", m_tscc->m_slotNo, srcId);
::ActivityLog("DMR", true, "unit registration request from %u denied", srcId); ::ActivityLog("DMR", true, "unit registration request from %u denied", srcId);
csbk.setReason(TS_DENY_RSN_REG_DENIED); csbk.setReason(TS_DENY_RSN_REG_DENIED);
} }
if (csbk.getReason() == TS_ACK_RSN_REG) { if (csbk.getReason() == TS_ACK_RSN_REG) {
if (m_verbose) { if (m_verbose) {
LogMessage(LOG_RF, "DMR Slot %u, DT_CSBK, CSBKO_RAND (Random Access), SVC_KIND_REG_SVC (Registration Service), srcId = %u", m_slot->m_slotNo, srcId); LogMessage(LOG_RF, "DMR Slot %u, DT_CSBK, CSBKO_RAND (Random Access), SVC_KIND_REG_SVC (Registration Service), srcId = %u", m_tscc->m_slotNo, srcId);
} }
::ActivityLog("DMR", true, "unit registration request from %u", srcId); ::ActivityLog("DMR", true, "unit registration request from %u", srcId);
@ -651,7 +666,7 @@ void ControlSignaling::writeRF_CSBK_U_Reg_Rsp(uint32_t srcId)
} }
} }
csbk.setSrcId(srcId); csbk.setSrcId(DMR_WUID_REGI);
csbk.setDstId(srcId); csbk.setDstId(srcId);
writeRF_CSBK(csbk); writeRF_CSBK(csbk);

Loading…
Cancel
Save

Powered by TurnKey Linux.