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correct edge case situation where discriminator or post bandwidth may be set when they shouldn't be; cleanup bad references to the ADF7021's REG13 reference (the old code worked fine, but used magic numbers instead of proper named defines); add more verbose register debug output from the modem; display NXDN sync values copied to the bit buffer and not the sync bytes;

Browse Source
pull/4/head 2023-12-18
Bryan Biedenkapp 2 years ago
parent f1a60d4da9
commit 77037d132d
3 changed files with 65 additions and 47 deletions
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106
ADF7021.cpp
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@ -895,49 +895,61 @@ void IO::configureTxRx(DVM_STATE modemState)
uint16_t nxdnDiscBW = ADF7021_DISC_BW_NXDN, nxdnPostBW = ADF7021_POST_BW_NXDN; uint16_t nxdnDiscBW = ADF7021_DISC_BW_NXDN, nxdnPostBW = ADF7021_POST_BW_NXDN;
// configure DMR discriminator and post demodulator BW // configure DMR discriminator and post demodulator BW
if (dmrDiscBW + m_dmrDiscBWAdj < 0U) if (m_dmrDiscBWAdj != 0) {
dmrDiscBW = 0U; if (dmrDiscBW + m_dmrDiscBWAdj < 0)
else dmrDiscBW = 0U;
dmrDiscBW = ADF7021_DISC_BW_DMR + m_dmrDiscBWAdj; else
if (dmrDiscBW > ADF7021_DISC_BW_MAX) dmrDiscBW = ADF7021_DISC_BW_DMR + m_dmrDiscBWAdj;
dmrDiscBW = ADF7021_DISC_BW_MAX; if (dmrDiscBW > ADF7021_DISC_BW_MAX)
dmrDiscBW = ADF7021_DISC_BW_MAX;
}
if (dmrPostBW + m_dmrPostBWAdj < 0) if (m_dmrPostBWAdj != 0) {
dmrPostBW = 0U; if (dmrPostBW + m_dmrPostBWAdj < 0)
else dmrPostBW = 0U;
dmrPostBW = ADF7021_POST_BW_DMR + m_dmrPostBWAdj; else
if (dmrPostBW > ADF7021_POST_BW_MAX) dmrPostBW = ADF7021_POST_BW_DMR + m_dmrPostBWAdj;
dmrPostBW = ADF7021_POST_BW_MAX; if (dmrPostBW > ADF7021_POST_BW_MAX)
dmrPostBW = ADF7021_POST_BW_MAX;
}
// configure P25 discriminator and post demodulator BW // configure P25 discriminator and post demodulator BW
if (p25DiscBW + m_p25DiscBWAdj < 0U) if (m_p25DiscBWAdj != 0) {
p25DiscBW = 0U; if (p25DiscBW + m_p25DiscBWAdj < 0)
else p25DiscBW = 0U;
p25DiscBW = ADF7021_DISC_BW_P25 + m_p25DiscBWAdj; else
if (p25DiscBW > ADF7021_DISC_BW_MAX) p25DiscBW = ADF7021_DISC_BW_P25 + m_p25DiscBWAdj;
p25DiscBW = ADF7021_DISC_BW_MAX; if (p25DiscBW > ADF7021_DISC_BW_MAX)
p25DiscBW = ADF7021_DISC_BW_MAX;
}
if (p25PostBW + m_p25PostBWAdj < 0) if (m_p25PostBWAdj != 0) {
p25PostBW = 0U; if (p25PostBW + m_p25PostBWAdj < 0)
else p25PostBW = 0U;
p25PostBW = ADF7021_POST_BW_P25 + m_p25PostBWAdj; else
if (p25PostBW > ADF7021_POST_BW_MAX) p25PostBW = ADF7021_POST_BW_P25 + m_p25PostBWAdj;
p25PostBW = ADF7021_POST_BW_MAX; if (p25PostBW > ADF7021_POST_BW_MAX)
p25PostBW = ADF7021_POST_BW_MAX;
}
// configure NXDN discriminator and post demodulator BW // configure NXDN discriminator and post demodulator BW
if (nxdnDiscBW + m_nxdnDiscBWAdj < 0U) if (m_nxdnDiscBWAdj != 0) {
nxdnDiscBW = 0U; if (nxdnDiscBW + m_nxdnDiscBWAdj < 0)
else nxdnDiscBW = 0U;
nxdnDiscBW = ADF7021_DISC_BW_NXDN + m_nxdnDiscBWAdj; else
if (nxdnDiscBW > ADF7021_DISC_BW_MAX) nxdnDiscBW = ADF7021_DISC_BW_NXDN + m_nxdnDiscBWAdj;
nxdnDiscBW = ADF7021_DISC_BW_MAX; if (nxdnDiscBW > ADF7021_DISC_BW_MAX)
nxdnDiscBW = ADF7021_DISC_BW_MAX;
}
if (nxdnPostBW + m_nxdnPostBWAdj < 0) if (m_nxdnPostBWAdj != 0) {
nxdnPostBW = 0U; if (nxdnPostBW + m_nxdnPostBWAdj < 0)
else nxdnPostBW = 0U;
nxdnPostBW = ADF7021_POST_BW_NXDN + m_nxdnPostBWAdj; else
if (nxdnPostBW > ADF7021_POST_BW_MAX) nxdnPostBW = ADF7021_POST_BW_NXDN + m_nxdnPostBWAdj;
nxdnPostBW = ADF7021_POST_BW_MAX; if (nxdnPostBW > ADF7021_POST_BW_MAX)
nxdnPostBW = ADF7021_POST_BW_MAX;
}
/* /*
** Configure the remaining registers based on modem state. ** Configure the remaining registers based on modem state.
@ -1007,7 +1019,7 @@ void IO::configureTxRx(DVM_STATE modemState)
/* /*
** 3FSK/4FSK Demod (Register 13) ** 3FSK/4FSK Demod (Register 13)
*/ */
ADF7021_REG13 = (uint32_t)0b1101 << 0; // Register Address 13 ADF7021_REG13 = (uint32_t)ADF7021_REG13_ADDR; // Register Address 13
ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_DMR << 4; // Slicer Threshold ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_DMR << 4; // Slicer Threshold
/* /*
@ -1086,7 +1098,7 @@ void IO::configureTxRx(DVM_STATE modemState)
/* /*
** 3FSK/4FSK Demod (Register 13) ** 3FSK/4FSK Demod (Register 13)
*/ */
ADF7021_REG13 = (uint32_t)0b1101 << 0; // Register Address 13 ADF7021_REG13 = (uint32_t)ADF7021_REG13_ADDR; // Register Address 13
ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_DMR << 4; // Slicer Threshold ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_DMR << 4; // Slicer Threshold
/* /*
@ -1165,7 +1177,7 @@ void IO::configureTxRx(DVM_STATE modemState)
/* /*
** 3FSK/4FSK Demod (Register 13) ** 3FSK/4FSK Demod (Register 13)
*/ */
ADF7021_REG13 = (uint32_t)ADF70210_REG13_ADDR; // Register Address 13 ADF7021_REG13 = (uint32_t)ADF7021_REG13_ADDR; // Register Address 13
ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_P25 << 4; // Slicer Threshold ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_P25 << 4; // Slicer Threshold
/* /*
@ -1256,7 +1268,7 @@ void IO::configureTxRx(DVM_STATE modemState)
/* /*
** 3FSK/4FSK Demod (Register 13) ** 3FSK/4FSK Demod (Register 13)
*/ */
ADF7021_REG13 = (uint32_t)ADF70210_REG13_ADDR; // Register Address 13 ADF7021_REG13 = (uint32_t)ADF7021_REG13_ADDR; // Register Address 13
ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_NXDN << 4; // Slicer Threshold ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_NXDN << 4; // Slicer Threshold
/* /*
@ -1334,7 +1346,7 @@ void IO::configureTxRx(DVM_STATE modemState)
/* /*
** 3FSK/4FSK Demod (Register 13) ** 3FSK/4FSK Demod (Register 13)
*/ */
ADF7021_REG13 = (uint32_t)ADF70210_REG13_ADDR; // Register Address 13 ADF7021_REG13 = (uint32_t)ADF7021_REG13_ADDR; // Register Address 13
ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_DEFAULT << 4; // Slicer Threshold ADF7021_REG13 |= (uint32_t)ADF7021_SLICER_TH_DEFAULT << 4; // Slicer Threshold
/* /*
@ -1351,9 +1363,15 @@ void IO::configureTxRx(DVM_STATE modemState)
break; break;
} }
DEBUG5("IO::configureTxRx(): configuring ADF Tx/Rx values; dmrDiscBW/dmrPostBW/p25DiscBW/p25PostBW", dmrDiscBW, dmrPostBW, p25DiscBW, p25PostBW); DEBUG3("IO::configureTxRx(): ADF7021_REG3 =", (ADF7021_REG3 >> 16 & 0xFFFFU), (ADF7021_REG3 & 0xFFFFU));
DEBUG3("IO::configureTxRx(): configuring ADF Tx/Rx values; nxdnDiscBW/nxdnPostBW", nxdnDiscBW, nxdnPostBW); DEBUG3("IO::configureTxRx(): ADF7021_REG10 =", (ADF7021_REG10 >> 16 & 0xFFFFU), (ADF7021_REG10 & 0xFFFFU));
DEBUG5("IO::configureTxRx(): configuring ADF Tx/Rx values; dmrSymDev/p25SymDev/nxdnSymDev/rfPower", (uint16_t)((ADF7021_PFD * dmrDev) / (f_div * 65536)), DEBUG3("IO::configureTxRx(): ADF7021_REG4 =", (ADF7021_REG4 >> 16 & 0xFFFFU), (ADF7021_REG4 & 0xFFFFU));
DEBUG3("IO::configureTxRx(): ADF7021_REG13 =", (ADF7021_REG13 >> 16 & 0xFFFFU), (ADF7021_REG13 & 0xFFFFU));
DEBUG3("IO::configureTxRx(): ADF7021_REG2 =", (ADF7021_REG2 >> 16 & 0xFFFFU), (ADF7021_REG3 & 0xFFFFU));
DEBUG5("IO::configureTxRx(): ADF Tx/Rx values; dmrDiscBW/dmrPostBW/p25DiscBW/p25PostBW", dmrDiscBW, dmrPostBW, p25DiscBW, p25PostBW);
DEBUG3("IO::configureTxRx(): ADF Tx/Rx values; nxdnDiscBW/nxdnPostBW", nxdnDiscBW, nxdnPostBW);
DEBUG5("IO::configureTxRx(): ADF Tx/Rx values; dmrSymDev/p25SymDev/nxdnSymDev/rfPower", (uint16_t)((ADF7021_PFD * dmrDev) / (f_div * 65536)),
(uint16_t)((ADF7021_PFD * p25Dev) / (f_div * 65536)), (uint16_t)((ADF7021_PFD * nxdnDev) / (f_div * 65536)), m_rfPower); (uint16_t)((ADF7021_PFD * p25Dev) / (f_div * 65536)), (uint16_t)((ADF7021_PFD * nxdnDev) / (f_div * 65536)), m_rfPower);
} }

2
ADF7021.h
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@ -310,7 +310,7 @@
/* /*
** 3FSK/4FSK Demod (Register 13) ** 3FSK/4FSK Demod (Register 13)
*/ */
#define ADF70210_REG13_ADDR 0b1101 #define ADF7021_REG13_ADDR 0b1101
// Slicer threshold for 4FSK demodulator // Slicer threshold for 4FSK demodulator
#define ADF7021_SLICER_TH_DEFAULT 0U #define ADF7021_SLICER_TH_DEFAULT 0U

4
nxdn/NXDNRX.cpp
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@ -179,10 +179,10 @@ bool NXDNRX::correlateSync(bool first)
sync[1U] = (uint8_t)((m_bitBuffer >> 8) & NXDN_FSW_BYTES_MASK[1U]); sync[1U] = (uint8_t)((m_bitBuffer >> 8) & NXDN_FSW_BYTES_MASK[1U]);
sync[2U] = (uint8_t)((m_bitBuffer >> 0) & NXDN_FSW_BYTES_MASK[2U]); sync[2U] = (uint8_t)((m_bitBuffer >> 0) & NXDN_FSW_BYTES_MASK[2U]);
DEBUG4("NXDNRX: correlateSync(): sync [b0 - b2]", sync[0], sync[1], sync[2]);
for (uint8_t i = 0U; i < NXDN_FSW_BYTES_LENGTH; i++) for (uint8_t i = 0U; i < NXDN_FSW_BYTES_LENGTH; i++)
m_buffer[i] = sync[i]; m_buffer[i] = sync[i];
DEBUG4("NXDNRX: correlateSync(): sync [b0 - b2]", m_buffer[0], m_buffer[1], m_buffer[2]);
} }
m_lostCount = MAX_FSW_FRAMES; m_lostCount = MAX_FSW_FRAMES;

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