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175 lines
5.0 KiB
175 lines
5.0 KiB
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "hal.h"
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#include "stm32_gpio.h"
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typedef struct {
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uint32_t moder;
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uint32_t otyper;
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uint32_t ospeedr;
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uint32_t pupdr;
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uint32_t odr;
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uint32_t afrl;
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uint32_t afrh;
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} gpio_setup_t;
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typedef struct {
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#if STM32_HAS_GPIOA
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gpio_setup_t PAData;
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#endif
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#if STM32_HAS_GPIOB
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gpio_setup_t PBData;
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#endif
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#if STM32_HAS_GPIOC
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gpio_setup_t PCData;
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#endif
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#if STM32_HAS_GPIOD
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gpio_setup_t PDData;
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#endif
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#if STM32_HAS_GPIOE
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gpio_setup_t PEData;
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#endif
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#if STM32_HAS_GPIOF
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gpio_setup_t PFData;
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#endif
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} gpio_config_t;
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static const gpio_config_t gpio_default_config = {
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#if STM32_HAS_GPIOA
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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#endif
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#if STM32_HAS_GPIOB
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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#endif
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#if STM32_HAS_GPIOC
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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#endif
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#if STM32_HAS_GPIOD
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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#endif
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#if STM32_HAS_GPIOE
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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#endif
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#if STM32_HAS_GPIOF
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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#endif
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#if STM32_HAS_GPIOG
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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#endif
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#if STM32_HAS_GPIOH
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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#endif
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#if STM32_HAS_GPIOI
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
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VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
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#endif
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};
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static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
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gpiop->OTYPER = config->otyper;
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gpiop->OSPEEDR = config->ospeedr;
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gpiop->PUPDR = config->pupdr;
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gpiop->ODR = config->odr;
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gpiop->AFRL = config->afrl;
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gpiop->AFRH = config->afrh;
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gpiop->MODER = config->moder;
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}
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static void stm32_gpio_init(void) {
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rccResetAHB(STM32_GPIO_EN_MASK);
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rccEnableAHB(STM32_GPIO_EN_MASK, true);
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#if STM32_HAS_GPIOA
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gpio_init(GPIOA, &gpio_default_config.PAData);
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#endif
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#if STM32_HAS_GPIOB
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gpio_init(GPIOB, &gpio_default_config.PBData);
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#endif
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#if STM32_HAS_GPIOC
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gpio_init(GPIOC, &gpio_default_config.PCData);
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#endif
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#if STM32_HAS_GPIOD
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gpio_init(GPIOD, &gpio_default_config.PDData);
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#endif
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#if STM32_HAS_GPIOE
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gpio_init(GPIOE, &gpio_default_config.PEData);
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#endif
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#if STM32_HAS_GPIOF
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gpio_init(GPIOF, &gpio_default_config.PFData);
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#endif
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}
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static bool needDFU(void) {
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// Magick data in memory before reset
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if (*((unsigned long *)BOOT_FROM_SYTEM_MEMORY_MAGIC_ADDRESS) == BOOT_FROM_SYTEM_MEMORY_MAGIC)
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return true;
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// init PortA (leveler port) and check press
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rccEnableAHB(STM32_GPIO_EN_MASK, FALSE);
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GPIOA->OTYPER = VAL_GPIOA_OTYPER;
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GPIOA->OSPEEDR = VAL_GPIOA_OSPEEDR;
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GPIOA->PUPDR = VAL_GPIOA_PUPDR;
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GPIOA->ODR = VAL_GPIOA_ODR;
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GPIOA->AFRL = VAL_GPIOA_AFRL;
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GPIOA->AFRH = VAL_GPIOA_AFRH;
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GPIOA->MODER = VAL_GPIOA_MODER;
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if (palReadPort(GPIOA) & (1<<GPIOA_PUSH)) {
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while(palReadPort(GPIOA) & (1<<GPIOA_PUSH)) {}; // Wait press
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return true;
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}
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return false;
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}
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//extern void si5351_setup(void);
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) {
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if (needDFU()) {
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// require irq
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__enable_irq();
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// reset magic bytes
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*((unsigned long *)BOOT_FROM_SYTEM_MEMORY_MAGIC_ADDRESS) = 0;
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// remap memory. unneeded for F072?
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// RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
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// SYSCFG->CFGR1 = 0x01;
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// set msp for system memory
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__set_MSP(SYSTEM_BOOT_MSP);
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// jump to system memory
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( (void (*)(void)) (*((uint32_t *)(STM32F072xB_SYSTEM_MEMORY+4))) )();
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while (1);
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}
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//si5351_setup();
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stm32_gpio_init();
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stm32_clock_init();
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}
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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}
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