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269 lines
8.5 KiB
269 lines
8.5 KiB
/*
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* Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com
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* All rights reserved.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3, or (at your option)
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* any later version.
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*
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* The software is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNU Radio; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "ch.h"
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#include "hal.h"
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#include "nanovna.h"
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#define ADC_FULL_SCALE 3300
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#define F303_ADC_VREF_ALWAYS_ON
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#define ADC_CHSELR_VREFINT ADC_CHANNEL_IN18
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#define ADC_CHSELR_VBAT ADC_CHANNEL_IN17
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#define ADC_TOUCH_SMP_TIME ADC_SMPR_SMP_1P5
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#define ADC_TOUCH_XY_SMP_TIME ADC_SMPR_SMP_601P5
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#define ADC_VBAT_SMP_TIME ADC_SMPR_SMP_601P5
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#define ADC_GRP_NUM_CHANNELS_VBAT 2
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static adcsample_t samplesVBAT[ADC_GRP_NUM_CHANNELS_VBAT];
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static adcsample_t samples[1];
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static const ADCConversionGroup adcgrpcfgVBAT = {
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FALSE,
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ADC_GRP_NUM_CHANNELS_VBAT,
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NULL,
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NULL,
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ADC_CFGR_CONT | ADC_CFGR1_RES_12BIT, // CFGR1
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ADC_TR(0, 0), // ADC watchdog threshold TR1
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{0, ADC_SMPR2_SMP_AN16(ADC_VBAT_SMP_TIME) | ADC_SMPR2_SMP_AN17(ADC_VBAT_SMP_TIME)/*| ADC_SMPR2_SMP_AN18(ADC_VBAT_SMP_TIME)*/}, // SMPR
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{ADC_SQR1_SQ1_N(ADC_CHANNEL_IN17) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN18)/*| ADC_SQR1_SQ3_N(ADC_CHANNEL_IN16)*/, 0, 0, 0} // CHSELR
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};
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static const ADCConversionGroup adcgrpcfgVersion = {
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FALSE,
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1,
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NULL,
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NULL,
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ADC_CFGR1_RES_12BIT, // CFGR1
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ADC_TR(0, 0), // ADC watchdog threshold TR1
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{ADC_SMPR1_SMP_AN1(ADC_TOUCH_XY_SMP_TIME), 0}, /* SMPR[2] */
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{ADC_SQR1_SQ1_N(ADC_CHANNEL_IN1), 0, 0, 0} /* SQR[4] */
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};
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static const ADCConversionGroup adcgrpcfgTouch = {
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TRUE, // Enables the circular buffer mode for the group.
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1, // Number of the analog channels belonging to the conversion group.
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NULL, // adccallback_touch
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NULL, // adcerrorcallback_touch
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// CFGR
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ADC_CFGR_EXTEN_0 // rising edge of external trigger
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| ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0 // EXT4 0x1001 event (TIM1_TRGO)
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// | ADC_CFGR_EXTSEL_2 // EXT4 0x100 event (TIM3_TRGO)
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| ADC_CFGR_AWD1EN, // Enable Analog watchdog check interrupt
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ADC_TR(0, TOUCH_THRESHOLD), // Analog watchdog threshold TR1, interrupt on touch press
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{ADC_SMPR1_SMP_AN4(ADC_TOUCH_SMP_TIME), 0}, // SMPR[2]
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{ADC_SQR1_SQ1_N(ADC_CHANNEL_IN4), 0, 0, 0} // SQR[4]
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};
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static ADCConversionGroup adcgrpcfgXY = {
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FALSE,
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1,
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NULL, /* adccallback_touch */
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NULL, /* adcerrorcallback_touch */
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ADC_CFGR1_RES_12BIT, /* CFGR */
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ADC_TR(0, 0), /* TR1 */
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{ADC_SMPR1_SMP_AN3(ADC_TOUCH_XY_SMP_TIME) | ADC_SMPR1_SMP_AN4(ADC_TOUCH_XY_SMP_TIME), 0}, /* SMPR[2] */
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{ADC_SQR1_SQ1_N(ADC_CHANNEL_IN3), 0, 0, 0} /* SQR[4] */
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};
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void adc_init(void)
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{
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adcStart(&ADCD2, NULL);
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adcStart(&ADCD1, NULL);
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#ifdef F303_ADC_VREF_ALWAYS_ON
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adcSTM32EnableVBAT(&ADCD1);
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adcSTM32EnableVREF(&ADCD1);
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// adcSTM32EnableTS(&ADCD1);
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#endif
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}
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uint16_t adc_single_read(uint32_t chsel)
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{
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/* ADC setup */
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// adcStart(&ADCD2, NULL);
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adcgrpcfgXY.sqr[0] = ADC_SQR1_SQ1_N(chsel);
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adcConvert(&ADCD2, &adcgrpcfgXY, samples, 1);
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return(samples[0]);
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}
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uint16_t adc1_single_read(uint32_t chsel)
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{
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(void)chsel;
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/* ADC setup */
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adcConvert(&ADCD1, &adcgrpcfgVersion, samples, 1);
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return(samples[0]);
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}
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int16_t adc_vbat_read(void)
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{
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// Vbat measure averange count = 2^VBAT_AVERAGE
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#define VBAT_AVERAGE 4
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// Measure vbat every 5 second
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#define VBAT_MEASURE_INTERVAL S2ST(5)
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static int16_t vbat_raw = 0;
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static systime_t vbat_time = -VBAT_MEASURE_INTERVAL-1;
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systime_t _time = chVTGetSystemTimeX();
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if (_time - vbat_time < VBAT_MEASURE_INTERVAL)
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goto return_cached;
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vbat_time = _time;
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uint16_t VREFINT_CAL = (*((uint16_t*)0x1FFFF7BA));
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uint32_t vrefint = 0;
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uint32_t vbat = 0;
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// const uint16_t V25 = 1750;// when V25=1.41V at ref 3.3V
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// const uint16_t Avg_Slope = 5; //when avg_slope=4.3mV/C at ref 3.3V
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// uint16_t temperature_cal1 = *((uint16_t*) ((uint32_t)0x1FFFF7B8U));
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// /* Internal temperature sensor, address of parameter TS_CAL1: On STM32F3,
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// temperature sensor ADC raw data acquired at temperature 25 DegC (tolerance: +-5 DegC),
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// Vref+ = 3.3 V (tolerance: +-10 mV). */
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// uint16_t temperature_cal2 = *((uint16_t*) ((uint32_t)0x1FFFF7C2U));
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// /* Internal temperature sensor, address of parameter TS_CAL2: On STM32F3,
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// temperature sensor ADC raw data acquired at temperature 110 DegC (tolerance: +-5 DegC),
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// Vref+ = 3.3 V (tolerance: +-10 mV). */
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// float avg_slope = ((float)(temperature_cal1 - temperature_cal2))/(110-25);
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// float ts;
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#ifndef F303_ADC_VREF_ALWAYS_ON
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adcSTM32EnableVBAT(&ADCD1);
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adcSTM32EnableVREF(&ADCD1);
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// adcSTM32EnableTS(&ADCD1);
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#endif
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for (uint16_t i = 0; i < 1<<VBAT_AVERAGE; i++){
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adcConvert(&ADCD1, &adcgrpcfgVBAT, samplesVBAT, 1);
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vbat+= samplesVBAT[0];
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vrefint+= samplesVBAT[1];
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}
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vbat>>=VBAT_AVERAGE;
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vrefint>>=VBAT_AVERAGE;
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#ifndef F303_ADC_VREF_ALWAYS_ON
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adcSTM32DisableVBAT(&ADCD1);
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adcSTM32DisableVREF(&ADCD1);
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// adcSTM32DisableTS(&ADCD1);
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#endif
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// ts = samplesVBAT[2];
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// uint16_t vts = (ADC_FULL_SCALE * VREFINT_CAL * ts / (vrefint * ((1<<12)-1)));
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// uint16_t TemperatureC2 = (uint16_t)((V25-ts)/Avg_Slope+25);
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// uint16_t TemperatureC = (uint16_t)((V25-ts)/avg_slope+25);
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// vbat_raw = (3000 * 2 * vbat / 4095) * (VREFINT_CAL / vrefint)
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// uint16_t vbat_raw = (ADC_FULL_SCALE * VREFINT_CAL * (float)vbat * 2 / (vrefint * ((1<<12)-1)));
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// For speed divide not on 4095, divide on 4096, get little error, but no matter
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vbat_raw = ((ADC_FULL_SCALE * 2 * vbat)>>12) * VREFINT_CAL / vrefint;
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return_cached:
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if (vbat_raw < 100) {
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// maybe D2 is not installed
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return -1;
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}
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return vbat_raw + config.vbat_offset;
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}
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void adc_start_analog_watchdog(void)
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{
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adcStartConversion(&ADCD2, &adcgrpcfgTouch, samples, 1);
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}
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void adc_stop_analog_watchdog(void)
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{
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adcStopConversion(&ADCD2);
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}
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static inline void adc_interrupt(void)
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{
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uint32_t isr = ADC2->ISR;
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ADC2->ISR = isr;
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if (isr & ADC_ISR_OVR) {
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// ADC overflow condition, this could happen only if the DMA is unable to read data fast enough.
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}
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if (isr & ADC_ISR_AWD1) {
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/* Analog watchdog error.*/
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handle_touch_interrupt();
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}
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}
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OSAL_IRQ_HANDLER(STM32_ADC2_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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adc_interrupt();
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OSAL_IRQ_EPILOGUE();
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}
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#if 0
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uint16_t adc_multi_read(uint32_t chsel, uint16_t *result, uint32_t count)
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{
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/* ADC setup */
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VNA_ADC->ISR = VNA_ADC->ISR;
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VNA_ADC->IER = 0;
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VNA_ADC->TR = ADC_TR(0, 0);
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VNA_ADC->SMPR = ADC_SMPR_SMP_1P5;
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VNA_ADC->CFGR1 = ADC_CFGR1_RES_12BIT;
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VNA_ADC->CHSELR = chsel;
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// palSetPadMode(GPIOA, 10, PAL_MODE_OUTPUT_PUSHPULL);
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do{
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#if 0
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if (count < 145)
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palSetPad(GPIOA, 10);
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else
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palClearPad(GPIOA, 10);
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#endif
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VNA_ADC->CR |= ADC_CR_ADSTART; // ADC conversion start.
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// while (VNA_ADC->CR & ADC_CR_ADSTART)
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while(!(VNA_ADC->ISR & ADC_ISR_EOC));
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;
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*(result++) =VNA_ADC->DR;
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}while(--count);
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return count;
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}
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int16_t adc_buf_read(uint32_t chsel, uint16_t *result, uint32_t count)
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{
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adc_stop();
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#if 0
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// drive high to low on Y line (coordinates from left to right)
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palSetPad(GPIOB, GPIOB_YN);
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palClearPad(GPIOA, GPIOA_YP);
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// Set Y line as output
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palSetPadMode(GPIOB, GPIOB_YN, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPadMode(GPIOA, GPIOA_YP, PAL_MODE_OUTPUT_PUSHPULL);
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// Set X line as input
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palSetPadMode(GPIOB, GPIOB_XN, PAL_MODE_INPUT); // Hi-z mode
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palSetPadMode(GPIOA, GPIOA_XP, PAL_MODE_INPUT_ANALOG); // <- ADC_TOUCH_X channel
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uint16_t res = adc_multi_read(ADC_TOUCH_X, result, count);
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#else
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// palSetPadMode(GPIOA, 9, PAL_MODE_INPUT_ANALOG);
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uint16_t res = adc_multi_read(chsel, result, count); // ADC_CHSELR_CHSEL9
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#endif
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touch_start_watchdog();
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return res;
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}
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#endif
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