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@ -318,11 +318,12 @@ void ADF4351_WriteRegister32(int channel, const uint32_t value)
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// if (reg_dirty[value & 0x07] || (value & 0x07) == 0) {
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if (old_registers[value & 0x07] != registers[value & 0x07] || (value & 0x07) == 0 ) {
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registers[value & 0x07] = value;
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for (int i = 3; i >= 0; i--) shiftOut((value >> (8 * i)) & 0xFF);
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palSetLine(ADF4351_LE[channel]);
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my_microsecond_delay(1); // Must
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palClearLine(ADF4351_LE[channel]);
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// reg_dirty[value & 0x07] = false;
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shiftOut((value >> 24) & 0xFF);
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shiftOut((value >> 16) & 0xFF);
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shiftOut((value >> 8) & 0xFF);
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shiftOut((value >> 0) & 0xFF);
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palSetLine(ADF4351_LE[channel]);
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old_registers[value & 0x07] = registers[value & 0x07];
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}
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}
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@ -332,11 +333,6 @@ void ADF4351_Set(int channel)
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set_SPI_mode(SPI_MODE_SI);
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if (SI4432_SPI_SPEED != ADF_SPI_SPEED)
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SPI_BR_SET(SI4432_SPI, ADF_SPI_SPEED);
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// my_microsecond_delay(1);
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palClearLine(ADF4351_LE[channel]);
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// my_microsecond_delay(1);
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for (int i = 5; i >= 0; i--) {
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ADF4351_WriteRegister32(channel, registers[i]);
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}
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@ -789,7 +785,7 @@ static void SI4463_set_properties(uint16_t prop, void* values, uint8_t len)
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#define GLOBAL_GPIO_PIN_CFG 0x13, 0x07, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00
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#define GLOBAL_CLK_CFG 0x11, 0x00, 0x01, 0x01, 0x00
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// ---------------------------------------------------------------------------------------------------- v ------------ RSSI control byte
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#define GLOBAL_RF_MODEM_RAW_CONTROL 0x11, 0x20, 0x0A, 0x45, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x06, 0x03, 0x10, 0x40
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#define GLOBAL_RF_MODEM_RAW_CONTROL 0x11, 0x20, 0x0A, 0x45, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x06, 0x18, 0x10, 0x40
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//0x11 SI446X_CMD_SET_PROPERTY
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//0x20 SI446X_PROP_GROUP_MODEM
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//0x0A 10 Count
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@ -801,7 +797,7 @@ static void SI4463_set_properties(uint16_t prop, void* values, uint8_t len)
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//0x00 [0x49] MODEM_ANT_DIV_CONTROL
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//0xFF [0x4A] MODEM_RSSI_THRESH
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//0x06 [0x4B] MODEM_RSSI_JUMP_THRESH
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//0x03 [0x4C] MODEM_RSSI_CONTROL
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//0x18 [0x4C] MODEM_RSSI_CONTROL
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//0x10 [0x4D] MODEM_RSSI_CONTROL2
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//0x40 [0x4E] MODEM_RSSI_COMP
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// -----------------------------------------------------------------------------------------------------^ --------------
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@ -966,12 +962,22 @@ void SI4463_start_rx(uint8_t CHANNEL)
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SI4463_set_state(SI446X_STATE_READY);
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}
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SI4463_refresh_gpio();
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#if 0
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{
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uint8_t data[] =
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{
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0x11, 0x20, 0x01, 0x00,
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0x0A, // Restore 2FSK mode
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0x11, 0x10, 0x01, 0x03, 0xf0
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};
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SI4463_do_api(data, sizeof(data), NULL, 0); // Send PREAMBLE_CONFIG_STD_2 for long timeout
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}
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{
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uint8_t data[] =
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{
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0x11, 0x20, 0x01, 0x00, 0x09, // Restore OOK mode
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};
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SI4463_do_api(data, sizeof(data), NULL, 0);
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}
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@ -1299,7 +1305,7 @@ void SI446x_Fill(int s, int start)
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systime_t measure = chVTGetSystemTimeX();
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int i = start;
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while(SPI_RX_IS_NOT_EMPTY(SI4432_SPI)) (void)SPI_READ_8BIT(SI4432_SPI); // Remove lingering bytes
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#if 0
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#if 1
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while (!SI4463_READ_CTS); // Wait for CTS
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#endif
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__disable_irq();
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@ -1310,7 +1316,7 @@ void SI446x_Fill(int s, int start)
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if (t)
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my_microsecond_delay(t);
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#else
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#if 0
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#if 1
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SI_CS_LOW;
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SPI_WRITE_8BIT(SI4432_SPI, SI446X_CMD_ID_START_RX);
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while (SPI_IS_BUSY(SI4432_SPI)) ; // wait tx
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@ -1657,9 +1663,10 @@ freq_t SI4463_set_freq(freq_t freq)
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#endif
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} else
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return 0;
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si_set_offset(0);
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if (SI4463_offset_active) {
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si_set_offset(0);
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SI4463_offset_active = false;
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}
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uint32_t R = (freq * SI4463_outdiv) / (Npresc ? 2*config.setting_frequency_30mhz : 4*config.setting_frequency_30mhz) - 1; // R between 0x00 and 0x7f (127)
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uint64_t MOD = 524288; // = 2^19
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uint32_t F = ((freq * SI4463_outdiv*MOD) / (Npresc ? 2*config.setting_frequency_30mhz : 4*config.setting_frequency_30mhz)) - R*MOD;
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