From e2d5f52dc010f4695276c2cda913d3678eb1a2d7 Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Sun, 23 Aug 2020 08:55:59 +0200 Subject: [PATCH] First stage SI4463 RSSI working --- NANOVNA_STM32_F303/board.h | 20 +- SI4463_radio_config.h | 87 + SI4463_radio_config.h_saved | 87 + Si446x.h | 445 ++++ Si446x_defs.h | 124 ++ main.c | 3 + nanovna.h | 1 + sa_core.c | 4 +- si4432.c | 338 +++- si4432.h | 12 + si446x_cmd.h | 3792 +++++++++++++++++++++++++++++++++++ si446x_patch.h | 80 + 12 files changed, 4978 insertions(+), 15 deletions(-) create mode 100644 SI4463_radio_config.h create mode 100644 SI4463_radio_config.h_saved create mode 100644 Si446x.h create mode 100644 Si446x_defs.h create mode 100644 si446x_cmd.h create mode 100644 si446x_patch.h diff --git a/NANOVNA_STM32_F303/board.h b/NANOVNA_STM32_F303/board.h index 95c5af2..0811b95 100644 --- a/NANOVNA_STM32_F303/board.h +++ b/NANOVNA_STM32_F303/board.h @@ -247,7 +247,7 @@ PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \ PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \ PIN_MODE_OUTPUT(GPIOB_LO_SEL) | \ - PIN_MODE_OUTPUT(11) | \ + PIN_MODE_OUTPUT(GPIOB_SD_CS) | \ PIN_MODE_ALTERNATE(GPIOB_I2S2_WCLK) | \ PIN_MODE_ALTERNATE(GPIOB_I2S2_BCLK) | \ PIN_MODE_ALTERNATE(14) | \ @@ -263,14 +263,14 @@ PIN_OTYPE_PUSHPULL(GPIOB_I2C1_SCL) | \ PIN_OTYPE_PUSHPULL(GPIOB_I2C1_SDA) | \ PIN_OTYPE_PUSHPULL(GPIOB_LO_SEL) | \ - PIN_OTYPE_PUSHPULL(11) | \ + PIN_OTYPE_PUSHPULL(GPIOB_SD_CS) | \ PIN_OTYPE_PUSHPULL(GPIOB_I2S2_WCLK) | \ PIN_OTYPE_PUSHPULL(GPIOB_I2S2_BCLK) | \ PIN_OTYPE_PUSHPULL(14) | \ PIN_OTYPE_PUSHPULL(GPIOB_I2S2_MOSI)) #define VAL_GPIOB_OSPEEDR (PIN_PUPDR_FLOATING(GPIOB_XN) | \ PIN_PUPDR_FLOATING(GPIOB_YN) | \ - PIN_OSPEED_2M(GPIOB_RX_SEL) | \ + PIN_OSPEED_100M(GPIOB_RX_SEL) | \ PIN_OSPEED_100M(3) | \ PIN_OSPEED_100M(4) | \ PIN_OSPEED_100M(5) | \ @@ -278,8 +278,8 @@ PIN_OSPEED_100M(7) | \ PIN_OSPEED_100M(GPIOB_I2C1_SCL) | \ PIN_OSPEED_100M(GPIOB_I2C1_SDA) | \ - PIN_OSPEED_2M(GPIOB_LO_SEL) | \ - PIN_OSPEED_100M(11) | \ + PIN_OSPEED_100M(GPIOB_LO_SEL) | \ + PIN_OSPEED_100M(GPIOB_SD_CS) | \ PIN_OSPEED_100M(GPIOB_I2S2_WCLK) | \ PIN_OSPEED_100M(GPIOB_I2S2_BCLK) | \ PIN_OSPEED_100M(14) | \ @@ -295,7 +295,7 @@ PIN_PUPDR_PULLUP(GPIOB_I2C1_SCL) | \ PIN_PUPDR_PULLUP(GPIOB_I2C1_SDA) | \ PIN_PUPDR_PULLUP(GPIOB_LO_SEL) | \ - PIN_PUPDR_PULLUP(11) | \ + PIN_PUPDR_PULLUP(GPIOB_SD_CS) | \ PIN_PUPDR_PULLUP(GPIOB_I2S2_WCLK) | \ PIN_PUPDR_PULLUP(GPIOB_I2S2_BCLK) | \ PIN_PUPDR_PULLUP(14) | \ @@ -311,7 +311,7 @@ PIN_ODR_HIGH(GPIOB_I2C1_SCL) | \ PIN_ODR_HIGH(GPIOB_I2C1_SDA) | \ PIN_ODR_HIGH(GPIOB_LO_SEL) | \ - PIN_ODR_HIGH(11) | \ + PIN_ODR_HIGH(GPIOB_SD_CS) | \ PIN_ODR_HIGH(GPIOB_I2S2_WCLK) | \ PIN_ODR_HIGH(GPIOB_I2S2_BCLK) | \ PIN_ODR_HIGH(14) | \ @@ -327,7 +327,7 @@ #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_I2C1_SCL, 4) | \ PIN_AFIO_AF(GPIOB_I2C1_SDA, 4) | \ PIN_AFIO_AF(GPIOB_LO_SEL, 0) | \ - PIN_AFIO_AF(11, 0) | \ + PIN_AFIO_AF(GPIOB_SD_CS, 0) | \ PIN_AFIO_AF(GPIOB_I2S2_WCLK, 5) | \ PIN_AFIO_AF(GPIOB_I2S2_BCLK, 5) | \ PIN_AFIO_AF(14, 0) | \ @@ -355,7 +355,7 @@ PIN_MODE_INPUT(12) | \ PIN_MODE_OUTPUT(GPIOC_LED) | \ PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) + PIN_MODE_OUTPUT(15)) #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(0) | \ PIN_OTYPE_PUSHPULL(1) | \ PIN_OTYPE_PUSHPULL(2) | \ @@ -403,7 +403,7 @@ PIN_PUPDR_PULLUP(12) | \ PIN_PUPDR_FLOATING(GPIOC_LED) | \ PIN_PUPDR_FLOATING(14) | \ - PIN_PUPDR_PULLUP(15)) + PIN_PUPDR_FLOATING(15)) #define VAL_GPIOC_ODR (PIN_ODR_HIGH(0) | \ PIN_ODR_HIGH(1) | \ PIN_ODR_HIGH(2) | \ diff --git a/SI4463_radio_config.h b/SI4463_radio_config.h new file mode 100644 index 0000000..294b05b --- /dev/null +++ b/SI4463_radio_config.h @@ -0,0 +1,87 @@ + +#ifndef RADIO_CONFIG_H_ +#define RADIO_CONFIG_H_ + +#define RF_POWER_UP 0x02, 0x01, 0x00, 0x01, 0xC9, 0xC3, 0x80 +#define RF_GPIO_PIN_CFG 0x13, 0x41, 0x41, 0x21, 0x20, 0x67, 0x4B, 0x00 +#define GLOBAL_2_0 0x11, 0x00, 0x04, 0x00, 0x52, 0x00, 0x18, 0x30 +#define MODEM_2_0 0x11, 0x20, 0x0C, 0x00, 0x03, 0x00, 0x07, 0x02, 0x71, 0x00, 0x05, 0xC9, 0xC3, 0x80, 0x00, 0x00 +#define MODEM_2_1 0x11, 0x20, 0x01, 0x0C, 0x46 +#define MODEM_2_2 0x11, 0x20, 0x0C, 0x1C, 0x80, 0x00, 0xB0, 0x10, 0x0C, 0xE8, 0x00, 0x4E, 0x06, 0x8D, 0xB9, 0x00 +#define MODEM_2_3 0x11, 0x20, 0x0A, 0x28, 0x00, 0x02, 0xC0, 0x08, 0x00, 0x12, 0xC6, 0xD4, 0x01, 0x5C +#define MODEM_2_4 0x11, 0x20, 0x0B, 0x39, 0x11, 0x11, 0x80, 0x1A, 0x20, 0x00, 0x00, 0x28, 0x0C, 0xA4, 0x23 +#define MODEM_2_5 0x11, 0x20, 0x09, 0x45, 0x03, 0x00, 0x85, 0x01, 0x00, 0xFF, 0x06, 0x09, 0x10 +#define MODEM_2_6 0x11, 0x20, 0x02, 0x50, 0x94, 0x0A +#define MODEM_2_7 0x11, 0x20, 0x02, 0x54, 0x03, 0x07 +#define MODEM_2_8 0x11, 0x20, 0x05, 0x5B, 0x40, 0x04, 0x04, 0x78, 0x20 +#define MODEM_CHFLT_2_0 0x11, 0x21, 0x0C, 0x00, 0x7E, 0x64, 0x1B, 0xBA, 0x58, 0x0B, 0xDD, 0xCE, 0xD6, 0xE6, 0xF6, 0x00 +#define MODEM_CHFLT_2_1 0x11, 0x21, 0x0C, 0x0C, 0x03, 0x03, 0x15, 0xF0, 0x3F, 0x00, 0x7E, 0x64, 0x1B, 0xBA, 0x58, 0x0B +#define MODEM_CHFLT_2_2 0x11, 0x21, 0x0B, 0x18, 0xDD, 0xCE, 0xD6, 0xE6, 0xF6, 0x00, 0x03, 0x03, 0x15, 0xF0, 0x3F +#define PA_2_0 0x11, 0x22, 0x01, 0x03, 0x1D +#define FREQ_CONTROL_2_0 0x11, 0x40, 0x08, 0x00, 0x37, 0x09, 0x00, 0x00, 0x44, 0x44, 0x20, 0xFE +#define RF_START_RX 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#define RF_IRCAL 0x17, 0x56, 0x10, 0xCA, 0xF0 +#define RF_IRCAL_1 0x17, 0x13, 0x10, 0xCA, 0xF0 +#define INT_CTL_5_0 0x11, 0x01, 0x04, 0x00, 0x07, 0x18, 0x00, 0x00 +#define FRR_CTL_5_0 0x11, 0x02, 0x03, 0x00, 0x0A, 0x09, 0x00 +#define PREAMBLE_5_0 0x11, 0x10, 0x01, 0x04, 0x31 +#define SYNC_5_0 0x11, 0x11, 0x04, 0x01, 0xB4, 0x2B, 0x00, 0x00 +#define PKT_5_0 0x11, 0x12, 0x0A, 0x00, 0x04, 0x01, 0x08, 0xFF, 0xFF, 0x20, 0x00, 0x00, 0x2A, 0x01 +#define PKT_5_1 0x11, 0x12, 0x07, 0x0E, 0x01, 0x06, 0xAA, 0x00, 0x80, 0x02, 0x2A +#define MODEM_5_0 0x11, 0x20, 0x0A, 0x03, 0x1E, 0x84, 0x80, 0x09, 0xC9, 0xC3, 0x80, 0x00, 0x0D, 0xA7 +#define MODEM_5_1 0x11, 0x20, 0x0B, 0x1E, 0x10, 0x20, 0x00, 0xE8, 0x00, 0x4B, 0x06, 0xD3, 0xA0, 0x06, 0xD4 +#define MODEM_5_2 0x11, 0x20, 0x09, 0x2A, 0x00, 0x00, 0x00, 0x23, 0xC6, 0xD4, 0x00, 0xA9, 0xE0 +#define MODEM_5_3 0x11, 0x20, 0x05, 0x39, 0x10, 0x10, 0x80, 0x1A, 0x40 +#define MODEM_5_4 0x11, 0x20, 0x08, 0x46, 0x01, 0x15, 0x02, 0x00, 0x80, 0x06, 0x02, 0x18 +#define MODEM_5_5 0x11, 0x20, 0x01, 0x50, 0x84 +#define MODEM_5_6 0x11, 0x20, 0x01, 0x54, 0x04 +#define MODEM_5_7 0x11, 0x20, 0x01, 0x5D, 0x08 +#define MODEM_CHFLT_5_0 0x11, 0x21, 0x0C, 0x00, 0xA2, 0x81, 0x26, 0xAF, 0x3F, 0xEE, 0xC8, 0xC7, 0xDB, 0xF2, 0x02, 0x08 +#define MODEM_CHFLT_5_1 0x11, 0x21, 0x0C, 0x0C, 0x07, 0x03, 0x15, 0xFC, 0x0F, 0x00, 0xA2, 0x81, 0x26, 0xAF, 0x3F, 0xEE +#define MODEM_CHFLT_5_2 0x11, 0x21, 0x0B, 0x18, 0xC8, 0xC7, 0xDB, 0xF2, 0x02, 0x08, 0x07, 0x03, 0x15, 0xFC, 0x0F +#define SYNTH_5_0 0x11, 0x23, 0x06, 0x00, 0x34, 0x04, 0x0B, 0x04, 0x07, 0x70 +#define FREQ_CONTROL_5_0 0x11, 0x40, 0x04, 0x00, 0x38, 0x0D, 0xDD, 0xDD + +#define RADIO_CONFIGURATION_DATA_ARRAY { \ +0x07, RF_POWER_UP, \ +0x08, RF_GPIO_PIN_CFG, \ +0x08, GLOBAL_2_0, \ +0x10, MODEM_2_0, \ +0x05, MODEM_2_1, \ +0x10, MODEM_2_2, \ +0x0E, MODEM_2_3, \ +0x0F, MODEM_2_4, \ +0x0D, MODEM_2_5, \ +0x06, MODEM_2_6, \ +0x06, MODEM_2_7, \ +0x09, MODEM_2_8, \ +0x10, MODEM_CHFLT_2_0, \ +0x10, MODEM_CHFLT_2_1, \ +0x0F, MODEM_CHFLT_2_2, \ +0x05, PA_2_0, \ +0x0C, FREQ_CONTROL_2_0, \ +0x08, RF_START_RX, \ +0x05, RF_IRCAL, \ +0x05, RF_IRCAL_1, \ +0x08, INT_CTL_5_0, \ +0x07, FRR_CTL_5_0, \ +0x05, PREAMBLE_5_0, \ +0x08, SYNC_5_0, \ +0x0E, PKT_5_0, \ +0x0B, PKT_5_1, \ +0x0E, MODEM_5_0, \ +0x0F, MODEM_5_1, \ +0x0D, MODEM_5_2, \ +0x09, MODEM_5_3, \ +0x0C, MODEM_5_4, \ +0x05, MODEM_5_5, \ +0x05, MODEM_5_6, \ +0x05, MODEM_5_7, \ +0x10, MODEM_CHFLT_5_0, \ +0x10, MODEM_CHFLT_5_1, \ +0x0F, MODEM_CHFLT_5_2, \ +0x0A, SYNTH_5_0, \ +0x08, FREQ_CONTROL_5_0, \ +} + +#endif diff --git a/SI4463_radio_config.h_saved b/SI4463_radio_config.h_saved new file mode 100644 index 0000000..294b05b --- /dev/null +++ b/SI4463_radio_config.h_saved @@ -0,0 +1,87 @@ + +#ifndef RADIO_CONFIG_H_ +#define RADIO_CONFIG_H_ + +#define RF_POWER_UP 0x02, 0x01, 0x00, 0x01, 0xC9, 0xC3, 0x80 +#define RF_GPIO_PIN_CFG 0x13, 0x41, 0x41, 0x21, 0x20, 0x67, 0x4B, 0x00 +#define GLOBAL_2_0 0x11, 0x00, 0x04, 0x00, 0x52, 0x00, 0x18, 0x30 +#define MODEM_2_0 0x11, 0x20, 0x0C, 0x00, 0x03, 0x00, 0x07, 0x02, 0x71, 0x00, 0x05, 0xC9, 0xC3, 0x80, 0x00, 0x00 +#define MODEM_2_1 0x11, 0x20, 0x01, 0x0C, 0x46 +#define MODEM_2_2 0x11, 0x20, 0x0C, 0x1C, 0x80, 0x00, 0xB0, 0x10, 0x0C, 0xE8, 0x00, 0x4E, 0x06, 0x8D, 0xB9, 0x00 +#define MODEM_2_3 0x11, 0x20, 0x0A, 0x28, 0x00, 0x02, 0xC0, 0x08, 0x00, 0x12, 0xC6, 0xD4, 0x01, 0x5C +#define MODEM_2_4 0x11, 0x20, 0x0B, 0x39, 0x11, 0x11, 0x80, 0x1A, 0x20, 0x00, 0x00, 0x28, 0x0C, 0xA4, 0x23 +#define MODEM_2_5 0x11, 0x20, 0x09, 0x45, 0x03, 0x00, 0x85, 0x01, 0x00, 0xFF, 0x06, 0x09, 0x10 +#define MODEM_2_6 0x11, 0x20, 0x02, 0x50, 0x94, 0x0A +#define MODEM_2_7 0x11, 0x20, 0x02, 0x54, 0x03, 0x07 +#define MODEM_2_8 0x11, 0x20, 0x05, 0x5B, 0x40, 0x04, 0x04, 0x78, 0x20 +#define MODEM_CHFLT_2_0 0x11, 0x21, 0x0C, 0x00, 0x7E, 0x64, 0x1B, 0xBA, 0x58, 0x0B, 0xDD, 0xCE, 0xD6, 0xE6, 0xF6, 0x00 +#define MODEM_CHFLT_2_1 0x11, 0x21, 0x0C, 0x0C, 0x03, 0x03, 0x15, 0xF0, 0x3F, 0x00, 0x7E, 0x64, 0x1B, 0xBA, 0x58, 0x0B +#define MODEM_CHFLT_2_2 0x11, 0x21, 0x0B, 0x18, 0xDD, 0xCE, 0xD6, 0xE6, 0xF6, 0x00, 0x03, 0x03, 0x15, 0xF0, 0x3F +#define PA_2_0 0x11, 0x22, 0x01, 0x03, 0x1D +#define FREQ_CONTROL_2_0 0x11, 0x40, 0x08, 0x00, 0x37, 0x09, 0x00, 0x00, 0x44, 0x44, 0x20, 0xFE +#define RF_START_RX 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#define RF_IRCAL 0x17, 0x56, 0x10, 0xCA, 0xF0 +#define RF_IRCAL_1 0x17, 0x13, 0x10, 0xCA, 0xF0 +#define INT_CTL_5_0 0x11, 0x01, 0x04, 0x00, 0x07, 0x18, 0x00, 0x00 +#define FRR_CTL_5_0 0x11, 0x02, 0x03, 0x00, 0x0A, 0x09, 0x00 +#define PREAMBLE_5_0 0x11, 0x10, 0x01, 0x04, 0x31 +#define SYNC_5_0 0x11, 0x11, 0x04, 0x01, 0xB4, 0x2B, 0x00, 0x00 +#define PKT_5_0 0x11, 0x12, 0x0A, 0x00, 0x04, 0x01, 0x08, 0xFF, 0xFF, 0x20, 0x00, 0x00, 0x2A, 0x01 +#define PKT_5_1 0x11, 0x12, 0x07, 0x0E, 0x01, 0x06, 0xAA, 0x00, 0x80, 0x02, 0x2A +#define MODEM_5_0 0x11, 0x20, 0x0A, 0x03, 0x1E, 0x84, 0x80, 0x09, 0xC9, 0xC3, 0x80, 0x00, 0x0D, 0xA7 +#define MODEM_5_1 0x11, 0x20, 0x0B, 0x1E, 0x10, 0x20, 0x00, 0xE8, 0x00, 0x4B, 0x06, 0xD3, 0xA0, 0x06, 0xD4 +#define MODEM_5_2 0x11, 0x20, 0x09, 0x2A, 0x00, 0x00, 0x00, 0x23, 0xC6, 0xD4, 0x00, 0xA9, 0xE0 +#define MODEM_5_3 0x11, 0x20, 0x05, 0x39, 0x10, 0x10, 0x80, 0x1A, 0x40 +#define MODEM_5_4 0x11, 0x20, 0x08, 0x46, 0x01, 0x15, 0x02, 0x00, 0x80, 0x06, 0x02, 0x18 +#define MODEM_5_5 0x11, 0x20, 0x01, 0x50, 0x84 +#define MODEM_5_6 0x11, 0x20, 0x01, 0x54, 0x04 +#define MODEM_5_7 0x11, 0x20, 0x01, 0x5D, 0x08 +#define MODEM_CHFLT_5_0 0x11, 0x21, 0x0C, 0x00, 0xA2, 0x81, 0x26, 0xAF, 0x3F, 0xEE, 0xC8, 0xC7, 0xDB, 0xF2, 0x02, 0x08 +#define MODEM_CHFLT_5_1 0x11, 0x21, 0x0C, 0x0C, 0x07, 0x03, 0x15, 0xFC, 0x0F, 0x00, 0xA2, 0x81, 0x26, 0xAF, 0x3F, 0xEE +#define MODEM_CHFLT_5_2 0x11, 0x21, 0x0B, 0x18, 0xC8, 0xC7, 0xDB, 0xF2, 0x02, 0x08, 0x07, 0x03, 0x15, 0xFC, 0x0F +#define SYNTH_5_0 0x11, 0x23, 0x06, 0x00, 0x34, 0x04, 0x0B, 0x04, 0x07, 0x70 +#define FREQ_CONTROL_5_0 0x11, 0x40, 0x04, 0x00, 0x38, 0x0D, 0xDD, 0xDD + +#define RADIO_CONFIGURATION_DATA_ARRAY { \ +0x07, RF_POWER_UP, \ +0x08, RF_GPIO_PIN_CFG, \ +0x08, GLOBAL_2_0, \ +0x10, MODEM_2_0, \ +0x05, MODEM_2_1, \ +0x10, MODEM_2_2, \ +0x0E, MODEM_2_3, \ +0x0F, MODEM_2_4, \ +0x0D, MODEM_2_5, \ +0x06, MODEM_2_6, \ +0x06, MODEM_2_7, \ +0x09, MODEM_2_8, \ +0x10, MODEM_CHFLT_2_0, \ +0x10, MODEM_CHFLT_2_1, \ +0x0F, MODEM_CHFLT_2_2, \ +0x05, PA_2_0, \ +0x0C, FREQ_CONTROL_2_0, \ +0x08, RF_START_RX, \ +0x05, RF_IRCAL, \ +0x05, RF_IRCAL_1, \ +0x08, INT_CTL_5_0, \ +0x07, FRR_CTL_5_0, \ +0x05, PREAMBLE_5_0, \ +0x08, SYNC_5_0, \ +0x0E, PKT_5_0, \ +0x0B, PKT_5_1, \ +0x0E, MODEM_5_0, \ +0x0F, MODEM_5_1, \ +0x0D, MODEM_5_2, \ +0x09, MODEM_5_3, \ +0x0C, MODEM_5_4, \ +0x05, MODEM_5_5, \ +0x05, MODEM_5_6, \ +0x05, MODEM_5_7, \ +0x10, MODEM_CHFLT_5_0, \ +0x10, MODEM_CHFLT_5_1, \ +0x0F, MODEM_CHFLT_5_2, \ +0x0A, SYNTH_5_0, \ +0x08, FREQ_CONTROL_5_0, \ +} + +#endif diff --git a/Si446x.h b/Si446x.h new file mode 100644 index 0000000..87a1337 --- /dev/null +++ b/Si446x.h @@ -0,0 +1,445 @@ +/* + * Project: Si4463 Radio Library for AVR and Arduino + * Author: Zak Kemble, contact@zakkemble.co.uk + * Copyright: (C) 2017 by Zak Kemble + * License: GNU GPL v3 (see License.txt) + * Web: http://blog.zakkemble.co.uk/si4463-radio-library-avr-arduino/ + */ + +#ifndef SI443X_H_ +#define SI443X_H_ + +#include + +//#include "Si446x_config.h" + +// Address matching doesnt really work very well as the FIFO still needs to be +// manually cleared after receiving a packet, so the MCU still needs to wakeup and +// do stuff instead of the radio doing things automatically :/ + +#define SI446X_MAX_PACKET_LEN 128 ///< Maximum packet length + +#define SI446X_MAX_TX_POWER 127 ///< Maximum TX power (+20dBm/100mW) + +#define SI446X_WUT_RUN 1 ///< Wake the microcontroller when the WUT expires +#define SI446X_WUT_BATT 2 ///< Take a battery measurement when the WUT expires +#define SI446X_WUT_RX 4 ///< Go into RX mode for LDC time (not supported yet!) + +#define SI446X_GPIO_PULL_EN 0x40 ///< Pullup enable for GPIO pins +#define SI446X_GPIO_PULL_DIS 0x00 ///< Pullup disable for GPIO pins +#define SI446X_NIRQ_PULL_EN 0x40 ///< Pullup enable for NIRQ pin +#define SI446X_NIRQ_PULL_DIS 0x00 ///< Pullup disable for NIRQ pin +#define SI446X_SDO_PULL_EN 0x40 ///< Pullup enable for SDO pin +#define SI446X_SDO_PULL_DIS 0x00 ///< Pullup disable for SDO pin +#define SI446X_PIN_PULL_EN 0x40 ///< Pullup enable for any pin +#define SI446X_PIN_PULL_DIS 0x00 ///< Pullup disable for any pin + +#define SI446X_GPIO_DRV_HIGH 0x00 ///< GPIO drive strength high +#define SI446X_GPIO_DRV_MED_HIGH 0x20 ///< GPIO drive strength medium-high +#define SI446X_GPIO_DRV_MED_LOW 0x40 ///< GPIO drive strength medium-low +#define SI446X_GPIO_DRV_LOW 0x60 ///< GPIO drive strength low + +#define SI446X_PROP_GROUP_GLOBAL 0x00 ///< Property group global +#define SI446X_PROP_GROUP_INT 0x01 ///< Property group interrupts +#define SI446X_PROP_GROUP_FRR 0x02 ///< Property group fast response registers +#define SI446X_PROP_GROUP_PREAMBLE 0x10 ///< Property group preamble +#define SI446X_PROP_GROUP_SYNC 0x11 ///< Property group sync +#define SI446X_PROP_GROUP_PKT 0x12 ///< Property group packet config +#define SI446X_PROP_GROUP_MODEM 0x20 ///< Property group modem +#define SI446X_PROP_GROUP_MODEM_CHFLT 0x21 ///< Property group RX coefficients +#define SI446X_PROP_GROUP_PA 0x22 ///< Property group power amp +#define SI446X_PROP_GROUP_SYNTH 0x23 ///< Property group synthesizer +#define SI446X_PROP_GROUP_MATCH 0x30 ///< Property group address match +#define SI446X_PROP_GROUP_FREQ_CONTROL 0x40 ///< Property group frequency control +#define SI446X_PROP_GROUP_RX_HOP 0x50 ///< Property group RX hop +#define SI446X_PROP_GROUP_PTI 0xF0 ///< Property group packet trace interface + +/** +* @brief GPIO pin modes (see the Si446x API docs for what they all mean) +*/ +typedef enum +{ + SI446X_GPIO_MODE_DONOTHING = 0x00, + SI446X_GPIO_MODE_TRISTATE = 0x01, + SI446X_GPIO_MODE_DRIVE0 = 0x02, + SI446X_GPIO_MODE_DRIVE1 = 0x03, + SI446X_GPIO_MODE_INPUT = 0x04, + SI446X_GPIO_MODE_32K_CLK = 0x05, + SI446X_GPIO_MODE_BOOT_CLK = 0x06, + SI446X_GPIO_MODE_DIV_CLK = 0x07, + SI446X_GPIO_MODE_CTS = 0x08, + SI446X_GPIO_MODE_INV_CTS = 0x09, + SI446X_GPIO_MODE_CMD_OVERLAP = 0x0A, + SI446X_GPIO_MODE_SDO = 0x0B, + SI446X_GPIO_MODE_POR = 0x0C, + SI446X_GPIO_MODE_CAL_WUT = 0x0D, + SI446X_GPIO_MODE_WUT = 0x0E, + SI446X_GPIO_MODE_EN_PA = 0x0F, + SI446X_GPIO_MODE_TX_DATA_CLK = 0x10, + SI446X_GPIO_MODE_RX_DATA_CLK = 0x11, + SI446X_GPIO_MODE_EN_LNA = 0x12, + SI446X_GPIO_MODE_TX_DATA = 0x13, + SI446X_GPIO_MODE_RX_DATA = 0x14, + SI446X_GPIO_MODE_RX_RAW_DATA = 0x15, + SI446X_GPIO_MODE_ANTENNA_1_SW = 0x16, + SI446X_GPIO_MODE_ANTENNA_2_SW = 0x17, + SI446X_GPIO_MODE_VALID_PREAMBLE = 0x18, + SI446X_GPIO_MODE_INVALID_PREAMBLE = 0x19, + SI446X_GPIO_MODE_SYNC_WORD_DETECT = 0x1A, + SI446X_GPIO_MODE_CCA = 0x1B, + SI446X_GPIO_MODE_IN_SLEEP = 0x1C, + SI446X_GPIO_MODE_PKT_TRACE = 0x1D, +// Nothing for 0x1E (30) + SI446X_GPIO_MODE_TX_RX_DATA_CLK = 0x1F, + SI446X_GPIO_MODE_TX_STATE = 0x20, + SI446X_GPIO_MODE_RX_STATE = 0x21, + SI446X_GPIO_MODE_RX_FIFO_FULL = 0x22, + SI446X_GPIO_MODE_TX_FIFO_EMPTY = 0x23, + SI446X_GPIO_MODE_LOW_BATT = 0x24, + SI446X_GPIO_MODE_CCA_LATCH = 0x25, + SI446X_GPIO_MODE_HOPPED = 0x26, + SI446X_GPIO_MODE_HOP_TABLE_WRAP = 0x27 +} si446x_gpio_mode_t; + +/** +* @brief NIRQ pin modes (see the Si446x API docs for what they all mean) +*/ +typedef enum +{ + SI446X_NIRQ_MODE_DONOTHING = 0x00, + SI446X_NIRQ_MODE_TRISTATE = 0x01, + SI446X_NIRQ_MODE_DRIVE0 = 0x02, + SI446X_NIRQ_MODE_DRIVE1 = 0x03, + SI446X_NIRQ_MODE_INPUT = 0x04, +// SI446X_NIRQ_MODE_32K_CLK = 0x05, +// SI446X_NIRQ_MODE_BOOT_CLK = 0x06, + SI446X_NIRQ_MODE_DIV_CLK = 0x07, + SI446X_NIRQ_MODE_CTS = 0x08, +// SI446X_NIRQ_MODE_INV_CTS = 0x09, +// SI446X_NIRQ_MODE_CMD_OVERLAP = 0x0A, + SI446X_NIRQ_MODE_SDO = 0x0B, + SI446X_NIRQ_MODE_POR = 0x0C, +// SI446X_NIRQ_MODE_CAL_WUT = 0x0D, +// SI446X_NIRQ_MODE_WUT = 0x0E, + SI446X_NIRQ_MODE_EN_PA = 0x0F, + SI446X_NIRQ_MODE_TX_DATA_CLK = 0x10, + SI446X_NIRQ_MODE_RX_DATA_CLK = 0x11, + SI446X_NIRQ_MODE_EN_LNA = 0x12, + SI446X_NIRQ_MODE_TX_DATA = 0x13, + SI446X_NIRQ_MODE_RX_DATA = 0x14, + SI446X_NIRQ_MODE_RX_RAW_DATA = 0x15, + SI446X_NIRQ_MODE_ANTENNA_1_SW = 0x16, + SI446X_NIRQ_MODE_ANTENNA_2_SW = 0x17, + SI446X_NIRQ_MODE_VALID_PREAMBLE = 0x18, + SI446X_NIRQ_MODE_INVALID_PREAMBLE = 0x19, + SI446X_NIRQ_MODE_SYNC_WORD_DETECT = 0x1A, + SI446X_NIRQ_MODE_CCA = 0x1B, +// SI446X_NIRQ_MODE_IN_SLEEP = 0x1C, + SI446X_NIRQ_MODE_PKT_TRACE = 0x1D, +// Nothing for 0x1E (30) + SI446X_NIRQ_MODE_TX_RX_DATA_CLK = 0x1F, +// SI446X_NIRQ_MODE_TX_STATE = 0x20, +// SI446X_NIRQ_MODE_RX_STATE = 0x21, +// SI446X_NIRQ_MODE_RX_FIFO_FULL = 0x22, +// SI446X_NIRQ_MODE_TX_FIFO_EMPTY = 0x23, +// SI446X_NIRQ_MODE_LOW_BATT = 0x24, +// SI446X_NIRQ_MODE_CCA_LATCH = 0x25, +// SI446X_NIRQ_MODE_HOPPED = 0x26, + SI446X_NIRQ_MODE_NIRQ = 0x27 +} si446x_nirq_mode_t; + +/** +* @brief SDO pin modes (see the Si446x API docs for what they all mean) +*/ +typedef enum +{ + SI446X_SDO_MODE_DONOTHING = 0x00, + SI446X_SDO_MODE_TRISTATE = 0x01, + SI446X_SDO_MODE_DRIVE0 = 0x02, + SI446X_SDO_MODE_DRIVE1 = 0x03, + SI446X_SDO_MODE_INPUT = 0x04, + SI446X_SDO_MODE_32K_CLK = 0x05, +// SI446X_SDO_MODE_BOOT_CLK = 0x06, + SI446X_SDO_MODE_DIV_CLK = 0x07, + SI446X_SDO_MODE_CTS = 0x08, +// SI446X_SDO_MODE_INV_CTS = 0x09, +// SI446X_SDO_MODE_CMD_OVERLAP = 0x0A, + SI446X_SDO_MODE_SDO = 0x0B, + SI446X_SDO_MODE_POR = 0x0C, +// SI446X_SDO_MODE_CAL_WUT = 0x0D, + SI446X_SDO_MODE_WUT = 0x0E, + SI446X_SDO_MODE_EN_PA = 0x0F, + SI446X_SDO_MODE_TX_DATA_CLK = 0x10, + SI446X_SDO_MODE_RX_DATA_CLK = 0x11, + SI446X_SDO_MODE_EN_LNA = 0x12, + SI446X_SDO_MODE_TX_DATA = 0x13, + SI446X_SDO_MODE_RX_DATA = 0x14, + SI446X_SDO_MODE_RX_RAW_DATA = 0x15, + SI446X_SDO_MODE_ANTENNA_1_SW = 0x16, + SI446X_SDO_MODE_ANTENNA_2_SW = 0x17, + SI446X_SDO_MODE_VALID_PREAMBLE = 0x18, + SI446X_SDO_MODE_INVALID_PREAMBLE = 0x19, + SI446X_SDO_MODE_SYNC_WORD_DETECT = 0x1A, + SI446X_SDO_MODE_CCA = 0x1B, +// SI446X_SDO_MODE_IN_SLEEP = 0x1C, +// SI446X_SDO_MODE_PKT_TRACE = 0x1D, +// Nothing for 0x1E (30) +// SI446X_SDO_MODE_TX_RX_DATA_CLK = 0x1F, +// SI446X_SDO_MODE_TX_STATE = 0x20, +// SI446X_SDO_MODE_RX_STATE = 0x21, +// SI446X_SDO_MODE_RX_FIFO_FULL = 0x22, +// SI446X_SDO_MODE_TX_FIFO_EMPTY = 0x23, +// SI446X_SDO_MODE_LOW_BATT = 0x24, +// SI446X_SDO_MODE_CCA_LATCH = 0x25, +// SI446X_SDO_MODE_HOPPED = 0x26, +// SI446X_SDO_MODE_HOP_TABLE_WRAP = 0x27 +} si446x_sdo_mode_t; + +/** +* @brief Data structure for storing chip info from ::Si446x_getInfo() +*/ +typedef struct { + uint8_t chipRev; ///< Chip revision + uint16_t part; ///< Part ID + uint8_t partBuild; ///< Part build + uint16_t id; ///< ID + uint8_t customer; ///< Customer + uint8_t romId; ///< ROM ID (3 = revB1B, 6 = revC2A) + + uint8_t revExternal; ///< Revision external + uint8_t revBranch; ///< Revision branch + uint8_t revInternal; ///< Revision internal + uint16_t patch; ///< Patch + uint8_t func; ///< Function +} si446x_info_t; + +/** +* @brief GPIOs for passing to ::Si446x_writeGPIO(), or for masking when reading from ::Si446x_readGPIO() +*/ +typedef enum +{ + SI446X_GPIO0 = 0, ///< GPIO 1 + SI446X_GPIO1 = 1, ///< GPIO 2 + SI446X_GPIO2 = 2, ///< GPIO 3 + SI446X_GPIO3 = 3, ///< GPIO 4 + SI446X_NIRQ = 4, ///< NIRQ + SI446X_SDO = 5 ///< SDO +} si446x_gpio_t; + +/** +* @brief Radio states, returned from ::Si446x_getState() +*/ +typedef enum +{ + SI446X_STATE_NOCHANGE = 0x00, + SI446X_STATE_SLEEP = 0x01, ///< This will never be returned since SPI activity will wake the radio into ::SI446X_STATE_SPI_ACTIVE + SI446X_STATE_SPI_ACTIVE = 0x02, + SI446X_STATE_READY = 0x03, + SI446X_STATE_READY2 = 0x04, ///< Will return as ::SI446X_STATE_READY + SI446X_STATE_TX_TUNE = 0x05, ///< Will return as ::SI446X_STATE_TX + SI446X_STATE_RX_TUNE = 0x06, ///< Will return as ::SI446X_STATE_RX + SI446X_STATE_TX = 0x07, + SI446X_STATE_RX = 0x08 +} si446x_state_t; + +#define SI446X_CBS_SENT _BV(5+8) ///< Enable/disable packet sent callback +//#define SI446X_CBS_RXCOMPLETE _BV(4+8) +//#define SI446X_CBS_RXINVALID _BV(3+8) +#define SI446X_CBS_RXBEGIN _BV(0) ///< Enable/disable packet receive begin callback +//#define SI446X_CBS_INVALIDSYNC _BV(5) ///< Don't use this, it's used internally by the library + +/** +* @brief Initialise, must be called before anything else! +* +* @return (none) +*/ +void Si446x_init(void); + +/** +* @brief Get chip info, see ::si446x_info_t +* +* @see ::si446x_info_t +* @param [info] Pointer to allocated ::si446x_info_t struct to place data into +* @return (none) +*/ +void Si446x_getInfo(si446x_info_t* info); + +/** +* @brief Get the current RSSI, the chip needs to be in receive mode for this to work +* +* @return The current RSSI in dBm (usually between -130 and 0) +*/ +int16_t Si446x_getRSSI(void); + +/** +* @brief Set the transmit power. The output power does not follow the \p pwr value, see the Si446x datasheet for a pretty graph +* +* 0 = -32dBm (<1uW)\n +* 7 = 0dBm (1mW)\n +* 12 = 5dBm (3.2mW)\n +* 22 = 10dBm (10mW)\n +* 40 = 15dBm (32mW)\n +* 100 = 20dBm (100mW) +* +* @param [pwr] A value from 0 to 127 +* @return (none) +*/ +void Si446x_setTxPower(uint8_t pwr); + +/** +* @brief Enable or disable callbacks. This is mainly to configure what events should wake the microcontroller up. +* +* @param [callbacks] The callbacks to configure (multiple callbacks should be bitewise OR'd together) +* @param [state] Enable or disable the callbacks passed in \p callbacks parameter (1 = Enable, 0 = Disable) +* @return (none) +*/ +void Si446x_setupCallback(uint16_t callbacks, uint8_t state); + +/** +* @brief Read received data from FIFO +* +* @param [buff] Pointer to buffer to place data +* @param [len] Number of bytes to read, make sure not to read more bytes than what the FIFO has stored. The number of bytes that can be read is passed in the ::SI446X_CB_RXCOMPLETE() callback. +* @return (none) +*/ +void Si446x_read(void* buff, uint8_t len); + +/** +* @brief Transmit a packet +* +* @param [packet] Pointer to packet data +* @param [len] Number of bytes to transmit, maximum of ::SI446X_MAX_PACKET_LEN If configured for fixed length packets then this parameter is ignored and the length is set by ::SI446X_FIXED_LENGTH in Si446x_config.h +* @param [channel] Channel to transmit data on (0 - 255) +* @param [onTxFinish] What state to enter when the packet has finished transmitting. Usually ::SI446X_STATE_SLEEP or ::SI446X_STATE_RX +* @return 0 on failure (already transmitting), 1 on success (has begun transmitting) +*/ +uint8_t Si446x_TX(void* packet, uint8_t len, uint8_t channel, si446x_state_t onTxFinish); + +/** +* @brief Enter receive mode +* +* Entering RX mode will abort any transmissions happening at the time +* +* @param [channel] Channel to listen to (0 - 255) +* @return (none) +*/ +void Si446x_RX(uint8_t channel); + +/*-* +* @brief Changes will be applied next time the radio enters RX mode (NOT SUPPORTED) +* +* @param [mode] TODO +* @param [address] TODO +* @return (none) +*/ +//void Si446x_setAddress(si446x_addrMode_t mode, uint8_t address); + +/** +* @brief Set the low battery voltage alarm +* +* The ::SI446X_CB_LOWBATT() callback will be ran when the supply voltage drops below this value. The WUT must be configured with ::Si446x_setupWUT() to enable periodically checking the battery level. +* +* @param [voltage] The low battery threshold in millivolts (1050 - 3050). +* @return (none) +*/ +void Si446x_setLowBatt(uint16_t voltage); + +/** +* @brief Configure the wake up timer +* +* This function will also reset the timer.\n +*\n +* The Wake Up Timer (WUT) can be used to periodically run a number of features:\n +* ::SI446X_WUT_RUN Simply wake up the microcontroller when the WUT expires and run the ::SI446X_CB_WUT() callback.\n +* ::SI446X_WUT_BATT Check battery voltage - If the battery voltage is below the threshold set by ::Si446x_setLowBatt() then wake up the microcontroller and run the ::SI446X_CB_LOWBATT() callback.\n +* ::SI446X_WUT_RX Enter receive mode for a length of time determinded by the ldc and r parameters (NOT SUPPORTED YET! dont use this option)\n +*\n +* For more info see the GLOBAL_WUT_M, GLOBAL_WUT_R and GLOBAL_WUT_LDC properties in the Si446x API docs.\n +* +* @note When first turning on the WUT this function will take around 300us to complete +* @param [r] Exponent value for WUT and LDC (Maximum valus is 20) +* @param [m] Mantissia value for WUT +* @param [ldc] Mantissia value for LDC (NOT SUPPORTED YET, just pass 0 for now) +* @param [config] Which WUT features to enable ::SI446X_WUT_RUN ::SI446X_WUT_BATT ::SI446X_WUT_RX These can be bitwise OR'ed together to enable multiple features. +* @return (none) +*/ +void Si446x_setupWUT(uint8_t r, uint16_t m, uint8_t ldc, uint8_t config); + +/** +* @brief Disable the wake up timer +* +* @return (none) +*/ +void Si446x_disableWUT(void); + +/** +* @brief Enter sleep mode +* +* If WUT is enabled then the radio will keep the internal 32KHz RC enabled with a current consumption of 740nA, otherwise the current consumption will be 40nA without WUT. +* Sleep will fail if the radio is currently transmitting. +* +* @note Any SPI communications with the radio will wake the radio into ::SI446X_STATE_SPI_ACTIVE mode. ::Si446x_sleep() will need to called again to put it back into sleep mode. +* +* @return 0 on failure (busy transmitting something), 1 on success +*/ +uint8_t Si446x_sleep(void); + +/** +* @brief Get the radio status +* +* @see ::si446x_state_t +* @return The current radio status +*/ +si446x_state_t Si446x_getState(void); + +/** +* @brief Read pin ADC value +* +* @param [pin] The GPIO pin number (0 - 3) +* @return ADC value (0 - 2048, where 2048 is 3.6V) +*/ +uint16_t Si446x_adc_gpio(uint8_t pin); + +/** +* @brief Read supply voltage +* +* @return Supply voltage in millivolts +*/ +uint16_t Si446x_adc_battery(void); + +/** +* @brief Read temperature +* +* @return Temperature in C +*/ +float Si446x_adc_temperature(void); + +/** +* @brief Configure GPIO/NIRQ/SDO pin +* +* @note NIRQ and SDO pins should not be changed, unless you really know what you're doing. 2 of the GPIO pins (usually 0 and 1) are also usually used for the RX/TX RF switch and should also be left alone. +* +* @param [pin] The pin, this can only take a single pin (don't use bitwise OR), see ::si446x_gpio_t +* @param [value] The new pin mode, this can be bitwise OR'd with the ::SI446X_PIN_PULL_EN option, see ::si446x_gpio_mode_t ::si446x_nirq_mode_t ::si446x_sdo_mode_t +* @return (none) +*/ +void Si446x_writeGPIO(si446x_gpio_t pin, uint8_t value); + +/** +* @brief Read GPIO pin states +* +* @return The pin states. Use ::si446x_gpio_t to mask the value to get the state for the desired pin. +*/ +uint8_t Si446x_readGPIO(void); + +/** +* @brief Get all values of a property group +* +* @param [buff] Pointer to memory to place group values, if this is NULL then nothing will be dumped, just the group size is returned +* @param [group] The group to dump +* @return Size of the property group +*/ +uint8_t Si446x_dump(void* buff, uint8_t group); + + +#endif /* SI443X_H_ */ diff --git a/Si446x_defs.h b/Si446x_defs.h new file mode 100644 index 0000000..26cb806 --- /dev/null +++ b/Si446x_defs.h @@ -0,0 +1,124 @@ +/* + * Project: Si4463 Radio Library for AVR and Arduino + * Author: Zak Kemble, contact@zakkemble.co.uk + * Copyright: (C) 2017 by Zak Kemble + * License: GNU GPL v3 (see License.txt) + * Web: http://blog.zakkemble.co.uk/si4463-radio-library-avr-arduino/ + */ + +#ifndef SI446X_DEFS_H_ +#define SI446X_DEFS_H_ + +#define SI446X_CMD_POWER_UP 0x02 +#define SI446X_CMD_NOP 0x00 +#define SI446X_CMD_PART_INFO 0x01 +#define SI446X_CMD_FUNC_INFO 0x10 +#define SI446X_CMD_SET_PROPERTY 0x11 +#define SI446X_CMD_GET_PROPERTY 0x12 +#define SI446X_CMD_GPIO_PIN_CFG 0x13 +#define SI446X_CMD_FIFO_INFO 0x15 +#define SI446X_CMD_GET_INT_STATUS 0x20 +#define SI446X_CMD_REQUEST_DEVICE_STATE 0x33 +#define SI446X_CMD_CHANGE_STATE 0x34 +#define SI446X_CMD_READ_CMD_BUFF 0x44 +#define SI446X_CMD_READ_FRR_A 0x50 +#define SI446X_CMD_READ_FRR_B 0x51 +#define SI446X_CMD_READ_FRR_C 0x53 +#define SI446X_CMD_READ_FRR_D 0x57 +#define SI446X_CMD_IRCAL 0x17 +#define SI446X_CMD_IRCAL_MANUAL 0x1a +#define SI446X_CMD_START_TX 0x31 +#define SI446X_CMD_TX_HOP 0x37 +#define SI446X_CMD_WRITE_TX_FIFO 0x66 +#define SI446X_CMD_PACKET_INFO 0x16 +#define SI446X_CMD_GET_MODEM_STATUS 0x22 +#define SI446X_CMD_START_RX 0x32 +#define SI446X_CMD_RX_HOP 0x36 +#define SI446X_CMD_READ_RX_FIFO 0x77 +#define SI446X_CMD_GET_ADC_READING 0x14 +#define SI446X_CMD_GET_PH_STATUS 0x21 +#define SI446X_CMD_GET_CHIP_STATUS 0x23 + +#define SI446X_INT_CTL_CHIP_LOW_BATT_EN 1 +#define SI446X_INT_CTL_CHIP_WUT_EN 0 + +typedef enum +{ + SI446X_ADC_CONV_TEMP = 16, + SI446X_ADC_CONV_BATT = 8, + SI446X_ADC_CONV_GPIO = 4 +} si446x_adc_conv_t; + +typedef enum +{ + SI446X_ADC_RANGE_0P8 = 0, + SI446X_ADC_RANGE_1P6 = 4, + SI446X_ADC_RANGE_3P2 = 5, + SI446X_ADC_RANGE_2P4 = 8, + SI446X_ADC_RANGE_3P6 = 9 +} si446x_adc_range_t; + +#define SI446X_FIFO_CLEAR_RX 0x02 +#define SI446X_FIFO_CLEAR_TX 0x01 + +#define GLOBAL_PROP(prop) ((SI446X_PROP_GROUP_GLOBAL<<8) | prop) +#define INT_PROP(prop) ((SI446X_PROP_GROUP_INT<<8) | prop) +#define PKT_PROP(prop) ((SI446X_PROP_GROUP_PKT<<8) | prop) +#define PA_PROP(prop) ((SI446X_PROP_GROUP_PA<<8) | prop) +#define MATCH_PROP(prop) ((SI446X_PROP_GROUP_MATCH<<8) | prop) + +#define SI446X_GLOBAL_CONFIG GLOBAL_PROP(0x03) +#define SI446X_FIFO_MODE_HALF_DUPLEX 0x10 + +#define SI446X_GLOBAL_CLK_CFG GLOBAL_PROP(0x01) +#define SI446X_DIVIDED_CLK_DIS 0x00 +#define SI446X_DIVIDED_CLK_EN 0x40 +#define SI446X_DIVIDED_CLK_SEL_DIV_1 0<<5 +#define SI446X_DIVIDED_CLK_SEL_DIV_2 1<<5 +#define SI446X_DIVIDED_CLK_SEL_DIV_3 2<<5 +#define SI446X_DIVIDED_CLK_SEL_DIV_7_5 3<<5 +#define SI446X_DIVIDED_CLK_SEL_DIV_10 4<<5 +#define SI446X_DIVIDED_CLK_SEL_DIV_15 5<<5 +#define SI446X_DIVIDED_CLK_SEL_DIV_30 6<<5 +#define SI446X_DIVIDED_CLK_32K_SEL_OFF 0x00 +#define SI446X_DIVIDED_CLK_32K_SEL_RC 0x01 +#define SI446X_DIVIDED_CLK_32K_SEL_XTAL 0x02 + +#define SI446X_GLOBAL_LOW_BATT_THRESH GLOBAL_PROP(0x02) +#define SI446X_GLOBAL_WUT_CONFIG GLOBAL_PROP(0x04) +#define SI446X_GLOBAL_WUT_M GLOBAL_PROP(0x05) +#define SI446X_GLOBAL_WUT_R GLOBAL_PROP(0x07) +#define SI446X_GLOBAL_WUT_LDC GLOBAL_PROP(0x08) +#define SI446X_WUT_SLEEP 5 +#define SI446X_LDC_MAX_PERIODS_FOREVER 0<<6 +#define SI446X_LDC_MAX_PERIODS_TWO 1<<6 +#define SI446X_LDC_MAX_PERIODS_FOUR 2<<6 +#define SI446X_LDC_MAX_PERIODS_EIGHT 3<<6 +#define SI446X_GLOBAL_WUT_CONFIG_WUT_LDC_EN_RX 1<<6 +#define SI446X_GLOBAL_WUT_CONFIG_WUT_EN 1 +#define SI446X_GLOBAL_WUT_CONFIG_WUT_LBD_EN 2 + +#define SI446X_INT_CTL_ENABLE INT_PROP(0x00) +#define SI446X_INT_CTL_PH_ENABLE INT_PROP(0x01) +#define SI446X_INT_CTL_MODEM_ENABLE INT_PROP(0x02) +#define SI446X_INT_CTL_CHIP_ENABLE INT_PROP(0x03) +#define SI446X_FILTER_MATCH_PEND 7 +#define SI446X_FILTER_MISS_PEND 6 +#define SI446X_PACKET_SENT_PEND 5 +#define SI446X_PACKET_RX_PEND 4 +#define SI446X_CRC_ERROR_PEND 3 +#define SI446X_INVALID_SYNC_PEND 5 +#define SI446X_SYNC_DETECT_PEND 0 +#define SI446X_LOW_BATT_PEND 1 +#define SI446X_WUT_PEND 0 + +#define SI446X_MATCH_VALUE_1 MATCH_PROP(0x00) +#define SI446X_MATCH_EN 0x40 + +#define SI446X_PA_PWR_LVL PA_PROP(0x01) + +#define SI446X_PKT_FIELD_1_LENGTH PKT_PROP(0x0D) +#define SI446X_PKT_FIELD_2_LENGTH PKT_PROP(0x11) +#define SI446X_PKT_FIELD_2_LENGTH_LOW PKT_PROP(0x12) + +#endif /* SI446X_DEFS_H_ */ diff --git a/main.c b/main.c index 9408802..dbdb850 100644 --- a/main.c +++ b/main.c @@ -2741,6 +2741,9 @@ goto again; i2sObjectInit(&I2SD2); i2sStart(&I2SD2, &i2sconfig); i2sStartExchange(&I2SD2); +#endif +#ifdef __SI4463__ + SI4463_init(); #endif area_height = AREA_HEIGHT_NORMAL; ui_init(); diff --git a/nanovna.h b/nanovna.h index 9621090..23af971 100644 --- a/nanovna.h +++ b/nanovna.h @@ -37,6 +37,7 @@ //#define __ULTRA__ // Add harmonics mode on low input. //#define __ULTRA_SA__ // Adds ADF4351 control for extra high 1st IF stage #define __SPUR__ // Does spur reduction by shifting IF +#define __SI4463__ /* * main.c diff --git a/sa_core.c b/sa_core.c index c35c94b..c963ea5 100644 --- a/sa_core.c +++ b/sa_core.c @@ -1710,8 +1710,8 @@ pureRSSI_t perform(bool break_on_operation, int i, uint32_t f, int tracking) start_of_sweep_timestamp = chVTGetSystemTimeX(); } else - pureRSSI = SI4432_RSSI(lf, MODE_SELECT(setting.mode)); // Get RSSI, either from pre-filled buffer - +// pureRSSI = SI4432_RSSI(lf, MODE_SELECT(setting.mode)); // Get RSSI, either from pre-filled buffer + pureRSSI = Si446x_RSSI(); // Get RSSI, either from pre-filled buffer #ifdef __SPUR__ static pureRSSI_t spur_RSSI = -1; // Initialization only to avoid warning. if (setting.spur == 1) { // If first spur pass diff --git a/si4432.c b/si4432.c index 71d980f..1365af8 100644 --- a/si4432.c +++ b/si4432.c @@ -26,7 +26,7 @@ #include "spi.h" #pragma GCC push_options -#pragma GCC optimize ("O2") +#pragma GCC optimize ("Og") // Define for use hardware SPI mode #define USE_HARDWARE_SPI_MODE @@ -38,12 +38,15 @@ #define SI_CS_LOW palClearPad(GPIOA, GPIOA_SI_SEL) #define SI_CS_HIGH palSetPad(GPIOA, GPIOA_SI_SEL) +#define SI_SDN_LOW palClearPad(GPIOC, 15) +#define SI_SDN_HIGH palSetPad(GPIOC, 15) + // Hardware or software SPI use #ifdef USE_HARDWARE_SPI_MODE #define SI4432_SPI SPI1 //#define SI4432_SPI_SPEED SPI_BR_DIV8 -#define SI4432_SPI_SPEED SPI_BR_DIV64 +#define SI4432_SPI_SPEED SPI_BR_DIV32 static uint32_t old_spi_settings; #else static uint32_t old_port_moder; @@ -201,7 +204,7 @@ static void shiftOutBuf(uint8_t *buf, uint16_t size) { } #endif -const uint16_t SI_nSEL[MAX_SI4432+1] = { GPIOB_RX_SEL, GPIOB_LO_SEL, 0}; // #3 is dummy!!!!!! +const uint16_t SI_nSEL[MAX_SI4432+1] = { GPIOB_LO_SEL, GPIOB_LO_SEL, 0}; // #3 is dummy!!!!!! volatile int SI4432_Sel = 0; // currently selected SI4432 // volatile int SI4432_guard = 0; @@ -676,6 +679,7 @@ void SI4432_Sub_Init(void) void SI4432_Init() { + return; #if 1 CS_SI0_LOW; // Drop CS so power can be removed @@ -1200,4 +1204,332 @@ void ADF4351_prep_frequency(int channel, unsigned long freq, int drive) // freq #endif +// ------------------------------ SI4463 ------------------------------------- + + +#include + +void SI4463_write_byte(byte ADR, byte DATA) +{ + set_SPI_mode(SPI_MODE_SI); +// if (SI4432_guard) +// while(1) ; +// SI4432_guard = 1; +// SPI1_CLK_LOW; + palClearPad(GPIOB, GPIOB_RX_SEL); + my_microsecond_delay(2); +// chThdSleepMicroseconds(SELECT_DELAY); + ADR |= 0x80 ; // RW = 1 + shiftOut( ADR ); + shiftOut( DATA ); + my_microsecond_delay(2); + palSetPad(GPIOB, GPIOB_RX_SEL); + my_microsecond_delay(2); +// SI4432_guard = 0; +} + +void SI4463_write_buffer(byte ADR, byte *DATA, int len) +{ + set_SPI_mode(SPI_MODE_SI); +// if (SI4432_guard) +// while(1) ; +// SI4432_guard = 1; +// SPI1_CLK_LOW; + palClearPad(GPIOB, GPIOB_RX_SEL); + my_microsecond_delay(2); +// chThdSleepMicroseconds(SELECT_DELAY); + ADR |= 0x80 ; // RW = 1 + shiftOut( ADR ); + while (len-- > 0) + shiftOut( *(DATA++) ); + my_microsecond_delay(2); + palSetPad(GPIOB, GPIOB_RX_SEL); + my_microsecond_delay(2); +// SI4432_guard = 0; +} + + +byte SI4463_read_byte( byte ADR ) +{ +// set_SPI_mode(SPI_MODE_SI); + byte DATA ; +// if (SI4432_guard) +// while(1) ; +// SI4432_guard = 1; +// SPI1_CLK_LOW; + palClearPad(GPIOB, GPIOB_RX_SEL); + my_microsecond_delay(2); + shiftOut( ADR ); + my_microsecond_delay(2); + DATA = shiftIn(); + my_microsecond_delay(2); + palSetPad(GPIOB, GPIOB_RX_SEL); + my_microsecond_delay(2); +// SI4432_guard = 0; + return DATA ; +} + +uint8_t SI4463_get_response(void* buff, uint8_t len) +{ + uint8_t cts = 0; + set_SPI_mode(SPI_MODE_SI); + // if (SI4432_guard) + // while(1) ; + // SI4432_guard = 1; + // SPI1_CLK_LOW; + palClearPad(GPIOB, GPIOB_RX_SEL); + my_microsecond_delay(2); + shiftOut( SI446X_CMD_READ_CMD_BUFF ); + my_microsecond_delay(2); + cts = (shiftIn() == 0xFF); + my_microsecond_delay(2); + if (cts) + { + // Get response data + for(uint8_t i=0;i>8), + len, + (uint8_t)prop + }; + + // Copy values into data, starting at index 4 + memcpy(data + 4, values, len); + + SI4463_do_api(data, len + 4, NULL, 0); +} + +#include "SI4463_radio_config.h" +#include "SI446x_cmd.h" + +static const uint8_t SI4463_config[] = RADIO_CONFIGURATION_DATA_ARRAY; + +// Set new state +static void SI4463_set_state(si446x_state_t newState) +{ + uint8_t data[] = { + SI446X_CMD_CHANGE_STATE, + newState + }; + SI4463_do_api(data, sizeof(data), NULL, 0); +} + +static void SI4463_clear_FIFO(void) +{ + // 'static const' saves 20 bytes of flash here, but uses 2 bytes of RAM + static const uint8_t clearFifo[] = { + SI446X_CMD_FIFO_INFO, + SI446X_FIFO_CLEAR_RX | SI446X_FIFO_CLEAR_TX + }; + SI4463_do_api((uint8_t*)clearFifo, sizeof(clearFifo), NULL, 0); +} + +void SI4463_start_rx(uint8_t CHANNEL) +{ + uint8_t data[] = { + SI446X_CMD_ID_START_RX, + CHANNEL, + 0, + 0, + 0, + SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_NOCHANGE, + SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_RX, + SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_RX + }; +//retry: + SI4463_do_api(data, sizeof(data), NULL, 0); +#if 0 + // my_microsecond_delay(15000); +// si446x_state_t s = getState(); + if (s != SI446X_STATE_RX) { + my_microsecond_delay(10); + goto retry; + } +#endif +} + +si446x_info_t SI4463_info; + +void Si446x_getInfo(si446x_info_t* info) +{ + uint8_t data[8] = { + SI446X_CMD_PART_INFO + }; + SI4463_do_api(data, 1, data, 8); + + info->chipRev = data[0]; + info->part = (data[1]<<8) | data[2]; + info->partBuild = data[3]; + info->id = (data[4]<<8) | data[5]; + info->customer = data[6]; + info->romId = data[7]; + + + data[0] = SI446X_CMD_FUNC_INFO; + SI4463_do_api(data, 1, data, 6); + + info->revExternal = data[0]; + info->revBranch = data[1]; + info->revInternal = data[2]; + info->patch = (data[3]<<8) | data[4]; + info->func = data[5]; +} + + + +// Read a fast response register +uint8_t getFRR(uint8_t reg) +{ + return SI4463_read_byte(reg); +} + +// Get current radio state + si446x_state_t getState(void) +{ + uint8_t state = getFRR(SI446X_CMD_READ_FRR_B); + if(state == SI446X_STATE_TX_TUNE) + state = SI446X_STATE_TX; + else if(state == SI446X_STATE_RX_TUNE) + state = SI446X_STATE_RX; + else if(state == SI446X_STATE_READY2) + state = SI446X_STATE_READY; + return (si446x_state_t)state; +} + +// Set new state +void setState(si446x_state_t newState) +{ + uint8_t data[] = { + SI446X_CMD_CHANGE_STATE, + newState + }; + SI4463_do_api(data, sizeof(data), NULL, 0); +} + + +int16_t Si446x_RSSI(void) +{ +// Si446x_getInfo(&SI4463_info); + +// if (s != SI446X_STATE_RX) +// SI4463_start_rx(90); +// SI4463_start_rx(90); + + uint8_t data[3] = { + SI446X_CMD_GET_MODEM_STATUS, + 0xFF + }; +// volatile si446x_state_t s = getState(); + + SI4463_do_api(data, 2, data, 3); + int16_t rssi = 16 * data[2]; + return rssi; +} + + +// Do an ADC conversion +static uint16_t getADC(uint8_t adc_en, uint8_t adc_cfg, uint8_t part) +{ + uint8_t data[6] = { + SI446X_CMD_GET_ADC_READING, + adc_en, + adc_cfg + }; + SI4463_do_api(data, 3, data, 6); + return (data[part]<<8 | data[part + 1]); +} + + + +void SI4463_init(void) +{ + volatile int16_t RSSI; +reset: + SI_SDN_LOW; + my_microsecond_delay(1000); + SI_SDN_HIGH; + my_microsecond_delay(10000); + SI_SDN_LOW; + my_microsecond_delay(10000); + + +#if 1 +for(uint16_t i=0;i> 7) + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_ENUM_NO_PATCH 0 + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_PATCH_ENUM_PATCH 1 + /* macros for field FUNC access */ + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_TYPE enum + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_SIZE 6 + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_MASK 0x3f + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_MSB 5 + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_LSB 0 + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_INDEX 1 + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_value (((cmd.arg.POWER_UP.BOOT_OPTIONS & 0x3f))) + #define SI446X_CMD_POWER_UP_ARG_BOOT_OPTIONS_FUNC_ENUM_PRO 1 + /* macros for entire ARG XTAL_OPTIONS access of type U8 */ + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TYPE U8 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_SIZE 8 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_MASK 0xff + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_MSB 7 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_LSB 0 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_INDEX 2 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_value (((cmd.arg.POWER_UP.XTAL_OPTIONS))) + /* macros for field TCXO access */ + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_TYPE enum + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_SIZE 1 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_MASK 0x1 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_BIT 0x1 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_MSB 0 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_LSB 0 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_INDEX 2 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_is_true (cmd.arg.POWER_UP.XTAL_OPTIONS & 0x1) + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_value (((cmd.arg.POWER_UP.XTAL_OPTIONS & 0x1))) + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_ENUM_XTAL 0 + #define SI446X_CMD_POWER_UP_ARG_XTAL_OPTIONS_TCXO_ENUM_TCXO 1 + /* macros for entire ARG XO_FREQ access of type U32 */ + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_TYPE U32 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_SIZE 32 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_MASK 0xffffffff + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_MSB 31 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_LSB 0 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_INDEX 3 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_value (((cmd.arg.POWER_UP.XO_FREQ))) + /* macros for field XO_FREQ access */ + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_TYPE U32 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_SIZE 32 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MASK 0xffffffff + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MSB 31 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_LSB 0 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_INDEX 3 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MIN 0x17d7840 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_MAX 0x1e84800 + #define SI446X_CMD_POWER_UP_ARG_XO_FREQ_XO_FREQ_value (((cmd.arg.POWER_UP.XO_FREQ & 0xffffffff))) +/* POWER_UP REPLY */ +#define SI446X_CMD_REPLY_COUNT_POWER_UP 0 +/* common commands */ + +#define SI446X_CMD_ID_NOP 0x00 +/* NOP ARGS */ +#define SI446X_CMD_ARG_COUNT_NOP 1 +/* NOP REPLY */ +#define SI446X_CMD_REPLY_COUNT_NOP 0 +#define SI446X_CMD_ID_PART_INFO 0x01 +/* PART_INFO ARGS */ +#define SI446X_CMD_ARG_COUNT_PART_INFO 1 +/* PART_INFO REPLY */ +#define SI446X_CMD_REPLY_COUNT_PART_INFO 8 + /* macros for entire REPLY CHIPREV access of type U8 */ + #define SI446X_CMD_PART_INFO_REP_CHIPREV_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_CHIPREV_MSB 7 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_LSB 0 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_INDEX 1 + /* macros for field CHIPREV access */ + #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_MSB 7 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_LSB 0 + #define SI446X_CMD_PART_INFO_REP_CHIPREV_CHIPREV_INDEX 1 + /* macros for entire REPLY PART access of type U16 */ + #define SI446X_CMD_PART_INFO_REP_PART_TYPE U16 + #define SI446X_CMD_PART_INFO_REP_PART_SIZE 16 + #define SI446X_CMD_PART_INFO_REP_PART_MASK 0xffff + #define SI446X_CMD_PART_INFO_REP_PART_MSB 15 + #define SI446X_CMD_PART_INFO_REP_PART_LSB 0 + #define SI446X_CMD_PART_INFO_REP_PART_INDEX 2 + /* macros for field PART access */ + #define SI446X_CMD_PART_INFO_REP_PART_PART_TYPE U16 + #define SI446X_CMD_PART_INFO_REP_PART_PART_SIZE 16 + #define SI446X_CMD_PART_INFO_REP_PART_PART_MASK 0xffff + #define SI446X_CMD_PART_INFO_REP_PART_PART_MSB 15 + #define SI446X_CMD_PART_INFO_REP_PART_PART_LSB 0 + #define SI446X_CMD_PART_INFO_REP_PART_PART_INDEX 2 + /* macros for entire REPLY PBUILD access of type U8 */ + #define SI446X_CMD_PART_INFO_REP_PBUILD_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_PBUILD_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_PBUILD_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_PBUILD_MSB 7 + #define SI446X_CMD_PART_INFO_REP_PBUILD_LSB 0 + #define SI446X_CMD_PART_INFO_REP_PBUILD_INDEX 4 + /* macros for field PBUILD access */ + #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_MSB 7 + #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_LSB 0 + #define SI446X_CMD_PART_INFO_REP_PBUILD_PBUILD_INDEX 4 + /* macros for entire REPLY ID access of type U16 */ + #define SI446X_CMD_PART_INFO_REP_ID_TYPE U16 + #define SI446X_CMD_PART_INFO_REP_ID_SIZE 16 + #define SI446X_CMD_PART_INFO_REP_ID_MASK 0xffff + #define SI446X_CMD_PART_INFO_REP_ID_MSB 15 + #define SI446X_CMD_PART_INFO_REP_ID_LSB 0 + #define SI446X_CMD_PART_INFO_REP_ID_INDEX 5 + /* macros for field ID access */ + #define SI446X_CMD_PART_INFO_REP_ID_ID_TYPE U16 + #define SI446X_CMD_PART_INFO_REP_ID_ID_SIZE 16 + #define SI446X_CMD_PART_INFO_REP_ID_ID_MASK 0xffff + #define SI446X_CMD_PART_INFO_REP_ID_ID_MSB 15 + #define SI446X_CMD_PART_INFO_REP_ID_ID_LSB 0 + #define SI446X_CMD_PART_INFO_REP_ID_ID_INDEX 5 + /* macros for entire REPLY CUSTOMER access of type U8 */ + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_MSB 7 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_LSB 0 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_INDEX 7 + /* macros for field CUSTOMER access */ + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_MSB 7 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_LSB 0 + #define SI446X_CMD_PART_INFO_REP_CUSTOMER_CUSTOMER_INDEX 7 + /* macros for entire REPLY ROMID access of type U8 */ + #define SI446X_CMD_PART_INFO_REP_ROMID_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_ROMID_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_ROMID_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_ROMID_MSB 7 + #define SI446X_CMD_PART_INFO_REP_ROMID_LSB 0 + #define SI446X_CMD_PART_INFO_REP_ROMID_INDEX 8 + /* macros for field ROMID access */ + #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_TYPE U8 + #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_SIZE 8 + #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_MASK 0xff + #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_MSB 7 + #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_LSB 0 + #define SI446X_CMD_PART_INFO_REP_ROMID_ROMID_INDEX 8 +#define SI446X_CMD_ID_FUNC_INFO 0x10 +/* FUNC_INFO ARGS */ +#define SI446X_CMD_ARG_COUNT_FUNC_INFO 1 +/* FUNC_INFO REPLY */ +#define SI446X_CMD_REPLY_COUNT_FUNC_INFO 6 + /* macros for entire REPLY REVEXT access of type U8 */ + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_INDEX 1 + /* macros for field REVEXT access */ + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_INDEX 1 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MIN 0x0 + #define SI446X_CMD_FUNC_INFO_REP_REVEXT_REVEXT_MAX 0xff + /* macros for entire REPLY REVBRANCH access of type U8 */ + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_INDEX 2 + /* macros for field REVBRANCH access */ + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_INDEX 2 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MIN 0x0 + #define SI446X_CMD_FUNC_INFO_REP_REVBRANCH_REVBRANCH_MAX 0xff + /* macros for entire REPLY REVINT access of type U8 */ + #define SI446X_CMD_FUNC_INFO_REP_REVINT_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_REVINT_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_INDEX 3 + /* macros for field REVINT access */ + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_INDEX 3 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MIN 0x0 + #define SI446X_CMD_FUNC_INFO_REP_REVINT_REVINT_MAX 0xff + /* macros for entire REPLY FUNC access of type U8 */ + #define SI446X_CMD_FUNC_INFO_REP_FUNC_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_FUNC_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_INDEX 6 + /* macros for field FUNC access */ + #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_TYPE U8 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_SIZE 8 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_MASK 0xff + #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_MSB 7 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_LSB 0 + #define SI446X_CMD_FUNC_INFO_REP_FUNC_FUNC_INDEX 6 +#define SI446X_CMD_ID_SET_PROPERTY 0x11 +/* SET_PROPERTY ARGS */ +#define SI446X_CMD_ARG_COUNT_SET_PROPERTY 16 + /* macros for entire ARG GROUP access of type U8 */ + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_INDEX 1 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_value (((cmd.arg.SET_PROPERTY.GROUP))) + /* macros for field GROUP access */ + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_INDEX 1 + #define SI446X_CMD_SET_PROPERTY_ARG_GROUP_GROUP_value (((cmd.arg.SET_PROPERTY.GROUP & 0xff))) + /* macros for entire ARG NUM_PROPS access of type U8 */ + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_INDEX 2 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_value (((cmd.arg.SET_PROPERTY.NUM_PROPS))) + /* macros for field NUM_PROPS access */ + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_INDEX 2 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MIN 0x1 + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MAX 0xc + #define SI446X_CMD_SET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_value (((cmd.arg.SET_PROPERTY.NUM_PROPS & 0xff))) + /* macros for entire ARG START_PROP access of type U8 */ + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_INDEX 3 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_value (((cmd.arg.SET_PROPERTY.START_PROP))) + /* macros for field START_PROP access */ + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_INDEX 3 + #define SI446X_CMD_SET_PROPERTY_ARG_START_PROP_START_PROP_value (((cmd.arg.SET_PROPERTY.START_PROP & 0xff))) + /* macros for entire ARG DATA access of type U8 */ + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_INDEX 4 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_ARRAY_LEN 12 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_value(i) (((cmd.arg.SET_PROPERTY.DATA[(i)]))) + /* macros for field DATA access */ + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_TYPE U8 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_SIZE 8 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_MASK 0xff + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_MSB 7 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_LSB 0 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_INDEX 4 + #define SI446X_CMD_SET_PROPERTY_ARG_DATA_DATA_value(i) (((cmd.arg.SET_PROPERTY.DATA[(i)] & 0xff))) +/* SET_PROPERTY REPLY */ +#define SI446X_CMD_REPLY_COUNT_SET_PROPERTY 0 +#define SI446X_CMD_ID_GET_PROPERTY 0x12 +/* GET_PROPERTY ARGS */ +#define SI446X_CMD_ARG_COUNT_GET_PROPERTY 4 + /* macros for entire ARG GROUP access of type U8 */ + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_MSB 7 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_LSB 0 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_INDEX 1 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_value (((cmd.arg.GET_PROPERTY.GROUP))) + /* macros for field GROUP access */ + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_MSB 7 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_LSB 0 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_INDEX 1 + #define SI446X_CMD_GET_PROPERTY_ARG_GROUP_GROUP_value (((cmd.arg.GET_PROPERTY.GROUP & 0xff))) + /* macros for entire ARG NUM_PROPS access of type U8 */ + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_MSB 7 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_LSB 0 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_INDEX 2 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_value (((cmd.arg.GET_PROPERTY.NUM_PROPS))) + /* macros for field NUM_PROPS access */ + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MSB 7 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_LSB 0 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_INDEX 2 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MIN 0x1 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_MAX 0x10 + #define SI446X_CMD_GET_PROPERTY_ARG_NUM_PROPS_NUM_PROPS_value (((cmd.arg.GET_PROPERTY.NUM_PROPS & 0xff))) + /* macros for entire ARG START_PROP access of type U8 */ + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_MSB 7 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_LSB 0 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_INDEX 3 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_value (((cmd.arg.GET_PROPERTY.START_PROP))) + /* macros for field START_PROP access */ + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_MSB 7 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_LSB 0 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_INDEX 3 + #define SI446X_CMD_GET_PROPERTY_ARG_START_PROP_START_PROP_value (((cmd.arg.GET_PROPERTY.START_PROP & 0xff))) +/* GET_PROPERTY REPLY */ +#define SI446X_CMD_REPLY_COUNT_GET_PROPERTY 16 + /* macros for entire REPLY DATA access of type U8 */ + #define SI446X_CMD_GET_PROPERTY_REP_DATA_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_REP_DATA_MSB 7 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_LSB 0 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_INDEX 1 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_ARRAY_LEN 16 + /* macros for field DATA access */ + #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_TYPE U8 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_SIZE 8 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_MASK 0xff + #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_MSB 7 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_LSB 0 + #define SI446X_CMD_GET_PROPERTY_REP_DATA_DATA_INDEX 1 +#define SI446X_CMD_ID_GPIO_PIN_CFG 0x13 +/* GPIO_PIN_CFG ARGS */ +#define SI446X_CMD_ARG_COUNT_GPIO_PIN_CFG 8 + /* macros for entire ARG GPIO access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_INDEX 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_ARRAY_LEN 4 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_value(i) (((cmd.arg.GPIO_PIN_CFG.GPIO[(i)]))) + /* macros for field PULL_CTL access */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_SIZE 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_MASK 0x40 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_BIT 0x40 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_MSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_LSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_INDEX 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_is_true(i) (cmd.arg.GPIO_PIN_CFG.GPIO[(i)] & 0x40) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_value(i) (((cmd.arg.GPIO_PIN_CFG.GPIO[(i)] & 0x40)) >> 6) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_ENUM_PULL_DIS 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_PULL_CTL_ENUM_PULL_EN 1 + /* macros for field GPIO_MODE access */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_SIZE 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_MASK 0x3f + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_MSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_INDEX 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_value(i) (((cmd.arg.GPIO_PIN_CFG.GPIO[(i)] & 0x3f))) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DONOTHING 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TRISTATE 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DRIVE0 2 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DRIVE1 3 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_INPUT 4 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_32K_CLK 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_BOOT_CLK 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_DIV_CLK 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CTS 8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_INV_CTS 9 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CMD_OVERLAP 10 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_SDO 11 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_POR 12 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CAL_WUT 13 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_WUT 14 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_EN_PA 15 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_DATA_CLK 16 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_DATA_CLK 17 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_EN_LNA 18 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_DATA 19 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_DATA 20 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_RAW_DATA 21 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_ANTENNA_1_SW 22 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_ANTENNA_2_SW 23 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_VALID_PREAMBLE 24 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_INVALID_PREAMBLE 25 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_SYNC_WORD_DETECT 26 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CCA 27 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_IN_SLEEP 28 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_RX_DATA_CLK 31 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_STATE 32 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_STATE 33 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_RX_FIFO_FULL 34 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_TX_FIFO_EMPTY 35 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_LOW_BATT 36 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_CCA_LATCH 37 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_HOPPED 38 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GPIO_GPIO_MODE_ENUM_HOP_TABLE_WRAP 39 + /* macros for entire ARG NIRQ access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_INDEX 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_value (((cmd.arg.GPIO_PIN_CFG.NIRQ))) + /* macros for field PULL_CTL access */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_SIZE 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_MASK 0x40 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_BIT 0x40 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_MSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_LSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_INDEX 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_is_true (cmd.arg.GPIO_PIN_CFG.NIRQ & 0x40) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_value (((cmd.arg.GPIO_PIN_CFG.NIRQ & 0x40)) >> 6) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_ENUM_PULL_DIS 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_PULL_CTL_ENUM_PULL_EN 1 + /* macros for field NIRQ_MODE access */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_SIZE 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_MASK 0x3f + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_MSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_INDEX 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_value (((cmd.arg.GPIO_PIN_CFG.NIRQ & 0x3f))) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DONOTHING 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TRISTATE 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DRIVE0 2 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DRIVE1 3 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_INPUT 4 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_DIV_CLK 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_CTS 8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_SDO 11 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_POR 12 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_EN_PA 15 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TX_DATA_CLK 16 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_RX_DATA_CLK 17 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_EN_LNA 18 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TX_DATA 19 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_RX_DATA 20 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_RX_RAW_DATA 21 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_ANTENNA_1_SW 22 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_ANTENNA_2_SW 23 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_VALID_PREAMBLE 24 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_INVALID_PREAMBLE 25 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_SYNC_WORD_DETECT 26 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_CCA 27 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_TX_RX_DATA_CLK 31 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_NIRQ_NIRQ_MODE_ENUM_NIRQ 39 + /* macros for entire ARG SDO access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_INDEX 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_value (((cmd.arg.GPIO_PIN_CFG.SDO))) + /* macros for field PULL_CTL access */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_SIZE 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_MASK 0x40 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_BIT 0x40 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_MSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_LSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_INDEX 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_is_true (cmd.arg.GPIO_PIN_CFG.SDO & 0x40) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_value (((cmd.arg.GPIO_PIN_CFG.SDO & 0x40)) >> 6) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_ENUM_PULL_DIS 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_PULL_CTL_ENUM_PULL_EN 1 + /* macros for field SDO_MODE access */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_SIZE 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_MASK 0x3f + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_MSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_INDEX 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_value (((cmd.arg.GPIO_PIN_CFG.SDO & 0x3f))) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DONOTHING 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_TRISTATE 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DRIVE0 2 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DRIVE1 3 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_INPUT 4 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_32K_CLK 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_DIV_CLK 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_CTS 8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_SDO 11 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_POR 12 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_WUT 14 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_EN_PA 15 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_TX_DATA_CLK 16 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_RX_DATA_CLK 17 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_EN_LNA 18 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_TX_DATA 19 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_RX_DATA 20 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_RX_RAW_DATA 21 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_ANTENNA_1_SW 22 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_ANTENNA_2_SW 23 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_VALID_PREAMBLE 24 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_INVALID_PREAMBLE 25 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_SYNC_WORD_DETECT 26 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_SDO_SDO_MODE_ENUM_CCA 27 + /* macros for entire ARG GEN_CONFIG access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_INDEX 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_value (((cmd.arg.GPIO_PIN_CFG.GEN_CONFIG))) + /* macros for field DRV_STRENGTH access */ + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_SIZE 2 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_MASK 0x60 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_MSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_LSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_INDEX 7 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_value (((cmd.arg.GPIO_PIN_CFG.GEN_CONFIG & 0x60)) >> 5) + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_HIGH 0 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_HIGH 1 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_LOW 2 + #define SI446X_CMD_GPIO_PIN_CFG_ARG_GEN_CONFIG_DRV_STRENGTH_ENUM_LOW 3 +/* GPIO_PIN_CFG REPLY */ +#define SI446X_CMD_REPLY_COUNT_GPIO_PIN_CFG 7 + /* macros for entire REPLY GPIO access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_INDEX 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_ARRAY_LEN 4 + /* macros for field GPIO_STATE access */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_SIZE 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_MASK 0x80 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_BIT 0x80 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_LSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_INDEX 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_ENUM_INACTIVE 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_STATE_ENUM_ACTIVE 1 + /* macros for field GPIO_MODE access */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_SIZE 6 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_MASK 0x3f + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_MSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_INDEX 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DONOTHING 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TRISTATE 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DRIVE0 2 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DRIVE1 3 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_INPUT 4 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_32K_CLK 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_BOOT_CLK 6 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_DIV_CLK 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CTS 8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_INV_CTS 9 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CMD_OVERLAP 10 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_SDO 11 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_POR 12 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CAL_WUT 13 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_WUT 14 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_EN_PA 15 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_DATA_CLK 16 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_DATA_CLK 17 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_EN_LNA 18 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_DATA 19 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_DATA 20 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_RAW_DATA 21 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_ANTENNA_1_SW 22 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_ANTENNA_2_SW 23 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_VALID_PREAMBLE 24 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_INVALID_PREAMBLE 25 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_SYNC_WORD_DETECT 26 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CCA 27 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_IN_SLEEP 28 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_RX_DATA_CLK 31 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_STATE 32 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_STATE 33 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_RX_FIFO_FULL 34 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_TX_FIFO_EMPTY 35 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_LOW_BATT 36 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_CCA_LATCH 37 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_HOPPED 38 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GPIO_GPIO_MODE_ENUM_HOP_TABLE_WRAP 39 + /* macros for entire REPLY NIRQ access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_INDEX 5 + /* macros for field NIRQ_STATE access */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_SIZE 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_MASK 0x80 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_BIT 0x80 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_LSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_INDEX 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_ENUM_INACTIVE 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_STATE_ENUM_ACTIVE 1 + /* macros for field NIRQ_MODE access */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_SIZE 6 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_MASK 0x3f + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_MSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_INDEX 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DONOTHING 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TRISTATE 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DRIVE0 2 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DRIVE1 3 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_INPUT 4 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_DIV_CLK 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_CTS 8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_SDO 11 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_POR 12 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_EN_PA 15 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TX_DATA_CLK 16 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_RX_DATA_CLK 17 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_EN_LNA 18 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TX_DATA 19 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_RX_DATA 20 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_RX_RAW_DATA 21 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_ANTENNA_1_SW 22 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_ANTENNA_2_SW 23 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_VALID_PREAMBLE 24 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_INVALID_PREAMBLE 25 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_SYNC_WORD_DETECT 26 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_CCA 27 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_TX_RX_DATA_CLK 31 + #define SI446X_CMD_GPIO_PIN_CFG_REP_NIRQ_NIRQ_MODE_ENUM_NIRQ 39 + /* macros for entire REPLY SDO access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_INDEX 6 + /* macros for field SDO_STATE access */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_SIZE 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_MASK 0x80 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_BIT 0x80 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_LSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_INDEX 6 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_ENUM_INACTIVE 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_STATE_ENUM_ACTIVE 1 + /* macros for field SDO_MODE access */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_SIZE 6 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_MASK 0x3f + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_MSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_INDEX 6 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DONOTHING 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_TRISTATE 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DRIVE0 2 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DRIVE1 3 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_INPUT 4 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_32K_CLK 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_DIV_CLK 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_CTS 8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_SDO 11 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_POR 12 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_WUT 14 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_EN_PA 15 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_TX_DATA_CLK 16 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_RX_DATA_CLK 17 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_EN_LNA 18 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_TX_DATA 19 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_RX_DATA 20 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_RX_RAW_DATA 21 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_ANTENNA_1_SW 22 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_ANTENNA_2_SW 23 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_VALID_PREAMBLE 24 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_INVALID_PREAMBLE 25 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_SYNC_WORD_DETECT 26 + #define SI446X_CMD_GPIO_PIN_CFG_REP_SDO_SDO_MODE_ENUM_CCA 27 + /* macros for entire REPLY GEN_CONFIG access of type U8 */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_TYPE U8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_SIZE 8 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_MASK 0xff + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_MSB 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_LSB 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_INDEX 7 + /* macros for field DRV_STRENGTH access */ + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_TYPE enum + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_SIZE 2 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_MASK 0x60 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_MSB 6 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_LSB 5 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_INDEX 7 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_HIGH 0 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_HIGH 1 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_MED_LOW 2 + #define SI446X_CMD_GPIO_PIN_CFG_REP_GEN_CONFIG_DRV_STRENGTH_ENUM_LOW 3 +#define SI446X_CMD_ID_FIFO_INFO 0x15 +/* FIFO_INFO ARGS */ +#define SI446X_CMD_ARG_COUNT_FIFO_INFO 2 + /* macros for entire ARG FIFO access of type U8 */ + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TYPE U8 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_SIZE 8 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_MASK 0xff + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_MSB 7 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_LSB 0 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_INDEX 1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_value (((cmd.arg.FIFO_INFO.FIFO))) + /* macros for field RX access */ + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_TYPE enum + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_SIZE 1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_MASK 0x2 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_BIT 0x2 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_MSB 1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_LSB 1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_INDEX 1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_is_true (cmd.arg.FIFO_INFO.FIFO & 0x2) + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_value (((cmd.arg.FIFO_INFO.FIFO & 0x2)) >> 1) + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_ENUM_FALSE 0 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_RX_ENUM_TRUE 1 + /* macros for field TX access */ + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_TYPE enum + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_SIZE 1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_MASK 0x1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_BIT 0x1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_MSB 0 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_LSB 0 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_INDEX 1 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_is_true (cmd.arg.FIFO_INFO.FIFO & 0x1) + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_value (((cmd.arg.FIFO_INFO.FIFO & 0x1))) + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_ENUM_FALSE 0 + #define SI446X_CMD_FIFO_INFO_ARG_FIFO_TX_ENUM_TRUE 1 +/* FIFO_INFO REPLY */ +#define SI446X_CMD_REPLY_COUNT_FIFO_INFO 2 + /* macros for entire REPLY RX_FIFO_COUNT access of type U8 */ + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_TYPE U8 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_SIZE 8 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_MASK 0xff + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_MSB 7 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_LSB 0 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_INDEX 1 + /* macros for field RX_FIFO_COUNT access */ + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_TYPE U8 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_SIZE 8 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_MASK 0xff + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_MSB 7 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_LSB 0 + #define SI446X_CMD_FIFO_INFO_REP_RX_FIFO_COUNT_RX_FIFO_COUNT_INDEX 1 + /* macros for entire REPLY TX_FIFO_SPACE access of type U8 */ + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TYPE U8 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_SIZE 8 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_MASK 0xff + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_MSB 7 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_LSB 0 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_INDEX 2 + /* macros for field TX_FIFO_SPACE access */ + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_TYPE U8 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_SIZE 8 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_MASK 0xff + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_MSB 7 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_LSB 0 + #define SI446X_CMD_FIFO_INFO_REP_TX_FIFO_SPACE_TX_FIFO_SPACE_INDEX 2 +#define SI446X_CMD_ID_GET_INT_STATUS 0x20 +/* GET_INT_STATUS ARGS */ +#define SI446X_CMD_ARG_COUNT_GET_INT_STATUS 4 + /* macros for entire ARG PH_CLR_PEND access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND))) + /* macros for field FILTER_MATCH_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MASK 0x80 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_BIT 0x80 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_LSB 7 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x80) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x80)) >> 7) + /* macros for field FILTER_MISS_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x40) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x40)) >> 6) + /* macros for field PACKET_SENT_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x20) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x20)) >> 5) + /* macros for field PACKET_RX_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x10) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x10)) >> 4) + /* macros for field CRC_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x8) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x8)) >> 3) + /* macros for field ALT_CRC_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x4) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x4)) >> 2) + /* macros for field TX_FIFO_ALMOST_EMPTY_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x2) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x2)) >> 1) + /* macros for field RX_FIFO_ALMOST_FULL_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x1) + #define SI446X_CMD_GET_INT_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.PH_CLR_PEND & 0x1))) + /* macros for entire ARG MODEM_CLR_PEND access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND))) + /* macros for field RSSI_LATCH_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MASK 0x80 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_BIT 0x80 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_LSB 7 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x80) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x80)) >> 7) + /* macros for field POSTAMBLE_DETECT_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x40) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x40)) >> 6) + /* macros for field INVALID_SYNC_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x20) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x20)) >> 5) + /* macros for field RSSI_JUMP_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x10) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x10)) >> 4) + /* macros for field RSSI_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x8) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x8)) >> 3) + /* macros for field INVALID_PREAMBLE_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x4) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x4)) >> 2) + /* macros for field PREAMBLE_DETECT_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x2) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x2)) >> 1) + /* macros for field SYNC_DETECT_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_INDEX 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x1) + #define SI446X_CMD_GET_INT_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.MODEM_CLR_PEND & 0x1))) + /* macros for entire ARG CHIP_CLR_PEND access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND))) + /* macros for field CAL_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x40) + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x40)) >> 6) + /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x20) + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x20)) >> 5) + /* macros for field STATE_CHANGE_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x10) + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x10)) >> 4) + /* macros for field CMD_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x8) + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x8)) >> 3) + /* macros for field CHIP_READY_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x4) + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x4)) >> 2) + /* macros for field LOW_BATT_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x2) + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x2)) >> 1) + /* macros for field WUT_PEND_CLR access */ + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_INDEX 3 + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_is_true (cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x1) + #define SI446X_CMD_GET_INT_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_value (((cmd.arg.GET_INT_STATUS.CHIP_CLR_PEND & 0x1))) +/* GET_INT_STATUS REPLY */ +#define SI446X_CMD_REPLY_COUNT_GET_INT_STATUS 8 + /* macros for entire REPLY INT_PEND access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_INDEX 1 + /* macros for field CHIP_INT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_CHIP_INT_PEND_INDEX 1 + /* macros for field MODEM_INT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_MODEM_INT_PEND_INDEX 1 + /* macros for field PH_INT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_PEND_PH_INT_PEND_INDEX 1 + /* macros for entire REPLY INT_STATUS access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_INDEX 2 + /* macros for field CHIP_INT_STATUS access */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_CHIP_INT_STATUS_INDEX 2 + /* macros for field MODEM_INT_STATUS access */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_MODEM_INT_STATUS_INDEX 2 + /* macros for field PH_INT_STATUS access */ + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_INT_STATUS_PH_INT_STATUS_INDEX 2 + /* macros for entire REPLY PH_PEND access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_INDEX 3 + /* macros for field FILTER_MATCH_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MASK 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_BIT 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_LSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_INDEX 3 + /* macros for field FILTER_MISS_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_FILTER_MISS_PEND_INDEX 3 + /* macros for field PACKET_SENT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_SENT_PEND_INDEX 3 + /* macros for field PACKET_RX_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_PACKET_RX_PEND_INDEX 3 + /* macros for field CRC_ERROR_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_CRC_ERROR_PEND_INDEX 3 + /* macros for field ALT_CRC_ERROR_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_INDEX 3 + /* macros for field TX_FIFO_ALMOST_EMPTY_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_INDEX 3 + /* macros for field RX_FIFO_ALMOST_FULL_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_INDEX 3 + /* macros for entire REPLY PH_STATUS access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_INDEX 4 + /* macros for field FILTER_MATCH access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_MASK 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_BIT 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_LSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MATCH_INDEX 4 + /* macros for field FILTER_MISS access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_FILTER_MISS_INDEX 4 + /* macros for field PACKET_SENT access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_SENT_INDEX 4 + /* macros for field PACKET_RX access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_PACKET_RX_INDEX 4 + /* macros for field CRC_ERROR access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_CRC_ERROR_INDEX 4 + /* macros for field ALT_CRC_ERROR access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_INDEX 4 + /* macros for field TX_FIFO_ALMOST_EMPTY access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_INDEX 4 + /* macros for field RX_FIFO_ALMOST_FULL access */ + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_INDEX 4 + /* macros for entire REPLY MODEM_PEND access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INDEX 5 + /* macros for field RSSI_LATCH_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MASK 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_BIT 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_LSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_INDEX 5 + /* macros for field POSTAMBLE_DETECT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_INDEX 5 + /* macros for field INVALID_SYNC_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_INDEX 5 + /* macros for field RSSI_JUMP_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_INDEX 5 + /* macros for field RSSI_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_RSSI_PEND_INDEX 5 + /* macros for field INVALID_PREAMBLE_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_INDEX 5 + /* macros for field PREAMBLE_DETECT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_INDEX 5 + /* macros for field SYNC_DETECT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_INDEX 5 + /* macros for entire REPLY MODEM_STATUS access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INDEX 6 + /* macros for field RSSI_LATCH access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MASK 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_BIT 0x80 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_LSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LATCH_INDEX 6 + /* macros for field POSTAMBLE_DETECT access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_INDEX 6 + /* macros for field INVALID_SYNC access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_SYNC_INDEX 6 + /* macros for field RSSI_JUMP access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_JUMP_INDEX 6 + /* macros for field RSSI access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_RSSI_INDEX 6 + /* macros for field INVALID_PREAMBLE access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_INDEX 6 + /* macros for field PREAMBLE_DETECT access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_INDEX 6 + /* macros for field SYNC_DETECT access */ + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_MODEM_STATUS_SYNC_DETECT_INDEX 6 + /* macros for entire REPLY CHIP_PEND access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_INDEX 7 + /* macros for field CAL_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CAL_PEND_INDEX 7 + /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_INDEX 7 + /* macros for field STATE_CHANGE_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_INDEX 7 + /* macros for field CMD_ERROR_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_INDEX 7 + /* macros for field CHIP_READY_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_INDEX 7 + /* macros for field LOW_BATT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_INDEX 7 + /* macros for field WUT_PEND access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_PEND_WUT_PEND_INDEX 7 + /* macros for entire REPLY CHIP_STATUS access of type U8 */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_TYPE U8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_SIZE 8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_MASK 0xff + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_MSB 7 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_INDEX 8 + /* macros for field CAL access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_MASK 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_BIT 0x40 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_MSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_LSB 6 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CAL_INDEX 8 + /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MASK 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_BIT 0x20 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_LSB 5 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_INDEX 8 + /* macros for field STATE_CHANGE access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MASK 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_BIT 0x10 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_LSB 4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_STATE_CHANGE_INDEX 8 + /* macros for field CMD_ERROR access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_MASK 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_BIT 0x8 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_MSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_LSB 3 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CMD_ERROR_INDEX 8 + /* macros for field CHIP_READY access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_MASK 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_BIT 0x4 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_MSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_LSB 2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_CHIP_READY_INDEX 8 + /* macros for field LOW_BATT access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_MASK 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_BIT 0x2 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_MSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_LSB 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_LOW_BATT_INDEX 8 + /* macros for field WUT access */ + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_TYPE bool + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_SIZE 1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_MASK 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_BIT 0x1 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_MSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_LSB 0 + #define SI446X_CMD_GET_INT_STATUS_REP_CHIP_STATUS_WUT_INDEX 8 +#define SI446X_CMD_ID_REQUEST_DEVICE_STATE 0x33 +/* REQUEST_DEVICE_STATE ARGS */ +#define SI446X_CMD_ARG_COUNT_REQUEST_DEVICE_STATE 1 +/* REQUEST_DEVICE_STATE REPLY */ +#define SI446X_CMD_REPLY_COUNT_REQUEST_DEVICE_STATE 2 + /* macros for entire REPLY CURR_STATE access of type U8 */ + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_TYPE U8 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_SIZE 8 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MASK 0xff + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MSB 7 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_LSB 0 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_INDEX 1 + /* macros for field MAIN_STATE access */ + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_TYPE enum + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_SIZE 4 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_MASK 0xf + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_MSB 3 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_LSB 0 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_INDEX 1 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_SLEEP 1 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_SPI_ACTIVE 2 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_READY 3 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_READY2 4 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_TX_TUNE 5 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_RX_TUNE 6 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_TX 7 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURR_STATE_MAIN_STATE_ENUM_RX 8 + /* macros for entire REPLY CURRENT_CHANNEL access of type U8 */ + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_TYPE U8 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_SIZE 8 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_MASK 0xff + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_MSB 7 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_LSB 0 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_INDEX 2 + /* macros for field CURRENT_CHANNEL access */ + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_TYPE U8 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_SIZE 8 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_MASK 0xff + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_MSB 7 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_LSB 0 + #define SI446X_CMD_REQUEST_DEVICE_STATE_REP_CURRENT_CHANNEL_CURRENT_CHANNEL_INDEX 2 +#define SI446X_CMD_ID_CHANGE_STATE 0x34 +/* CHANGE_STATE ARGS */ +#define SI446X_CMD_ARG_COUNT_CHANGE_STATE 2 + /* macros for entire ARG NEXT_STATE1 access of type U8 */ + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_TYPE U8 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_SIZE 8 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_MASK 0xff + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_MSB 7 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_LSB 0 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_INDEX 1 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_value (((cmd.arg.CHANGE_STATE.NEXT_STATE1))) + /* macros for field NEW_STATE access */ + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_TYPE enum + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_SIZE 4 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_MASK 0xf + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_MSB 3 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_LSB 0 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_INDEX 1 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_value (((cmd.arg.CHANGE_STATE.NEXT_STATE1 & 0xf))) + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_NOCHANGE 0 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_SLEEP 1 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_SPI_ACTIVE 2 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_READY 3 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_TX_TUNE 5 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_RX_TUNE 6 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_TX 7 + #define SI446X_CMD_CHANGE_STATE_ARG_NEXT_STATE1_NEW_STATE_ENUM_RX 8 +/* CHANGE_STATE REPLY */ +#define SI446X_CMD_REPLY_COUNT_CHANGE_STATE 0 +#define SI446X_CMD_ID_READ_CMD_BUFF 0x44 +/* READ_CMD_BUFF ARGS */ +#define SI446X_CMD_ARG_COUNT_READ_CMD_BUFF 1 +/* READ_CMD_BUFF REPLY */ +#define SI446X_CMD_REPLY_COUNT_READ_CMD_BUFF 16 + /* macros for entire REPLY BYTE access of type U8 */ + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_TYPE U8 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_SIZE 8 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_MASK 0xff + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_MSB 7 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_LSB 0 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_INDEX 1 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_ARRAY_LEN 16 + /* macros for field CMD_BUFF access */ + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_TYPE U8 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_SIZE 8 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_MASK 0xff + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_MSB 7 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_LSB 0 + #define SI446X_CMD_READ_CMD_BUFF_REP_BYTE_CMD_BUFF_INDEX 1 +#define SI446X_CMD_ID_FRR_A_READ 0x50 +/* FRR_A_READ ARGS */ +#define SI446X_CMD_ARG_COUNT_FRR_A_READ 1 +/* FRR_A_READ REPLY */ +#define SI446X_CMD_REPLY_COUNT_FRR_A_READ 4 + /* macros for entire REPLY FRR_A_VALUE access of type U8 */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_INDEX 0 + /* macros for field FRR_A_VALUE access */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 0 + /* macros for entire REPLY FRR_B_VALUE access of type U8 */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_INDEX 1 + /* macros for field FRR_B_VALUE access */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 1 + /* macros for entire REPLY FRR_C_VALUE access of type U8 */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_INDEX 2 + /* macros for field FRR_C_VALUE access */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 2 + /* macros for entire REPLY FRR_D_VALUE access of type U8 */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_INDEX 3 + /* macros for field FRR_D_VALUE access */ + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_A_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 3 +#define SI446X_CMD_ID_FRR_B_READ 0x51 +/* FRR_B_READ ARGS */ +#define SI446X_CMD_ARG_COUNT_FRR_B_READ 1 +/* FRR_B_READ REPLY */ +#define SI446X_CMD_REPLY_COUNT_FRR_B_READ 4 + /* macros for entire REPLY FRR_B_VALUE access of type U8 */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_INDEX 0 + /* macros for field FRR_B_VALUE access */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 0 + /* macros for entire REPLY FRR_C_VALUE access of type U8 */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_INDEX 1 + /* macros for field FRR_C_VALUE access */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 1 + /* macros for entire REPLY FRR_D_VALUE access of type U8 */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_INDEX 2 + /* macros for field FRR_D_VALUE access */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 2 + /* macros for entire REPLY FRR_A_VALUE access of type U8 */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_INDEX 3 + /* macros for field FRR_A_VALUE access */ + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_B_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 3 +#define SI446X_CMD_ID_FRR_C_READ 0x53 +/* FRR_C_READ ARGS */ +#define SI446X_CMD_ARG_COUNT_FRR_C_READ 1 +/* FRR_C_READ REPLY */ +#define SI446X_CMD_REPLY_COUNT_FRR_C_READ 4 + /* macros for entire REPLY FRR_C_VALUE access of type U8 */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_INDEX 0 + /* macros for field FRR_C_VALUE access */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 0 + /* macros for entire REPLY FRR_D_VALUE access of type U8 */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_INDEX 1 + /* macros for field FRR_D_VALUE access */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 1 + /* macros for entire REPLY FRR_A_VALUE access of type U8 */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_INDEX 2 + /* macros for field FRR_A_VALUE access */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 2 + /* macros for entire REPLY FRR_B_VALUE access of type U8 */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_INDEX 3 + /* macros for field FRR_B_VALUE access */ + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_C_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 3 +#define SI446X_CMD_ID_FRR_D_READ 0x57 +/* FRR_D_READ ARGS */ +#define SI446X_CMD_ARG_COUNT_FRR_D_READ 1 +/* FRR_D_READ REPLY */ +#define SI446X_CMD_REPLY_COUNT_FRR_D_READ 4 + /* macros for entire REPLY FRR_D_VALUE access of type U8 */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_INDEX 0 + /* macros for field FRR_D_VALUE access */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_D_VALUE_FRR_D_VALUE_INDEX 0 + /* macros for entire REPLY FRR_A_VALUE access of type U8 */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_INDEX 1 + /* macros for field FRR_A_VALUE access */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_A_VALUE_FRR_A_VALUE_INDEX 1 + /* macros for entire REPLY FRR_B_VALUE access of type U8 */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_INDEX 2 + /* macros for field FRR_B_VALUE access */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_B_VALUE_FRR_B_VALUE_INDEX 2 + /* macros for entire REPLY FRR_C_VALUE access of type U8 */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_INDEX 3 + /* macros for field FRR_C_VALUE access */ + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_TYPE U8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_SIZE 8 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MASK 0xff + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_MSB 7 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_LSB 0 + #define SI446X_CMD_FRR_D_READ_REP_FRR_C_VALUE_FRR_C_VALUE_INDEX 3 +/* ir_cal commands */ + +#define SI446X_CMD_ID_IRCAL 0x17 +/* IRCAL ARGS */ +#define SI446X_CMD_ARG_COUNT_IRCAL 5 + /* macros for entire ARG SEARCHING_STEP_SIZE access of type U8 */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_TYPE U8 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_SIZE 8 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_MASK 0xff + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_MSB 7 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_LSB 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INDEX 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE))) + /* macros for field INITIAL_PH_AMP access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_TYPE enum + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_MASK 0x40 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_BIT 0x40 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_MSB 6 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_LSB 6 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_INDEX 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_is_true (cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0x40) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0x40)) >> 6) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_ENUM_ENUM_0 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_INITIAL_PH_AMP_ENUM_ENUM_1 0 + /* macros for field FINE_STEP_SIZE access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_TYPE U8 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_SIZE 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_MASK 0x30 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_MSB 5 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_LSB 4 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_INDEX 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_FINE_STEP_SIZE_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0x30)) >> 4) + /* macros for field COARSE_STEP_SIZE access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_TYPE U8 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_SIZE 4 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_MASK 0xf + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_MSB 3 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_LSB 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_INDEX 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_STEP_SIZE_COARSE_STEP_SIZE_value (((cmd.arg.IRCAL.SEARCHING_STEP_SIZE & 0xf))) + /* macros for entire ARG SEARCHING_RSSI_AVG access of type U8 */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_TYPE U8 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SIZE 8 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_MASK 0xff + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_MSB 7 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_LSB 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_INDEX 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG))) + /* macros for field STEP_BY_STEP access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_TYPE enum + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_MASK 0x80 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_BIT 0x80 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_MSB 7 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_LSB 7 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_INDEX 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_is_true (cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x80) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x80)) >> 7) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_STEP_BY_STEP_ENUM_ENUM_1 1 + /* macros for field SKIP_INIT_SEARCH_STAT access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_TYPE enum + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_MASK 0x40 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_BIT 0x40 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_MSB 6 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_LSB 6 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_INDEX 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_is_true (cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x40) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x40)) >> 6) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_INIT_SEARCH_STAT_ENUM_ENUM_1 1 + /* macros for field RSSI_FINE_AVG access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_TYPE enum + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_SIZE 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_MASK 0x30 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_MSB 5 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_LSB 4 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_INDEX 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x30)) >> 4) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_1 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_2 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_FINE_AVG_ENUM_ENUM_3 3 + /* macros for field SKIP_CAL access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_TYPE enum + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_MASK 0x4 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_BIT 0x4 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_MSB 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_LSB 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_INDEX 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_is_true (cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x4) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x4)) >> 2) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_SKIP_CAL_ENUM_ENUM_1 1 + /* macros for field RSSI_COARSE_AVG access */ + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_TYPE enum + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_SIZE 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_MASK 0x3 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_MSB 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_LSB 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_INDEX 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_value (((cmd.arg.IRCAL.SEARCHING_RSSI_AVG & 0x3))) + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_1 1 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_2 2 + #define SI446X_CMD_IRCAL_ARG_SEARCHING_RSSI_AVG_RSSI_COARSE_AVG_ENUM_ENUM_3 3 + /* macros for entire ARG RX_CHAIN_SETTING1 access of type U8 */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_TYPE U8 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_SIZE 8 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_MASK 0xff + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_MSB 7 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_LSB 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_INDEX 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1))) + /* macros for field EN_HRMNIC_GEN access */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_TYPE enum + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_MASK 0x80 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_BIT 0x80 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_MSB 7 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_LSB 7 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_INDEX 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x80) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x80)) >> 7) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_EN_HRMNIC_GEN_ENUM_ENUM_1 1 + /* macros for field IRCLKDIV access */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_TYPE enum + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_MASK 0x40 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_BIT 0x40 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_MSB 6 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_LSB 6 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_INDEX 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x40) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x40)) >> 6) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_IRCLKDIV_ENUM_ENUM_1 1 + /* macros for field RF_SOURCE_PWR access */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_TYPE enum + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_SIZE 2 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_MASK 0x30 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_MSB 5 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_LSB 4 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_INDEX 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x30)) >> 4) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_1 1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_2 2 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_RF_SOURCE_PWR_ENUM_ENUM_3 3 + /* macros for field CLOSE_SHUNT_SWITCH access */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_TYPE enum + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_MASK 0x8 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_BIT 0x8 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_MSB 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_LSB 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_INDEX 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x8) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x8)) >> 3) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_CLOSE_SHUNT_SWITCH_ENUM_ENUM_1 1 + /* macros for field PGA_GAIN access */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_TYPE enum + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_SIZE 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_MASK 0x7 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_MSB 2 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_LSB 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_INDEX 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING1 & 0x7))) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_1 1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_2 2 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_3 3 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_4 4 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_5 5 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_6 6 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING1_PGA_GAIN_ENUM_ENUM_7 7 + /* macros for entire ARG RX_CHAIN_SETTING2 access of type U8 */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_TYPE U8 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_SIZE 8 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_MASK 0xff + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_MSB 7 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_LSB 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_INDEX 4 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING2))) + /* macros for field RSSI_READ_DELAY access */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_TYPE enum + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_SIZE 4 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_MASK 0xf0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_MSB 7 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_LSB 4 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_INDEX 4 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING2 & 0xf0)) >> 4) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_ENUM_ENUM_1 1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_RSSI_READ_DELAY_ENUM_ENUM_2 15 + /* macros for field ADC_HIGH_GAIN access */ + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_TYPE enum + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_SIZE 1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_MASK 0x1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_BIT 0x1 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_MSB 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_LSB 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_INDEX 4 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_is_true (cmd.arg.IRCAL.RX_CHAIN_SETTING2 & 0x1) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_value (((cmd.arg.IRCAL.RX_CHAIN_SETTING2 & 0x1))) + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_ENUM_ENUM_0 0 + #define SI446X_CMD_IRCAL_ARG_RX_CHAIN_SETTING2_ADC_HIGH_GAIN_ENUM_ENUM_1 1 +/* IRCAL REPLY */ +#define SI446X_CMD_REPLY_COUNT_IRCAL 0 +#define SI446X_CMD_ID_IRCAL_MANUAL 0x1a +/* IRCAL_MANUAL ARGS */ +#define SI446X_CMD_ARG_COUNT_IRCAL_MANUAL 3 + /* macros for entire ARG IRCAL_AMP access of type U8 */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_SIZE 8 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_MASK 0xff + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_MSB 7 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_INDEX 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP))) + /* macros for field IRCAL_AMP_SKIP access */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_TYPE enum + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_SIZE 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_MASK 0x80 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_BIT 0x80 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_MSB 7 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_LSB 7 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_INDEX 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x80) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x80)) >> 7) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_ENUM_APPLY 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SKIP_ENUM_SKIP 1 + /* macros for field IRCAL_AMP_SIGN access */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_TYPE enum + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_SIZE 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_MASK 0x20 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_BIT 0x20 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_MSB 5 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_LSB 5 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_INDEX 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x20) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x20)) >> 5) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_ENUM_POS 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_SIGN_ENUM_NEG 1 + /* macros for field IRCAL_AMP_MAG access */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_SIZE 5 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_MASK 0x1f + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_MSB 4 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_INDEX 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_AMP_IRCAL_AMP_MAG_value (((cmd.arg.IRCAL_MANUAL.IRCAL_AMP & 0x1f))) + /* macros for entire ARG IRCAL_PH access of type U8 */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_SIZE 8 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_MASK 0xff + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_MSB 7 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_INDEX 2 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH))) + /* macros for field IRCAL_PH_SKIP access */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_TYPE enum + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_SIZE 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_MASK 0x80 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_BIT 0x80 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_MSB 7 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_LSB 7 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_INDEX 2 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x80) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x80)) >> 7) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_ENUM_APPLY 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SKIP_ENUM_SKIP 1 + /* macros for field IRCAL_PH_SIGN access */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_TYPE enum + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_SIZE 1 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_MASK 0x20 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_BIT 0x20 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_MSB 5 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_LSB 5 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_INDEX 2 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_is_true (cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x20) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x20)) >> 5) + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_ENUM_POS 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_SIGN_ENUM_NEG 1 + /* macros for field IRCAL_PH_MAG access */ + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_SIZE 5 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_MASK 0x1f + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_MSB 4 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_INDEX 2 + #define SI446X_CMD_IRCAL_MANUAL_ARG_IRCAL_PH_IRCAL_PH_MAG_value (((cmd.arg.IRCAL_MANUAL.IRCAL_PH & 0x1f))) +/* IRCAL_MANUAL REPLY */ +#define SI446X_CMD_REPLY_COUNT_IRCAL_MANUAL 2 + /* macros for entire REPLY IRCAL_AMP_REPLY access of type U8 */ + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_SIZE 8 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_MASK 0xff + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_MSB 7 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_INDEX 1 + /* macros for field IRCAL_AMP_SIGN access */ + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_TYPE enum + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_SIZE 1 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_MASK 0x20 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_BIT 0x20 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_MSB 5 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_LSB 5 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_INDEX 1 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_ENUM_POS 0 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_SIGN_ENUM_NEG 1 + /* macros for field IRCAL_AMP_MAG access */ + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_SIZE 5 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_MASK 0x1f + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_MSB 4 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_AMP_REPLY_IRCAL_AMP_MAG_INDEX 1 + /* macros for entire REPLY IRCAL_PH_REPLY access of type U8 */ + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_SIZE 8 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_MASK 0xff + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_MSB 7 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_INDEX 2 + /* macros for field IRCAL_PH_SIGN access */ + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_TYPE enum + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_SIZE 1 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_MASK 0x20 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_BIT 0x20 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_MSB 5 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_LSB 5 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_INDEX 2 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_ENUM_POS 0 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_PH_SIGN_ENUM_NEG 1 + /* macros for field IRCAL_AMP_PH access */ + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_TYPE U8 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_SIZE 5 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_MASK 0x1f + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_MSB 4 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_LSB 0 + #define SI446X_CMD_IRCAL_MANUAL_REP_IRCAL_PH_REPLY_IRCAL_AMP_PH_INDEX 2 +/* tx commands */ + +#define SI446X_CMD_ID_START_TX 0x31 +/* START_TX ARGS */ +#define SI446X_CMD_ARG_COUNT_START_TX 7 + /* macros for entire ARG CHANNEL access of type U8 */ + #define SI446X_CMD_START_TX_ARG_CHANNEL_TYPE U8 + #define SI446X_CMD_START_TX_ARG_CHANNEL_SIZE 8 + #define SI446X_CMD_START_TX_ARG_CHANNEL_MASK 0xff + #define SI446X_CMD_START_TX_ARG_CHANNEL_MSB 7 + #define SI446X_CMD_START_TX_ARG_CHANNEL_LSB 0 + #define SI446X_CMD_START_TX_ARG_CHANNEL_INDEX 1 + #define SI446X_CMD_START_TX_ARG_CHANNEL_value (((cmd.arg.START_TX.CHANNEL))) + /* macros for field CHANNEL access */ + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_TYPE U8 + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_SIZE 8 + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MASK 0xff + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MSB 7 + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_LSB 0 + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_INDEX 1 + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MIN 0x0 + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_MAX 0xff + #define SI446X_CMD_START_TX_ARG_CHANNEL_CHANNEL_value (((cmd.arg.START_TX.CHANNEL & 0xff))) + /* macros for entire ARG CONDITION access of type U8 */ + #define SI446X_CMD_START_TX_ARG_CONDITION_TYPE U8 + #define SI446X_CMD_START_TX_ARG_CONDITION_SIZE 8 + #define SI446X_CMD_START_TX_ARG_CONDITION_MASK 0xff + #define SI446X_CMD_START_TX_ARG_CONDITION_MSB 7 + #define SI446X_CMD_START_TX_ARG_CONDITION_LSB 0 + #define SI446X_CMD_START_TX_ARG_CONDITION_INDEX 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_value (((cmd.arg.START_TX.CONDITION))) + /* macros for field TXCOMPLETE_STATE access */ + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_TYPE enum + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_SIZE 4 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_MASK 0xf0 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_MSB 7 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_LSB 4 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_INDEX 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_value (((cmd.arg.START_TX.CONDITION & 0xf0)) >> 4) + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_NOCHANGE 0 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_SLEEP 1 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_SPI_ACTIVE 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_READY 3 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_READY2 4 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_TX_TUNE 5 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_RX_TUNE 6 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_RESERVED 7 + #define SI446X_CMD_START_TX_ARG_CONDITION_TXCOMPLETE_STATE_ENUM_RX 8 + /* macros for field UPDATE access */ + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_TYPE enum + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_SIZE 1 + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_MASK 0x8 + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_BIT 0x8 + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_MSB 3 + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_LSB 3 + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_INDEX 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_is_true (cmd.arg.START_TX.CONDITION & 0x8) + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_value (((cmd.arg.START_TX.CONDITION & 0x8)) >> 3) + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_ENUM_UPDATE 1 + #define SI446X_CMD_START_TX_ARG_CONDITION_UPDATE_ENUM_USE 0 + /* macros for field RETRANSMIT access */ + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_TYPE enum + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_SIZE 1 + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_MASK 0x4 + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_BIT 0x4 + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_MSB 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_LSB 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_INDEX 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_is_true (cmd.arg.START_TX.CONDITION & 0x4) + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_value (((cmd.arg.START_TX.CONDITION & 0x4)) >> 2) + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_ENUM_ENUM_0 0 + #define SI446X_CMD_START_TX_ARG_CONDITION_RETRANSMIT_ENUM_ENUM_1 1 + /* macros for field START access */ + #define SI446X_CMD_START_TX_ARG_CONDITION_START_TYPE enum + #define SI446X_CMD_START_TX_ARG_CONDITION_START_SIZE 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_START_MASK 0x3 + #define SI446X_CMD_START_TX_ARG_CONDITION_START_MSB 1 + #define SI446X_CMD_START_TX_ARG_CONDITION_START_LSB 0 + #define SI446X_CMD_START_TX_ARG_CONDITION_START_INDEX 2 + #define SI446X_CMD_START_TX_ARG_CONDITION_START_value (((cmd.arg.START_TX.CONDITION & 0x3))) + #define SI446X_CMD_START_TX_ARG_CONDITION_START_ENUM_IMMEDIATE 0 + #define SI446X_CMD_START_TX_ARG_CONDITION_START_ENUM_WUT 1 + /* macros for entire ARG TX_LEN access of type U16 */ + #define SI446X_CMD_START_TX_ARG_TX_LEN_TYPE U16 + #define SI446X_CMD_START_TX_ARG_TX_LEN_SIZE 16 + #define SI446X_CMD_START_TX_ARG_TX_LEN_MASK 0xffff + #define SI446X_CMD_START_TX_ARG_TX_LEN_MSB 15 + #define SI446X_CMD_START_TX_ARG_TX_LEN_LSB 0 + #define SI446X_CMD_START_TX_ARG_TX_LEN_INDEX 3 + #define SI446X_CMD_START_TX_ARG_TX_LEN_value (((cmd.arg.START_TX.TX_LEN))) + /* macros for field TX_LEN access */ + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_TYPE U16 + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_SIZE 13 + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MASK 0x1fff + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MSB 12 + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_LSB 0 + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_INDEX 3 + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MIN 0x0 + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_MAX 0x1fff + #define SI446X_CMD_START_TX_ARG_TX_LEN_TX_LEN_value (((cmd.arg.START_TX.TX_LEN & 0x1fff))) + /* macros for entire ARG TX_DELAY access of type U8 */ + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TYPE U8 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_SIZE 8 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_MASK 0xff + #define SI446X_CMD_START_TX_ARG_TX_DELAY_MSB 7 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_LSB 0 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_INDEX 5 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_value (((cmd.arg.START_TX.TX_DELAY))) + /* macros for field TX_DELAY access */ + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_TYPE U8 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_SIZE 8 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MASK 0xff + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MSB 7 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_LSB 0 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_INDEX 5 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MIN 0x0 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_MAX 0x80 + #define SI446X_CMD_START_TX_ARG_TX_DELAY_TX_DELAY_value (((cmd.arg.START_TX.TX_DELAY & 0xff))) + /* macros for entire ARG NUM_REPEAT access of type U8 */ + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_TYPE U8 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_SIZE 8 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_MASK 0xff + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_MSB 7 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_LSB 0 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_INDEX 6 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_value (((cmd.arg.START_TX.NUM_REPEAT))) + /* macros for field NUM_REPEAT access */ + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_TYPE U8 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_SIZE 8 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MASK 0xff + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MSB 7 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_LSB 0 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_INDEX 6 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MIN 0x0 + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_MAX 0xff + #define SI446X_CMD_START_TX_ARG_NUM_REPEAT_NUM_REPEAT_value (((cmd.arg.START_TX.NUM_REPEAT & 0xff))) +/* START_TX REPLY */ +#define SI446X_CMD_REPLY_COUNT_START_TX 0 +#define SI446X_CMD_ID_TX_HOP 0x37 +/* TX_HOP ARGS */ +#define SI446X_CMD_ARG_COUNT_TX_HOP 1 +/* TX_HOP REPLY */ +#define SI446X_CMD_REPLY_COUNT_TX_HOP 0 +#define SI446X_CMD_ID_WRITE_TX_FIFO 0x66 +/* WRITE_TX_FIFO ARGS */ +#define SI446X_CMD_ARG_COUNT_WRITE_TX_FIFO 3 + /* macros for entire ARG DATA access of type U8 */ + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_TYPE U8 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_SIZE 8 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_MASK 0xff + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_MSB 7 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_LSB 0 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_INDEX 1 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_ARRAY_LEN 2 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_value(i) (((cmd.arg.WRITE_TX_FIFO.DATA[(i)]))) + /* macros for field DATA access */ + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_TYPE U8 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_SIZE 8 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_MASK 0xff + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_MSB 7 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_LSB 0 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_INDEX 1 + #define SI446X_CMD_WRITE_TX_FIFO_ARG_DATA_DATA_value(i) (((cmd.arg.WRITE_TX_FIFO.DATA[(i)] & 0xff))) +/* rx commands */ + +#define SI446X_CMD_ID_PACKET_INFO 0x16 +/* PACKET_INFO ARGS */ +#define SI446X_CMD_ARG_COUNT_PACKET_INFO 6 + /* macros for entire ARG FIELD_NUMBER access of type U8 */ + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_TYPE U8 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_SIZE 8 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_MASK 0xff + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_MSB 7 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_LSB 0 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_INDEX 1 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_value (((cmd.arg.PACKET_INFO.FIELD_NUMBER))) + /* macros for field FIELD_NUM access */ + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_TYPE enum + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_SIZE 5 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_MASK 0x1f + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_MSB 4 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_LSB 0 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_INDEX 1 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_value (((cmd.arg.PACKET_INFO.FIELD_NUMBER & 0x1f))) + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_0 0 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_1 1 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_2 2 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_3 4 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_4 8 + #define SI446X_CMD_PACKET_INFO_ARG_FIELD_NUMBER_FIELD_NUM_ENUM_ENUM_5 16 + /* macros for entire ARG LEN access of type U16 */ + #define SI446X_CMD_PACKET_INFO_ARG_LEN_TYPE U16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_SIZE 16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_MASK 0xffff + #define SI446X_CMD_PACKET_INFO_ARG_LEN_MSB 15 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LSB 0 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_INDEX 2 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_value (((cmd.arg.PACKET_INFO.LEN))) + /* macros for field LEN access */ + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_TYPE U16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_SIZE 16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MASK 0xffff + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MSB 15 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_LSB 0 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_INDEX 2 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MIN 0x1 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_MAX 0x1fff + #define SI446X_CMD_PACKET_INFO_ARG_LEN_LEN_value (((cmd.arg.PACKET_INFO.LEN & 0xffff))) + /* macros for entire ARG LEN_DIFF access of type S16 */ + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_TYPE S16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_SIZE 16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_MASK 0xffff + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_MSB 15 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LSB 0 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_INDEX 4 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_value (((cmd.arg.PACKET_INFO.LEN_DIFF))) + /* macros for field LEN_DIFF access */ + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_TYPE S16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_SIZE 16 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MASK 0xffff + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MSB 15 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_LSB 0 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_INDEX 4 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MIN -0x8000 + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_MAX 0x7fff + #define SI446X_CMD_PACKET_INFO_ARG_LEN_DIFF_LEN_DIFF_value (((cmd.arg.PACKET_INFO.LEN_DIFF & 0xffff))) +/* PACKET_INFO REPLY */ +#define SI446X_CMD_REPLY_COUNT_PACKET_INFO 2 + /* macros for entire REPLY LENGTH access of type U16 */ + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_TYPE U16 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_SIZE 16 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_MASK 0xffff + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_MSB 15 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LSB 0 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_INDEX 1 + /* macros for field LENGTH access */ + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_TYPE U16 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_SIZE 16 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_MASK 0xffff + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_MSB 15 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_LSB 0 + #define SI446X_CMD_PACKET_INFO_REP_LENGTH_LENGTH_INDEX 1 +#define SI446X_CMD_ID_GET_MODEM_STATUS 0x22 +/* GET_MODEM_STATUS ARGS */ +#define SI446X_CMD_ARG_COUNT_GET_MODEM_STATUS 2 + /* macros for entire ARG MODEM_CLR_PEND access of type U8 */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND))) + /* macros for field RSSI_LATCH_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MASK 0x80 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_BIT 0x80 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_LSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x80) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_LATCH_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x80)) >> 7) + /* macros for field POSTAMBLE_DETECT_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MASK 0x40 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_BIT 0x40 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_MSB 6 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_LSB 6 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x40) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_POSTAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x40)) >> 6) + /* macros for field INVALID_SYNC_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MASK 0x20 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_BIT 0x20 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_MSB 5 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_LSB 5 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x20) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_SYNC_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x20)) >> 5) + /* macros for field RSSI_JUMP_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MASK 0x10 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_BIT 0x10 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_MSB 4 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_LSB 4 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x10) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_JUMP_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x10)) >> 4) + /* macros for field RSSI_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MASK 0x8 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_BIT 0x8 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_MSB 3 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_LSB 3 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x8) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_RSSI_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x8)) >> 3) + /* macros for field INVALID_PREAMBLE_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MASK 0x4 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_BIT 0x4 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_MSB 2 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_LSB 2 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x4) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_INVALID_PREAMBLE_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x4)) >> 2) + /* macros for field PREAMBLE_DETECT_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MASK 0x2 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_BIT 0x2 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_MSB 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_LSB 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x2) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_PREAMBLE_DETECT_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x2)) >> 1) + /* macros for field SYNC_DETECT_PEND_CLR access */ + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MASK 0x1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_BIT 0x1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_MSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_is_true (cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x1) + #define SI446X_CMD_GET_MODEM_STATUS_ARG_MODEM_CLR_PEND_SYNC_DETECT_PEND_CLR_value (((cmd.arg.GET_MODEM_STATUS.MODEM_CLR_PEND & 0x1))) +/* GET_MODEM_STATUS REPLY */ +#define SI446X_CMD_REPLY_COUNT_GET_MODEM_STATUS 8 + /* macros for entire REPLY MODEM_PEND access of type U8 */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INDEX 1 + /* macros for field RSSI_LATCH_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MASK 0x80 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_BIT 0x80 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_LSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_LATCH_PEND_INDEX 1 + /* macros for field POSTAMBLE_DETECT_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MASK 0x40 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_BIT 0x40 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_MSB 6 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_LSB 6 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_POSTAMBLE_DETECT_PEND_INDEX 1 + /* macros for field INVALID_SYNC_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MASK 0x20 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_BIT 0x20 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_MSB 5 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_LSB 5 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_SYNC_PEND_INDEX 1 + /* macros for field RSSI_JUMP_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MASK 0x10 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_BIT 0x10 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_MSB 4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_LSB 4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_JUMP_PEND_INDEX 1 + /* macros for field RSSI_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_MASK 0x8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_BIT 0x8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_MSB 3 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_LSB 3 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_RSSI_PEND_INDEX 1 + /* macros for field INVALID_PREAMBLE_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MASK 0x4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_BIT 0x4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_MSB 2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_LSB 2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_INVALID_PREAMBLE_PEND_INDEX 1 + /* macros for field PREAMBLE_DETECT_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MASK 0x2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_BIT 0x2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_MSB 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_LSB 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_PREAMBLE_DETECT_PEND_INDEX 1 + /* macros for field SYNC_DETECT_PEND access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MASK 0x1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_BIT 0x1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_MSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_PEND_SYNC_DETECT_PEND_INDEX 1 + /* macros for entire REPLY MODEM_STATUS access of type U8 */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INDEX 2 + /* macros for field RSSI_LATCH access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MASK 0x80 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_BIT 0x80 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_LSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LATCH_INDEX 2 + /* macros for field POSTAMBLE_DETECT access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MASK 0x40 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_BIT 0x40 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_MSB 6 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_LSB 6 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_POSTAMBLE_DETECT_INDEX 2 + /* macros for field INVALID_SYNC access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MASK 0x20 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_BIT 0x20 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_MSB 5 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_LSB 5 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_SYNC_INDEX 2 + /* macros for field RSSI_JUMP access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MASK 0x10 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_BIT 0x10 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_MSB 4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_LSB 4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_JUMP_INDEX 2 + /* macros for field RSSI access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_MASK 0x8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_BIT 0x8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_MSB 3 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_LSB 3 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_RSSI_INDEX 2 + /* macros for field INVALID_PREAMBLE access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MASK 0x4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_BIT 0x4 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_MSB 2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_LSB 2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_INVALID_PREAMBLE_INDEX 2 + /* macros for field PREAMBLE_DETECT access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MASK 0x2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_BIT 0x2 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_MSB 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_LSB 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_PREAMBLE_DETECT_INDEX 2 + /* macros for field SYNC_DETECT access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_TYPE bool + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_SIZE 1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MASK 0x1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_BIT 0x1 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_MSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_MODEM_STATUS_SYNC_DETECT_INDEX 2 + /* macros for entire REPLY CURR_RSSI access of type U8 */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_INDEX 3 + /* macros for field CURR_RSSI access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_CURR_RSSI_CURR_RSSI_INDEX 3 + /* macros for entire REPLY LATCH_RSSI access of type U8 */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_INDEX 4 + /* macros for field LATCH_RSSI access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_LATCH_RSSI_LATCH_RSSI_INDEX 4 + /* macros for entire REPLY ANT1_RSSI access of type U8 */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_INDEX 5 + /* macros for field ANT1_RSSI access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT1_RSSI_ANT1_RSSI_INDEX 5 + /* macros for entire REPLY ANT2_RSSI access of type U8 */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_INDEX 6 + /* macros for field ANT2_RSSI access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_TYPE U8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_SIZE 8 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_MASK 0xff + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_MSB 7 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_ANT2_RSSI_ANT2_RSSI_INDEX 6 + /* macros for entire REPLY AFC_FREQ_OFFSET access of type U16 */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_TYPE U16 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_SIZE 16 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_MASK 0xffff + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_MSB 15 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_INDEX 7 + /* macros for field AFC_FREQ_OFFSET access */ + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_TYPE U16 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_SIZE 16 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_MASK 0xffff + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_MSB 15 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_LSB 0 + #define SI446X_CMD_GET_MODEM_STATUS_REP_AFC_FREQ_OFFSET_AFC_FREQ_OFFSET_INDEX 7 +#define SI446X_CMD_ID_START_RX 0x32 +/* START_RX ARGS */ +#define SI446X_CMD_ARG_COUNT_START_RX 8 + /* macros for entire ARG CHANNEL access of type U8 */ + #define SI446X_CMD_START_RX_ARG_CHANNEL_TYPE U8 + #define SI446X_CMD_START_RX_ARG_CHANNEL_SIZE 8 + #define SI446X_CMD_START_RX_ARG_CHANNEL_MASK 0xff + #define SI446X_CMD_START_RX_ARG_CHANNEL_MSB 7 + #define SI446X_CMD_START_RX_ARG_CHANNEL_LSB 0 + #define SI446X_CMD_START_RX_ARG_CHANNEL_INDEX 1 + #define SI446X_CMD_START_RX_ARG_CHANNEL_value (((cmd.arg.START_RX.CHANNEL))) + /* macros for field CHANNEL access */ + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_TYPE U8 + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_SIZE 8 + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MASK 0xff + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MSB 7 + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_LSB 0 + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_INDEX 1 + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MIN 0x0 + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_MAX 0xff + #define SI446X_CMD_START_RX_ARG_CHANNEL_CHANNEL_value (((cmd.arg.START_RX.CHANNEL & 0xff))) + /* macros for entire ARG CONDITION access of type U8 */ + #define SI446X_CMD_START_RX_ARG_CONDITION_TYPE U8 + #define SI446X_CMD_START_RX_ARG_CONDITION_SIZE 8 + #define SI446X_CMD_START_RX_ARG_CONDITION_MASK 0xff + #define SI446X_CMD_START_RX_ARG_CONDITION_MSB 7 + #define SI446X_CMD_START_RX_ARG_CONDITION_LSB 0 + #define SI446X_CMD_START_RX_ARG_CONDITION_INDEX 2 + #define SI446X_CMD_START_RX_ARG_CONDITION_value (((cmd.arg.START_RX.CONDITION))) + /* macros for field UPDATE access */ + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_TYPE enum + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_SIZE 1 + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_MASK 0x8 + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_BIT 0x8 + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_MSB 3 + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_LSB 3 + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_INDEX 2 + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_is_true (cmd.arg.START_RX.CONDITION & 0x8) + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_value (((cmd.arg.START_RX.CONDITION & 0x8)) >> 3) + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_ENUM_UPDATE 1 + #define SI446X_CMD_START_RX_ARG_CONDITION_UPDATE_ENUM_USE 0 + /* macros for field START access */ + #define SI446X_CMD_START_RX_ARG_CONDITION_START_TYPE enum + #define SI446X_CMD_START_RX_ARG_CONDITION_START_SIZE 2 + #define SI446X_CMD_START_RX_ARG_CONDITION_START_MASK 0x3 + #define SI446X_CMD_START_RX_ARG_CONDITION_START_MSB 1 + #define SI446X_CMD_START_RX_ARG_CONDITION_START_LSB 0 + #define SI446X_CMD_START_RX_ARG_CONDITION_START_INDEX 2 + #define SI446X_CMD_START_RX_ARG_CONDITION_START_value (((cmd.arg.START_RX.CONDITION & 0x3))) + #define SI446X_CMD_START_RX_ARG_CONDITION_START_ENUM_IMMEDIATE 0 + #define SI446X_CMD_START_RX_ARG_CONDITION_START_ENUM_WUT 1 + /* macros for entire ARG RX_LEN access of type U16 */ + #define SI446X_CMD_START_RX_ARG_RX_LEN_TYPE U16 + #define SI446X_CMD_START_RX_ARG_RX_LEN_SIZE 16 + #define SI446X_CMD_START_RX_ARG_RX_LEN_MASK 0xffff + #define SI446X_CMD_START_RX_ARG_RX_LEN_MSB 15 + #define SI446X_CMD_START_RX_ARG_RX_LEN_LSB 0 + #define SI446X_CMD_START_RX_ARG_RX_LEN_INDEX 3 + #define SI446X_CMD_START_RX_ARG_RX_LEN_value (((cmd.arg.START_RX.RX_LEN))) + /* macros for field RX_LEN access */ + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_TYPE U16 + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_SIZE 13 + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MASK 0x1fff + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MSB 12 + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_LSB 0 + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_INDEX 3 + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MIN 0x0 + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_MAX 0x1fff + #define SI446X_CMD_START_RX_ARG_RX_LEN_RX_LEN_value (((cmd.arg.START_RX.RX_LEN & 0x1fff))) + /* macros for entire ARG NEXT_STATE1 access of type U8 */ + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_TYPE U8 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_SIZE 8 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_MASK 0xff + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_MSB 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_LSB 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_INDEX 5 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_value (((cmd.arg.START_RX.NEXT_STATE1))) + /* macros for field RXTIMEOUT_STATE access */ + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_TYPE enum + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_SIZE 4 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_MASK 0xf + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_MSB 3 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_LSB 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_INDEX 5 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_value (((cmd.arg.START_RX.NEXT_STATE1 & 0xf))) + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_NOCHANGE 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_SLEEP 1 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_SPI_ACTIVE 2 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_READY 3 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_READY2 4 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_TX_TUNE 5 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_RX_TUNE 6 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_TX 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_RX 8 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE1_RXTIMEOUT_STATE_ENUM_RX_IDLE 9 + /* macros for entire ARG NEXT_STATE2 access of type U8 */ + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_TYPE U8 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_SIZE 8 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_MASK 0xff + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_MSB 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_LSB 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_INDEX 6 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_value (((cmd.arg.START_RX.NEXT_STATE2))) + /* macros for field RXVALID_STATE access */ + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_TYPE enum + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_SIZE 4 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_MASK 0xf + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_MSB 3 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_LSB 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_INDEX 6 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_value (((cmd.arg.START_RX.NEXT_STATE2 & 0xf))) + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_REMAIN 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_SLEEP 1 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_SPI_ACTIVE 2 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_READY 3 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_READY2 4 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_TX_TUNE 5 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_RX_TUNE 6 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_TX 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE2_RXVALID_STATE_ENUM_RX 8 + /* macros for entire ARG NEXT_STATE3 access of type U8 */ + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_TYPE U8 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_SIZE 8 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_MASK 0xff + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_MSB 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_LSB 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_INDEX 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_value (((cmd.arg.START_RX.NEXT_STATE3))) + /* macros for field RXINVALID_STATE access */ + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_TYPE enum + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_SIZE 4 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_MASK 0xf + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_MSB 3 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_LSB 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_INDEX 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_value (((cmd.arg.START_RX.NEXT_STATE3 & 0xf))) + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_REMAIN 0 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_SLEEP 1 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_SPI_ACTIVE 2 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_READY 3 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_READY2 4 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_TX_TUNE 5 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_RX_TUNE 6 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_TX 7 + #define SI446X_CMD_START_RX_ARG_NEXT_STATE3_RXINVALID_STATE_ENUM_RX 8 +/* START_RX REPLY */ +#define SI446X_CMD_REPLY_COUNT_START_RX 0 +#define SI446X_CMD_ID_RX_HOP 0x36 +/* RX_HOP ARGS */ +#define SI446X_CMD_ARG_COUNT_RX_HOP 7 + /* macros for entire ARG INTE access of type U8 */ + #define SI446X_CMD_RX_HOP_ARG_INTE_TYPE U8 + #define SI446X_CMD_RX_HOP_ARG_INTE_SIZE 8 + #define SI446X_CMD_RX_HOP_ARG_INTE_MASK 0xff + #define SI446X_CMD_RX_HOP_ARG_INTE_MSB 7 + #define SI446X_CMD_RX_HOP_ARG_INTE_LSB 0 + #define SI446X_CMD_RX_HOP_ARG_INTE_INDEX 1 + #define SI446X_CMD_RX_HOP_ARG_INTE_value (((cmd.arg.RX_HOP.INTE))) + /* macros for field INTE access */ + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_TYPE U8 + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_SIZE 8 + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MASK 0xff + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MSB 7 + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_LSB 0 + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_INDEX 1 + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MIN 0x0 + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_MAX 0x7f + #define SI446X_CMD_RX_HOP_ARG_INTE_INTE_value (((cmd.arg.RX_HOP.INTE & 0xff))) + /* macros for entire ARG FRAC access of type U8 */ + #define SI446X_CMD_RX_HOP_ARG_FRAC_TYPE U8 + #define SI446X_CMD_RX_HOP_ARG_FRAC_SIZE 24 + #define SI446X_CMD_RX_HOP_ARG_FRAC_MASK 0xffffff + #define SI446X_CMD_RX_HOP_ARG_FRAC_MSB 23 + #define SI446X_CMD_RX_HOP_ARG_FRAC_LSB 0 + #define SI446X_CMD_RX_HOP_ARG_FRAC_INDEX 2 + #define SI446X_CMD_RX_HOP_ARG_FRAC_23_16_value (((cmd.arg.RX_HOP.FRAC[0]))) + #define SI446X_CMD_RX_HOP_ARG_FRAC_15_8_value (((cmd.arg.RX_HOP.FRAC[1]))) + #define SI446X_CMD_RX_HOP_ARG_FRAC_7_0_value (((cmd.arg.RX_HOP.FRAC[2]))) + /* macros for field FRAC access */ + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_TYPE U8 + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_SIZE 20 + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_INDEX 2 + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_MIN 0x80000 + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_MAX 0xfffff + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_19_16_value (((cmd.arg.RX_HOP.FRAC[0] & 0xf))) + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_15_8_value (((cmd.arg.RX_HOP.FRAC[1] & 0xff))) + #define SI446X_CMD_RX_HOP_ARG_FRAC_FRAC_7_0_value (((cmd.arg.RX_HOP.FRAC[2] & 0xff))) + /* macros for entire ARG VCO_CNT access of type U16 */ + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_TYPE U16 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_SIZE 16 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_MASK 0xffff + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_MSB 15 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_LSB 0 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_INDEX 5 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_value (((cmd.arg.RX_HOP.VCO_CNT))) + /* macros for field VCO_CNT access */ + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_TYPE U16 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_SIZE 16 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MASK 0xffff + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MSB 15 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_LSB 0 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_INDEX 5 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MIN 0x0 + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_MAX 0xffff + #define SI446X_CMD_RX_HOP_ARG_VCO_CNT_VCO_CNT_value (((cmd.arg.RX_HOP.VCO_CNT & 0xffff))) +/* RX_HOP REPLY */ +#define SI446X_CMD_REPLY_COUNT_RX_HOP 0 +#define SI446X_CMD_ID_READ_RX_FIFO 0x77 +/* READ_RX_FIFO ARGS */ +#define SI446X_CMD_ARG_COUNT_READ_RX_FIFO 1 +/* READ_RX_FIFO REPLY */ +#define SI446X_CMD_REPLY_COUNT_READ_RX_FIFO 2 + /* macros for entire REPLY DATA access of type U8 */ + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_TYPE U8 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_SIZE 8 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_MASK 0xff + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_MSB 7 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_LSB 0 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_INDEX 0 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_ARRAY_LEN 2 + /* macros for field DATA access */ + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_TYPE U8 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_SIZE 8 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_MASK 0xff + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_MSB 7 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_LSB 0 + #define SI446X_CMD_READ_RX_FIFO_REP_DATA_DATA_INDEX 0 +/* advanced commands */ + +#define SI446X_CMD_ID_GET_ADC_READING 0x14 +/* GET_ADC_READING ARGS */ +#define SI446X_CMD_ARG_COUNT_GET_ADC_READING 3 + /* macros for entire ARG ADC_EN access of type U8 */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TYPE U8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_SIZE 8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_MASK 0xff + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_MSB 7 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_LSB 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_INDEX 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN))) + /* macros for field TEMPERATURE_EN access */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_TYPE enum + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_SIZE 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_MASK 0x10 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_BIT 0x10 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_MSB 4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_LSB 4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_INDEX 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_is_true (cmd.arg.GET_ADC_READING.ADC_EN & 0x10) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x10)) >> 4) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_ENUM_ENUM_0 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_TEMPERATURE_EN_ENUM_ENUM_1 1 + /* macros for field BATTERY_VOLTAGE_EN access */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_TYPE enum + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_SIZE 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_MASK 0x8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_BIT 0x8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_MSB 3 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_LSB 3 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_INDEX 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_is_true (cmd.arg.GET_ADC_READING.ADC_EN & 0x8) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x8)) >> 3) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_ENUM_ENUM_0 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_BATTERY_VOLTAGE_EN_ENUM_ENUM_1 1 + /* macros for field ADC_GPIO_EN access */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_TYPE enum + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_SIZE 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_MASK 0x4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_BIT 0x4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_MSB 2 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_LSB 2 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_INDEX 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_is_true (cmd.arg.GET_ADC_READING.ADC_EN & 0x4) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x4)) >> 2) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_ENUM_ENUM_0 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_EN_ENUM_ENUM_1 1 + /* macros for field ADC_GPIO_PIN access */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_TYPE enum + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_SIZE 2 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_MASK 0x3 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_MSB 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_LSB 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_INDEX 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_value (((cmd.arg.GET_ADC_READING.ADC_EN & 0x3))) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_0 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_1 1 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_2 2 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_EN_ADC_GPIO_PIN_ENUM_ENUM_3 3 + /* macros for entire ARG ADC_CFG access of type U8 */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_TYPE U8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_SIZE 8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_MASK 0xff + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_MSB 7 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_LSB 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_INDEX 2 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_value (((cmd.arg.GET_ADC_READING.ADC_CFG))) + /* macros for field UDTIME access */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_TYPE U8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_SIZE 4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_MASK 0xf0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_MSB 7 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_LSB 4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_INDEX 2 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_UDTIME_value (((cmd.arg.GET_ADC_READING.ADC_CFG & 0xf0)) >> 4) + /* macros for field GPIO_ATT access */ + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_TYPE enum + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_SIZE 4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_MASK 0xf + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_MSB 3 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_LSB 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_INDEX 2 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_value (((cmd.arg.GET_ADC_READING.ADC_CFG & 0xf))) + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_0P8 0 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_1P6 4 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_3P2 5 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_2P4 8 + #define SI446X_CMD_GET_ADC_READING_ARG_ADC_CFG_GPIO_ATT_ENUM_3P6 9 +/* GET_ADC_READING REPLY */ +#define SI446X_CMD_REPLY_COUNT_GET_ADC_READING 6 + /* macros for entire REPLY GPIO_ADC access of type U16 */ + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_TYPE U16 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_SIZE 16 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_MASK 0xffff + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_MSB 15 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_LSB 0 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_INDEX 1 + /* macros for field GPIO_ADC access */ + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_TYPE U16 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_SIZE 11 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_MASK 0x7ff + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_MSB 10 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_LSB 0 + #define SI446X_CMD_GET_ADC_READING_REP_GPIO_ADC_GPIO_ADC_INDEX 1 + /* macros for entire REPLY BATTERY_ADC access of type U16 */ + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_TYPE U16 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_SIZE 16 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_MASK 0xffff + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_MSB 15 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_LSB 0 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_INDEX 3 + /* macros for field BATTERY_ADC access */ + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_TYPE U16 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_SIZE 11 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_MASK 0x7ff + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_MSB 10 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_LSB 0 + #define SI446X_CMD_GET_ADC_READING_REP_BATTERY_ADC_BATTERY_ADC_INDEX 3 + /* macros for entire REPLY TEMP_ADC access of type U16 */ + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TYPE U16 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_SIZE 16 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_MASK 0xffff + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_MSB 15 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_LSB 0 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_INDEX 5 + /* macros for field TEMP_ADC access */ + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_TYPE U16 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_SIZE 11 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_MASK 0x7ff + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_MSB 10 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_LSB 0 + #define SI446X_CMD_GET_ADC_READING_REP_TEMP_ADC_TEMP_ADC_INDEX 5 +#define SI446X_CMD_ID_GET_PH_STATUS 0x21 +/* GET_PH_STATUS ARGS */ +#define SI446X_CMD_ARG_COUNT_GET_PH_STATUS 2 + /* macros for entire ARG PH_CLR_PEND access of type U8 */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TYPE U8 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_SIZE 8 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_MASK 0xff + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_MSB 7 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_LSB 0 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND))) + /* macros for field FILTER_MATCH_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MASK 0x80 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_BIT 0x80 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_MSB 7 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_LSB 7 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x80) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MATCH_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x80)) >> 7) + /* macros for field FILTER_MISS_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MASK 0x40 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_BIT 0x40 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_MSB 6 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_LSB 6 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x40) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_FILTER_MISS_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x40)) >> 6) + /* macros for field PACKET_SENT_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MASK 0x20 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_BIT 0x20 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_MSB 5 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_LSB 5 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x20) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_SENT_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x20)) >> 5) + /* macros for field PACKET_RX_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MASK 0x10 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_BIT 0x10 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_MSB 4 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_LSB 4 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x10) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_PACKET_RX_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x10)) >> 4) + /* macros for field CRC_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MASK 0x8 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_BIT 0x8 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_MSB 3 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_LSB 3 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x8) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x8)) >> 3) + /* macros for field ALT_CRC_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MASK 0x4 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_BIT 0x4 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_MSB 2 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_LSB 2 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x4) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_ALT_CRC_ERROR_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x4)) >> 2) + /* macros for field TX_FIFO_ALMOST_EMPTY_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MASK 0x2 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_BIT 0x2 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_MSB 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_LSB 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x2) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_TX_FIFO_ALMOST_EMPTY_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x2)) >> 1) + /* macros for field RX_FIFO_ALMOST_FULL_PEND_CLR access */ + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MASK 0x1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_BIT 0x1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_MSB 0 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_LSB 0 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_is_true (cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x1) + #define SI446X_CMD_GET_PH_STATUS_ARG_PH_CLR_PEND_RX_FIFO_ALMOST_FULL_PEND_CLR_value (((cmd.arg.GET_PH_STATUS.PH_CLR_PEND & 0x1))) +/* GET_PH_STATUS REPLY */ +#define SI446X_CMD_REPLY_COUNT_GET_PH_STATUS 2 + /* macros for entire REPLY PH_PEND access of type U8 */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TYPE U8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_SIZE 8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_MASK 0xff + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_MSB 7 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_LSB 0 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_INDEX 1 + /* macros for field FILTER_MATCH_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MASK 0x80 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_BIT 0x80 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_MSB 7 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_LSB 7 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MATCH_PEND_INDEX 1 + /* macros for field FILTER_MISS_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MASK 0x40 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_BIT 0x40 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_MSB 6 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_LSB 6 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_FILTER_MISS_PEND_INDEX 1 + /* macros for field PACKET_SENT_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MASK 0x20 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_BIT 0x20 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_MSB 5 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_LSB 5 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_SENT_PEND_INDEX 1 + /* macros for field PACKET_RX_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_MASK 0x10 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_BIT 0x10 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_MSB 4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_LSB 4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_PACKET_RX_PEND_INDEX 1 + /* macros for field CRC_ERROR_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MASK 0x8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_BIT 0x8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_MSB 3 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_LSB 3 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_CRC_ERROR_PEND_INDEX 1 + /* macros for field ALT_CRC_ERROR_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MASK 0x4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_BIT 0x4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_MSB 2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_LSB 2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_ALT_CRC_ERROR_PEND_INDEX 1 + /* macros for field TX_FIFO_ALMOST_EMPTY_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MASK 0x2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_BIT 0x2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_MSB 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_LSB 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_TX_FIFO_ALMOST_EMPTY_PEND_INDEX 1 + /* macros for field RX_FIFO_ALMOST_FULL_PEND access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MASK 0x1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_BIT 0x1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_MSB 0 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_LSB 0 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_PEND_RX_FIFO_ALMOST_FULL_PEND_INDEX 1 + /* macros for entire REPLY PH_STATUS access of type U8 */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TYPE U8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_SIZE 8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_MASK 0xff + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_MSB 7 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_LSB 0 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_INDEX 2 + /* macros for field FILTER_MATCH access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_MASK 0x80 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_BIT 0x80 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_MSB 7 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_LSB 7 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MATCH_INDEX 2 + /* macros for field FILTER_MISS access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_MASK 0x40 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_BIT 0x40 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_MSB 6 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_LSB 6 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_FILTER_MISS_INDEX 2 + /* macros for field PACKET_SENT access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_MASK 0x20 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_BIT 0x20 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_MSB 5 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_LSB 5 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_SENT_INDEX 2 + /* macros for field PACKET_RX access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_MASK 0x10 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_BIT 0x10 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_MSB 4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_LSB 4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_PACKET_RX_INDEX 2 + /* macros for field CRC_ERROR access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_MASK 0x8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_BIT 0x8 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_MSB 3 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_LSB 3 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_CRC_ERROR_INDEX 2 + /* macros for field ALT_CRC_ERROR access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MASK 0x4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_BIT 0x4 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_MSB 2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_LSB 2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_ALT_CRC_ERROR_INDEX 2 + /* macros for field TX_FIFO_ALMOST_EMPTY access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MASK 0x2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_BIT 0x2 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_MSB 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_LSB 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_TX_FIFO_ALMOST_EMPTY_INDEX 2 + /* macros for field RX_FIFO_ALMOST_FULL access */ + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_TYPE bool + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_SIZE 1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MASK 0x1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_BIT 0x1 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_MSB 0 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_LSB 0 + #define SI446X_CMD_GET_PH_STATUS_REP_PH_STATUS_RX_FIFO_ALMOST_FULL_INDEX 2 +#define SI446X_CMD_ID_GET_CHIP_STATUS 0x23 +/* GET_CHIP_STATUS ARGS */ +#define SI446X_CMD_ARG_COUNT_GET_CHIP_STATUS 2 + /* macros for entire ARG CHIP_CLR_PEND access of type U8 */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_TYPE U8 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_SIZE 8 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_MASK 0xff + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_MSB 7 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND))) + /* macros for field CAL_PEND_CLR access */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MASK 0x40 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_BIT 0x40 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_MSB 6 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_LSB 6 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x40) + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CAL_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x40)) >> 6) + /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MASK 0x20 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_BIT 0x20 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_MSB 5 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_LSB 5 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x20) + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x20)) >> 5) + /* macros for field STATE_CHANGE_PEND_CLR access */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MASK 0x10 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_BIT 0x10 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_MSB 4 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_LSB 4 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x10) + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_STATE_CHANGE_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x10)) >> 4) + /* macros for field CMD_ERROR_PEND_CLR access */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MASK 0x8 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_BIT 0x8 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_MSB 3 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_LSB 3 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x8) + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CMD_ERROR_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x8)) >> 3) + /* macros for field CHIP_READY_PEND_CLR access */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MASK 0x4 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_BIT 0x4 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_MSB 2 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_LSB 2 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x4) + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_CHIP_READY_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x4)) >> 2) + /* macros for field LOW_BATT_PEND_CLR access */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MASK 0x2 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_BIT 0x2 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_MSB 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_LSB 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x2) + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_LOW_BATT_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x2)) >> 1) + /* macros for field WUT_PEND_CLR access */ + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MASK 0x1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_BIT 0x1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_MSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_INDEX 1 + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_is_true (cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x1) + #define SI446X_CMD_GET_CHIP_STATUS_ARG_CHIP_CLR_PEND_WUT_PEND_CLR_value (((cmd.arg.GET_CHIP_STATUS.CHIP_CLR_PEND & 0x1))) +/* GET_CHIP_STATUS REPLY */ +#define SI446X_CMD_REPLY_COUNT_GET_CHIP_STATUS 4 + /* macros for entire REPLY CHIP_PEND access of type U8 */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_TYPE U8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_SIZE 8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_MASK 0xff + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_MSB 7 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_INDEX 1 + /* macros for field CAL_PEND access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_MASK 0x40 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_BIT 0x40 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_MSB 6 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_LSB 6 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CAL_PEND_INDEX 1 + /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MASK 0x20 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_BIT 0x20 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_MSB 5 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_LSB 5 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR_PEND_INDEX 1 + /* macros for field STATE_CHANGE_PEND access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MASK 0x10 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_BIT 0x10 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_MSB 4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_LSB 4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_STATE_CHANGE_PEND_INDEX 1 + /* macros for field CMD_ERROR_PEND access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MASK 0x8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_BIT 0x8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_MSB 3 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_LSB 3 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CMD_ERROR_PEND_INDEX 1 + /* macros for field CHIP_READY_PEND access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MASK 0x4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_BIT 0x4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_MSB 2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_LSB 2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_CHIP_READY_PEND_INDEX 1 + /* macros for field LOW_BATT_PEND access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MASK 0x2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_BIT 0x2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_MSB 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_LSB 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_LOW_BATT_PEND_INDEX 1 + /* macros for field WUT_PEND access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_MASK 0x1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_BIT 0x1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_MSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_PEND_WUT_PEND_INDEX 1 + /* macros for entire REPLY CHIP_STATUS access of type U8 */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_TYPE U8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_SIZE 8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_MASK 0xff + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_MSB 7 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_INDEX 2 + /* macros for field CAL access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_MASK 0x40 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_BIT 0x40 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_MSB 6 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_LSB 6 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CAL_INDEX 2 + /* macros for field FIFO_UNDERFLOW_OVERFLOW_ERROR access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MASK 0x20 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_BIT 0x20 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_MSB 5 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_LSB 5 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR_INDEX 2 + /* macros for field STATE_CHANGE access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MASK 0x10 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_BIT 0x10 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_MSB 4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_LSB 4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_STATE_CHANGE_INDEX 2 + /* macros for field CMD_ERROR access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_MASK 0x8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_BIT 0x8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_MSB 3 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_LSB 3 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CMD_ERROR_INDEX 2 + /* macros for field CHIP_READY access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_MASK 0x4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_BIT 0x4 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_MSB 2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_LSB 2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_CHIP_READY_INDEX 2 + /* macros for field LOW_BATT access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_MASK 0x2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_BIT 0x2 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_MSB 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_LSB 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_LOW_BATT_INDEX 2 + /* macros for field WUT access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_TYPE bool + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_SIZE 1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_MASK 0x1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_BIT 0x1 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_MSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CHIP_STATUS_WUT_INDEX 2 + /* macros for entire REPLY CMD_ERR_STATUS access of type U8 */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_TYPE U8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_SIZE 8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_MASK 0xff + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_MSB 7 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_INDEX 3 + /* macros for field CMD_ERR_STATUS access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_TYPE enum + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_SIZE 8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_MASK 0xff + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_MSB 7 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_INDEX 3 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_NONE 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_COMMAND 16 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_ARG 17 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_COMMAND_BUSY 18 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_INVALID_STATE 19 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_BOOTMODE 49 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_STATUS_CMD_ERR_STATUS_ENUM_CMD_ERROR_BAD_PROPERTY 64 + /* macros for entire REPLY CMD_ERR_CMD_ID access of type U8 */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_TYPE U8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_SIZE 8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_MASK 0xff + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_MSB 7 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_INDEX 4 + /* macros for field CMD_ERR_CMD_ID access */ + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_TYPE enum + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_SIZE 8 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_MASK 0xff + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_MSB 7 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_LSB 0 + #define SI446X_CMD_GET_CHIP_STATUS_REP_CMD_ERR_CMD_ID_CMD_ERR_CMD_ID_INDEX 4 + + +#endif /* _SI446X_CMD_H_ */ diff --git a/si446x_patch.h b/si446x_patch.h new file mode 100644 index 0000000..4b14cc5 --- /dev/null +++ b/si446x_patch.h @@ -0,0 +1,80 @@ +// COPYRIGHT=2015 Silicon Laboratories, Inc. +// GENERATED=09:13 October 20 2015 +// ROMID=0x06 +// FUNCTION=TEST +// MAJOR=0 +// MINOR=0 +// BUILD=0 +// PATCHID=0xCA90 +// REQUIRES=NONE +// SIZE=512 +// CRCT=0x714b + +#define SI446X_PATCH_ROMID 00 +#define SI446X_PATCH_ID 00 + +#define SI446X_PATCH_CMDS \ +0x08,0x04,0x21,0x71,0x4B,0x00,0x00,0xDC,0x95, \ +0x08,0x05,0xA6,0x22,0x21,0xF0,0x41,0x5B,0x26, \ +0x08,0xE2,0x2F,0x1C,0xBB,0x0A,0xA8,0x94,0x28, \ +0x08,0x05,0x87,0x67,0xE2,0x58,0x1A,0x07,0x5B, \ +0x08,0xE1,0xD0,0x72,0xD8,0x8A,0xB8,0x5B,0x7D, \ +0x08,0x05,0x11,0xEC,0x9E,0x28,0x23,0x1B,0x6D, \ +0x08,0xE2,0x4F,0x8A,0xB2,0xA9,0x29,0x14,0x13, \ +0x08,0x05,0xD1,0x2E,0x71,0x6A,0x51,0x4C,0x2C, \ +0x08,0xE5,0x80,0x27,0x42,0xA4,0x69,0xB0,0x7F, \ +0x08,0x05,0xAA,0x81,0x2A,0xBD,0x45,0xE8,0xA8, \ +0x08,0xEA,0xE4,0xF0,0x24,0xC9,0x9F,0xCC,0x3C, \ +0x08,0x05,0x08,0xF5,0x05,0x04,0x27,0x62,0x98, \ +0x08,0xEA,0x6B,0x62,0x84,0xA1,0xF9,0x4A,0xE2, \ +0x08,0x05,0xE9,0x77,0x05,0x4F,0x84,0xEE,0x35, \ +0x08,0xE2,0x43,0xC3,0x8D,0xFB,0xAD,0x54,0x25, \ +0x08,0x05,0x14,0x06,0x5E,0x39,0x36,0x2F,0x45, \ +0x08,0xEA,0x0C,0x1C,0x74,0xD0,0x11,0xFC,0x32, \ +0x08,0x05,0xDA,0x38,0xBA,0x0E,0x3C,0xE7,0x8B, \ +0x08,0xEA,0xB0,0x09,0xE6,0xFF,0x94,0xBB,0xA9, \ +0x08,0x05,0xD7,0x11,0x29,0xFE,0xDC,0x71,0xD5, \ +0x08,0xEA,0x7F,0x83,0xA7,0x60,0x90,0x62,0x18, \ +0x08,0x05,0x84,0x7F,0x6A,0xD1,0x91,0xC6,0x52, \ +0x08,0xEA,0x2A,0xD8,0x7B,0x8E,0x4A,0x9F,0x91, \ +0x08,0x05,0xBD,0xAA,0x9D,0x16,0x18,0x06,0x15, \ +0x08,0xE2,0x55,0xAD,0x2D,0x0A,0x14,0x1F,0x5D, \ +0x08,0x05,0xD3,0xE0,0x7C,0x39,0xCF,0x01,0xF0, \ +0x08,0xEF,0x3A,0x91,0x72,0x6A,0x03,0xBB,0x96, \ +0x08,0xE7,0x83,0x6D,0xA4,0x92,0xFC,0x13,0xA7, \ +0x08,0xEF,0xF8,0xFD,0xCF,0x62,0x07,0x6F,0x1E, \ +0x08,0xE7,0x4C,0xEA,0x4A,0x75,0x4F,0xD6,0xCF, \ +0x08,0xE2,0xF6,0x11,0xE4,0x26,0x0D,0x4D,0xC6, \ +0x08,0x05,0xFB,0xBF,0xE8,0x07,0x89,0xC3,0x51, \ +0x08,0xEF,0x82,0x27,0x04,0x3F,0x96,0xA8,0x58, \ +0x08,0xE7,0x41,0x29,0x3C,0x75,0x2A,0x03,0x1C, \ +0x08,0xEF,0xAF,0x59,0x98,0x36,0xAA,0x0F,0x06, \ +0x08,0xE6,0xF6,0x93,0x41,0x2D,0xEC,0x0E,0x99, \ +0x08,0x05,0x29,0x19,0x90,0xE5,0xAA,0x36,0x40, \ +0x08,0xE7,0xFB,0x68,0x10,0x7D,0x77,0x5D,0xC0, \ +0x08,0xE7,0xCB,0xB4,0xDD,0xCE,0x90,0x54,0xBE, \ +0x08,0xE7,0x72,0x8A,0xD6,0x02,0xF4,0xDD,0xCC, \ +0x08,0xE7,0x6A,0x21,0x0B,0x02,0x86,0xEC,0x15, \ +0x08,0xE7,0x7B,0x7C,0x3D,0x6B,0x81,0x03,0xD0, \ +0x08,0xEF,0x7D,0x61,0x36,0x94,0x7C,0xA0,0xDF, \ +0x08,0xEF,0xCC,0x85,0x3B,0xDA,0xE0,0x5C,0x1C, \ +0x08,0xE7,0xE3,0x75,0xBB,0x39,0x22,0x4B,0xA8, \ +0x08,0xEF,0xF9,0xCE,0xE0,0x5E,0xEB,0x1D,0xCB, \ +0x08,0xE7,0xBD,0xE2,0x70,0xD5,0xAB,0x4E,0x3F, \ +0x08,0xE7,0xB7,0x8D,0x20,0x68,0x6B,0x09,0x52, \ +0x08,0xEF,0xA1,0x1B,0x90,0xCD,0x98,0x00,0x63, \ +0x08,0xEF,0x54,0x67,0x5D,0x9C,0x11,0xFC,0x45, \ +0x08,0xE7,0xD4,0x9B,0xC8,0x97,0xBE,0x8A,0x07, \ +0x08,0xEF,0x52,0x8D,0x90,0x63,0x73,0xD5,0x2A, \ +0x08,0xEF,0x03,0xBC,0x6E,0x1C,0x76,0xBE,0x4A, \ +0x08,0xE7,0xC2,0xED,0x67,0xBA,0x5E,0x66,0x21, \ +0x08,0xEF,0xE7,0x3F,0x87,0xBE,0xE0,0x7A,0x6D, \ +0x08,0xE7,0xC9,0x70,0x93,0x1D,0x64,0xF5,0x6C, \ +0x08,0xEF,0xF5,0x28,0x08,0x34,0xB3,0xB6,0x2C, \ +0x08,0xEF,0x3A,0x0A,0xEC,0x0F,0xDB,0x56,0xCA, \ +0x08,0xEF,0x39,0xA0,0x6E,0xED,0x79,0xD0,0x24, \ +0x08,0xE7,0x6C,0x0B,0xAF,0xA9,0x4E,0x40,0xB5, \ +0x08,0xE9,0xB9,0xAF,0xBF,0x25,0x50,0xD1,0x37, \ +0x08,0x05,0x9E,0xDB,0xDE,0x3F,0x94,0xE9,0x6B, \ +0x08,0xEC,0xC5,0x05,0xAA,0x57,0xDC,0x8A,0x5E, \ +0x08,0x05,0x70,0xDA,0x84,0x84,0xDD,0xCA,0x90