From ddae6a368248e1a0e94338d0001d929390d1cf0d Mon Sep 17 00:00:00 2001 From: DiSlord Date: Thu, 3 Jun 2021 19:28:01 +0300 Subject: [PATCH] Move adc code to CPU folder Small cleanup --- Makefile | 6 ++-- adc.c => NANOVNA_STM32_F072/adc.c | 0 adc_F303.c => NANOVNA_STM32_F303/adc.c | 0 adc_F303.h | 41 -------------------------- main.c | 3 -- 5 files changed, 4 insertions(+), 46 deletions(-) rename adc.c => NANOVNA_STM32_F072/adc.c (100%) rename adc_F303.c => NANOVNA_STM32_F303/adc.c (100%) delete mode 100644 adc_F303.h diff --git a/Makefile b/Makefile index be7f79b..2515a8a 100644 --- a/Makefile +++ b/Makefile @@ -159,7 +159,8 @@ CSRC = $(STARTUPSRC) \ FatFs/ff.c \ FatFs/ffunicode.c \ usbcfg.c \ - main.c plot.c ui.c ili9341.c tlv320aic3204.c si5351.c numfont20x22.c Font5x7.c Font10x14.c flash.c adc_F303.c si4468.c Font7x13b.c rtc.c + NANOVNA_STM32_F303/adc.c \ + main.c plot.c ui.c ili9341.c tlv320aic3204.c si5351.c numfont20x22.c Font5x7.c Font10x14.c flash.c si4468.c Font7x13b.c rtc.c else CSRC = $(STARTUPSRC) \ $(KERNSRC) \ @@ -170,7 +171,8 @@ CSRC = $(STARTUPSRC) \ $(BOARDSRC) \ $(STREAMSSRC) \ usbcfg.c \ - main.c plot.c ui.c ili9341.c numfont20x22.c Font5x7.c Font10x14.c flash.c adc.c si4432.c Font7x13b.c + NANOVNA_STM32_F072/adc.c \ + main.c plot.c ui.c ili9341.c numfont20x22.c Font5x7.c Font10x14.c flash.c si4432.c Font7x13b.c endif # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/adc.c b/NANOVNA_STM32_F072/adc.c similarity index 100% rename from adc.c rename to NANOVNA_STM32_F072/adc.c diff --git a/adc_F303.c b/NANOVNA_STM32_F303/adc.c similarity index 100% rename from adc_F303.c rename to NANOVNA_STM32_F303/adc.c diff --git a/adc_F303.h b/adc_F303.h deleted file mode 100644 index 437b3e7..0000000 --- a/adc_F303.h +++ /dev/null @@ -1,41 +0,0 @@ - -// F303 related ADC defines - - -#define ADC_SMPR_SMP_247P5 6 /**< @brief 260 cycles conversion time. */ -#define ADC_SMPR_SMP_24P5 3 /**< @brief 37 cycles conversion time. */ - - -#define rccEnableWWDG(lp) rccEnableAPB1(RCC_APB1ENR_WWDGEN, lp) -#define ADC_CHSELR_CHSEL6 ADC_CHANNEL_IN3 -#define ADC_CHSELR_CHSEL7 ADC_CHANNEL_IN4 -#define ADC_SMPR_SMP_239P5 7U -#define ADC_SMPR_SMP_28P5 3U /**< @brief 41 cycles conversion time. */ -#define ADC_CFGR_RES_12BIT (0 << 3) -/* -msg_t adcConvert(ADCDriver *adcp, - const ADCConversionGroup *grpp, - adcsample_t *samples, - size_t depth); -*/ -#define ADC_CR1_AWDEN ((uint32_t)0x00800000) /*!< Analog watchdog enable on regular channels */ -//ADC_Common_TypeDef *adcc; -#define ADC_CHSELR_VREFINT ADC_CHANNEL_IN18 -#define ADC_CHSELR_VBAT ADC_CHANNEL_IN17 - -#define ADC_ISR_ADRDY_Pos (0U) -#define ADC_ISR_ADRDY_Msk (0x1U << ADC_ISR_ADRDY_Pos) /*!< 0x00000001 */ -#define ADC_ISR_ADRDY ADC_ISR_ADRDY_Msk /*!< ADC ready flag */ -#define ADC_IER_ADRDYIE_Pos (0U) -#define ADC_IER_ADRDYIE_Msk (0x1U << ADC_IER_ADRDYIE_Pos) /*!< 0x00000001 */ -#define ADC_IER_ADRDYIE ADC_IER_ADRDYIE_Msk /*!< ADC ready interrupt */ -#define ADC_IER_AWD1IE_Pos (7U) -#define ADC_IER_AWD1IE_Msk (0x1U << ADC_IER_AWD1IE_Pos) /*!< 0x00000080 */ -#define ADC_IER_AWD1IE ADC_IER_AWD1IE_Msk /*!< ADC analog watchdog 1 interrupt */ -#define ADC_IER_EOCIE_Pos (2U) -#define ADC_IER_EOCIE_Msk (0x1U << ADC_IER_EOCIE_Pos) /*!< 0x00000004 */ -#define ADC_IER_EOCIE ADC_IER_EOCIE_Msk /*!< ADC group regular end of unitary conversion interrupt */ -#define ADC_IER_EOSMPIE_Pos (1U) -#define ADC_IER_EOSMPIE_Msk (0x1U << ADC_IER_EOSMPIE_Pos) /*!< 0x00000002 */ -#define ADC_IER_EOSMPIE ADC_IER_EOSMPIE_Msk /*!< ADC group regular end of sampling interrupt */ - diff --git a/main.c b/main.c index a322480..cd8f31b 100644 --- a/main.c +++ b/main.c @@ -15,9 +15,6 @@ * the Free Software Foundation, Inc., 51 Franklin Street, * Boston, MA 02110-1301, USA. */ -//#define HAL_USE_SERIAL 1 -//#define STM32_SERIAL_USE_USART1 1 - #include "ch.h" #include "hal.h"