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@ -268,60 +268,6 @@ bool PE4302_Write_Byte(unsigned char DATA )
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#endif
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#if 0
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//-----------------SI4432 dummy------------------
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void SI4432_Write_Byte(unsigned char ADR, unsigned char DATA ) {}
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unsigned char SI4432_Read_Byte(unsigned char ADR) {return ADR;}
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float set_rbw(float WISH) {return (WISH > 600.0?600: (WISH<3.0?3:WISH));}
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void set_calibration_freq(int p) {}
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void SI4432_Set_Frequency(long f) {}
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void PE4302_Write_Byte(unsigned char DATA ) {}
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void PE4302_init(void) {}
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#endif
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#ifdef __SIMULATION__
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unsigned long seed = 123456789;
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extern float actual_rbw;
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float myfrand(void)
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{
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seed = (unsigned int) (1103515245 * seed + 12345) ;
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return ((float) seed) / 1000000000.0;
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}
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#define NOISE ((myfrand()-2) * 2) // +/- 4 dBm noise
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extern int settingAttenuate;
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//#define LEVEL(i, f, v) (v * (1-(fabs(f - frequencies[i])/actual_rbw/1000)))
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float LEVEL(uint32_t i, freq_t f, int v)
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{
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float dv;
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float df = fabs((float)f - (float)i);
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if (df < actual_rbw*1000)
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dv = df/(actual_rbw*1000);
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else
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dv = 1 + 50*(df - actual_rbw*1000)/(actual_rbw*1000);
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return (v - dv - settingAttenuate);
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}
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float Simulated_SI4432_RSSI(uint32_t i, int s)
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{
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SI4432_Sel = s;
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float v = -100 + log10(actual_rbw)*10 + NOISE;
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if(s == 0) {
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v = fmax(LEVEL(i,10000000,-20),v);
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v = fmax(LEVEL(i,20000000,-40),v);
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v = fmax(LEVEL(i,30000000,-30),v);
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v = fmax(LEVEL(i,40000000,-90),v);
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} else {
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v = fmax(LEVEL(i,320000000,-20),v);
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v = fmax(LEVEL(i,340000000,-40),v);
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v = fmax(LEVEL(i,360000000,-30),v);
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v = fmax(LEVEL(i,380000000,-90),v);
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}
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return(v);
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}
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#endif
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//------------------------------- ADF4351 -------------------------------------
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@ -453,22 +399,6 @@ void ADF4351_Set(int channel)
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SPI_BR_SET(SI4432_SPI, SI4432_SPI_SPEED);
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}
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#if 0
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void ADF4351_disable_output(void)
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{
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bitClear (registers[4], 5); // main output
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reg_dirty[4] = true;
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ADF4351_Set(0);
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}
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void ADF4351_enable_output(void)
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{
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bitSet (registers[4], 5); // main output
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reg_dirty[4] = true;
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ADF4351_Set(0);
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}
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#endif
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static freq_t prev_actual_freq = 0;
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void ADF4351_force_refresh(void) {
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@ -614,9 +544,6 @@ static uint32_t gcd(uint32_t x, uint32_t y)
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}
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#endif
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#if 0
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#endif
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uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz
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{
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target_freq = freq;
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@ -648,8 +575,6 @@ uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz
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}
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reg_dirty[4] = true;
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#if 1
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uint32_t PFDR = (uint32_t)PFDRFout[channel];
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uint32_t MOD = ADF4350_modulo;
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if (MOD == 0)
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@ -662,31 +587,7 @@ uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz
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FRAC -= MOD;
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INTA++;
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}
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#else
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uint64_t PFDR = PFDRFout[channel];
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uint16_t MOD = ADF4350_modulo;
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if (MOD == 0)
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MOD = 60;
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uint64_t half_spacing = PFDR / MOD / 2 / OutputDivider;
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INTA = (((uint64_t)freq + half_spacing) * OutputDivider) / PFDR;
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uint64_t f_int = INTA *(uint64_t) MOD;
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uint64_t f_target = ((((uint64_t)freq + half_spacing) * OutputDivider) * (uint64_t) MOD) / PFDR;
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FRAC = f_target - f_int;
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if (FRAC >= MOD) {
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FRAC -= MOD;
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INTA++;
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}
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#endif
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#if 0
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while (FRAC > 4095 || MOD > 4095) {
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FRAC = FRAC >> 1;
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MOD = MOD >> 1;
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// Serial.println( "MOD/FRAC reduced");
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}
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#endif
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#if 0
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#if 0 // No visible performance improvement
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uint32_t reduce = gcd(MOD, FRAC);
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if (reduce>1) {
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FRAC /= reduce;
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@ -696,7 +597,8 @@ uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz
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}
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#endif
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uint64_t actual_freq = ((uint64_t)PFDR *(INTA * MOD +FRAC))/OutputDivider / MOD;
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#if 0
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#if 0 // Only for debugging
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int max_delta = PFDRFout[channel]/OutputDivider/MOD/100;
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if (actual_freq < freq - max_delta || actual_freq > freq + max_delta ){
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while(1)
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@ -707,11 +609,11 @@ uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz
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while(1)
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my_microsecond_delay(10);
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}
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if (FRAC >= MOD ){
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while(1)
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my_microsecond_delay(10);
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}
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#endif
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// if (FRAC >= MOD ){
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// while(1)
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// my_microsecond_delay(10);
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// }
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bitWrite (registers[4], 10, 1); // Mute till lock detect
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@ -765,7 +667,7 @@ void ADF4351_enable_out(int s)
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}
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// ------------------------------ SI4463 -------------------------------------
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// ------------------------------ SI4468 -------------------------------------
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bool SI4463_frequency_changed = false;
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@ -947,7 +849,6 @@ static void SI4463_set_properties(uint16_t prop, void* values, uint8_t len)
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#include "SI446x_cmd.h"
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#ifdef __SI4468__
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#include "radio_config_Si4468_undef.h"
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#undef RADIO_CONFIGURATION_DATA_ARRAY
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#include "radio_config_Si4468_default.h"
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@ -957,7 +858,7 @@ static void SI4463_set_properties(uint16_t prop, void* values, uint8_t len)
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#define GLOBAL_GPIO_PIN_CFG 0x13, 0x07, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00
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#define GLOBAL_CLK_CFG 0x11, 0x00, 0x01, 0x01, 0x00
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// ---------------------------------------------------------------------------------------------------- v ------------ RSSI control byte
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#define GLOBAL_RF_MODEM_RAW_CONTROL 0x11, 0x20, 0x0A, 0x45, 0x03, 0x00, 0x00, 0x01, 0x00, 0xFF, 0x06, 0x18, 0x10, 0x40
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#define GLOBAL_RF_MODEM_RAW_CONTROL 0x11, 0x20, 0x0A, 0x45, 0x03, 0x00, 0x00, 0x01, 0x00, 0xFF, 0x06, 0x03, 0x10, 0x40
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// -----------------------------------------------------------------------------------------------------^ --------------
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#define GLOBAL_RF_MODEM_AGC_CONTROL 0x11, 0x20, 0x01, 0x35, 0xF1 // Override AGC gain increase
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@ -977,7 +878,6 @@ static void SI4463_set_properties(uint16_t prop, void* values, uint8_t len)
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// Remember to change RF_MODEM_AFC_LIMITER_1_3_1 !!!!!!!!!
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static const uint8_t SI4468_config[] = RADIO_CONFIGURATION_DATA_ARRAY;
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#endif
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// Set new state
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static void SI4463_set_state(si446x_state_t newState)
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@ -1151,6 +1051,10 @@ void SI4463_start_rx(uint8_t CHANNEL)
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goto retry;
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}
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#endif
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{
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uint8_t data2[] = { 0x11, 0x20, 0x01, 0x58, 0x10 }; // set FAST_DELAY to 0x10
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SI4463_do_api(data2, sizeof(data2), NULL, 0);
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}
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SI4463_in_tx_mode = false;
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}
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@ -1303,9 +1207,6 @@ void set_RSSI_comp(void)
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// Start ID: 0x4E
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// Default values: 0x40,
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// Descriptions:
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// MODEM_RSSI_JUMP_THRESH - Configures the RSSI Jump Detection threshold.
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// MODEM_RSSI_CONTROL - Control of the averaging modes and latching time for reporting RSSI value(s).
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// MODEM_RSSI_CONTROL2 - RSSI Jump Detection control.
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// MODEM_RSSI_COMP - RSSI compensation value.
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//
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// #define RF_MODEM_RSSI_COMP_1 0x11, 0x20, 0x01, 0x4E, 0x40
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@ -1334,7 +1235,7 @@ void si_set_offset(int16_t offset)
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// MODEM_FREQ_OFFSET1 - High byte of the offset
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// MODEM_FREQ_OFFSET2 - Low byte of the offset
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//
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// #define RF_MODEM_RSSI_COMP_1 0x11, 0x20, 0x01, 0x4E, 0x40
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SI4463_offset_value = offset;
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uint8_t data[] = {
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0x11,
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@ -1383,7 +1284,7 @@ static int buf_index = 0;
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static bool buf_read = false;
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uint32_t old_t = 0;
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//#define __USE_FFR_FOR_RSSI__
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// #define __USE_FFR_FOR_RSSI__
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static char Si446x_readRSSI(void){
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#ifdef __USE_FFR_FOR_RSSI__
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@ -1407,10 +1308,11 @@ static char Si446x_readRSSI(void){
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SPI_WRITE_16BIT(SI4432_SPI, 0x00); // begin read 2 bytes
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SPI_WRITE_16BIT(SI4432_SPI, 0x00); // next read 2 bytes
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while (SPI_IS_BUSY(SI4432_SPI)); // wait tx
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SPI_READ_8BIT(SI4432_SPI); // read CMD_ COMPLETE
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SPI_READ_8BIT(SI4432_SPI); // MODEM_PEND
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SPI_READ_8BIT(SI4432_SPI); // MODEM_STATUS
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SPI_READ_8BIT(SI4432_SPI); // CURR_RSSI
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char rssi = SPI_READ_8BIT(SI4432_SPI); // LATCH_RSSI
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char rssi = SPI_READ_8BIT(SI4432_SPI); // CURR_RSSI
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// char rssi = SPI_READ_8BIT(SI4432_SPI); // LATCH_RSSI
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SI_CS_HIGH;
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#endif
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return rssi;
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@ -1420,6 +1322,17 @@ void SI446x_Fill(int s, int start)
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{
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(void)s;
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#if 0 // Only for testing
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uint8_t data2[] = {
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0x11, 0x20, 0x01, 0x4C, 0x03 // set RSSI control
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};
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SI4463_do_api(data2, sizeof(data2), NULL, 0);
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uint8_t data[] = {
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0x12, 0x20, 0x01, 0x4C // get RSSI control
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};
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SI4463_do_api(data, sizeof(data), data, 1);
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#endif
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SPI_BR_SET(SI4432_SPI, SI4432_SPI_FASTSPEED);
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uint32_t t = setting.additional_step_delay_us;
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if (t < old_t +100 && t + 100 > old_t) { // avoid oscillation
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