From d7dd5f13e0b481dd79aa12bfccbd93b19df2748c Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Sun, 25 Oct 2020 15:48:34 +0100 Subject: [PATCH] All working!!!!! --- nanovna.h | 7 ++ radio_config_Si4468_200Hz.h | 10 +- radio_config_Si4468_short.h | 2 +- sa_core.c | 52 ++++++---- si4432.c | 192 +++++++++++++++++++++++------------- ui_sa.c | 12 +++ 6 files changed, 182 insertions(+), 93 deletions(-) diff --git a/nanovna.h b/nanovna.h index 1b9c988..39958ee 100644 --- a/nanovna.h +++ b/nanovna.h @@ -204,6 +204,7 @@ void set_RBW(uint32_t rbw_x10); void set_drive(int d); void set_IF(int f); void set_IF2(int f); +void set_R(int f); void set_step_delay(int t); void set_offset_delay(int t); void set_repeat(int); @@ -1020,4 +1021,10 @@ enum { enum { T_AUTO, T_NORMAL, T_SINGLE, T_DONE, T_UP, T_DOWN }; + + +// -------------------- Si4432.c --------------- +extern int SI4463_R; +void Si4463_set_refer(int ref); + /*EOF*/ diff --git a/radio_config_Si4468_200Hz.h b/radio_config_Si4468_200Hz.h index f3926c1..5f4484f 100644 --- a/radio_config_Si4468_200Hz.h +++ b/radio_config_Si4468_200Hz.h @@ -22,7 +22,7 @@ // Crys_freq(Hz): 26000000 Crys_tol(ppm): 1 IF_mode: 2 High_perf_Ch_Fil: 1 OSRtune: 0 Ch_Fil_Bw_AFC: 0 ANT_DIV: 0 PM_pattern: 0 // MOD_type: 2 Rsymb(sps): 400 Fdev(Hz): 1 RXBW(Hz): 200 Manchester: 0 AFC_en: 0 Rsymb_error: 0.0 Chip-Version: 2 // RF Freq.(MHz): 978 API_TC: 29 fhst: 250000 inputBW: 1 BERT: 1 RAW_dout: 0 D_source: 1 Hi_pfm_div: 1 -// API_ARR_Det_en: 0 Fdev_error: 0 API_ETSI: 2 +// API_ARR_Det_en: 0 Fdev_error: 0 API_ETSI: 0 // // # RX IF frequency is -406250 Hz // # WB filter 15 (BW = 0.23 kHz); NB-filter 15 (BW = 0.23 kHz) @@ -51,7 +51,7 @@ // Command: RF_GPIO_PIN_CFG // Description: Configures the GPIO pins. */ -#define RF_GPIO_PIN_CFG 0x13, 0x08, 0x08, 0x0A, 0x21, 0x00, 0x00, 0x00 +#define RF_GPIO_PIN_CFG 0x13, 0x08, 0x08, 0x07, 0x21, 0x00, 0x00, 0x00 /* // Set properties: RF_GLOBAL_XO_TUNE_1 @@ -139,7 +139,7 @@ // MODEM_BCR_OSR_1 - RX BCR/Slicer oversampling rate (12-bit unsigned number). // MODEM_BCR_OSR_0 - RX BCR/Slicer oversampling rate (12-bit unsigned number). */ -#define RF_MODEM_TX_RAMP_DELAY_12 0x11, 0x20, 0x0C, 0x18, 0x01, 0x00, 0x0A, 0x03, 0xC0, 0x00, 0xB0, 0x10, 0x0C, 0xF9, 0x00, 0x44 +#define RF_MODEM_TX_RAMP_DELAY_12 0x11, 0x20, 0x0C, 0x18, 0x01, 0x00, 0x08, 0x03, 0xC0, 0x00, 0xB0, 0x10, 0x0C, 0xE8, 0x00, 0x44 /* // Set properties: RF_MODEM_BCR_NCO_OFFSET_2_12 @@ -427,7 +427,7 @@ // Descriptions: // GLOBAL_CLK_CFG - Clock configuration options. */ -#define RF_GLOBAL_CLK_CFG_1 0x11, 0x00, 0x01, 0x01, 0x00 +#define RF_GLOBAL_CLK_CFG_1 0x11, 0x00, 0x01, 0x01, 0x40 /* // Set properties: RF_GLOBAL_CONFIG_1_1 @@ -540,7 +540,7 @@ // MODEM_BCR_OSR_1 - RX BCR/Slicer oversampling rate (12-bit unsigned number). // MODEM_BCR_OSR_0 - RX BCR/Slicer oversampling rate (12-bit unsigned number). */ -#define RF_MODEM_TX_RAMP_DELAY_12_1 0x11, 0x20, 0x0C, 0x18, 0x01, 0x00, 0x0A, 0x03, 0xC0, 0x00, 0xF0, 0x10, 0x54, 0xF9, 0x00, 0x55 +#define RF_MODEM_TX_RAMP_DELAY_12_1 0x11, 0x20, 0x0C, 0x18, 0x01, 0x00, 0x08, 0x03, 0xC0, 0x00, 0xF0, 0x10, 0x54, 0xE8, 0x00, 0x55 /* // Set properties: RF_MODEM_BCR_NCO_OFFSET_2_12_1 diff --git a/radio_config_Si4468_short.h b/radio_config_Si4468_short.h index 286b42c..3a3f78b 100644 --- a/radio_config_Si4468_short.h +++ b/radio_config_Si4468_short.h @@ -4,7 +4,7 @@ #undef RF_MODEM_AGC_CONTROL_1 -#define RF_MODEM_AGC_CONTROL_1 0x11, 0x20, 0x01, 0x35, 0x92 // Override AGC gain increase +#define RF_MODEM_AGC_CONTROL_1 0x11, 0x20, 0x01, 0x35, 0xF1 // Override AGC gain increase #undef RADIO_CONFIGURATION_DATA_ARRAY #define RADIO_CONFIGURATION_DATA_ARRAY { \ diff --git a/sa_core.c b/sa_core.c index cd3a5c3..e1e358e 100644 --- a/sa_core.c +++ b/sa_core.c @@ -238,7 +238,10 @@ void set_refer_output(int v) #ifdef __SI4432__ SI4432_SetReference(setting.refer); #endif -// dirty = true; +#ifdef __SI4463__ + Si4463_set_refer(setting.refer); +#endif + // dirty = true; } void set_decay(int d) @@ -392,6 +395,12 @@ void set_IF2(int f) config_save(); } +void set_R(int f) +{ + ADF4351_R_counter(f); + dirty = true; +} + #define POWER_STEP 0 // Should be 5 dB but appearently it is lower #define POWER_OFFSET 15 #define SWITCH_ATTENUATION 30 @@ -936,9 +945,10 @@ void calculate_step_delay(void) #ifdef __SI4463__ if (actual_rbw_x10 >= 2700) { SI4432_step_delay = 400; SI4432_offset_delay = 100; } else if (actual_rbw_x10 >= 800) { SI4432_step_delay = 500; SI4432_offset_delay = 100; } - else if (actual_rbw_x10 >= 250) { SI4432_step_delay = 1000; SI4432_offset_delay = 100; } - else if (actual_rbw_x10 >= 30) { SI4432_step_delay = 15000; SI4432_offset_delay = 100; } - else { SI4432_step_delay = 20000; SI4432_offset_delay =1600; } + else if (actual_rbw_x10 >= 100) { SI4432_step_delay = 700; SI4432_offset_delay = 100; } + else if (actual_rbw_x10 >= 30) { SI4432_step_delay = 800; SI4432_offset_delay = 100; } + else if (actual_rbw_x10 >= 10) { SI4432_step_delay = 3000; SI4432_offset_delay = 100; } + else { SI4432_step_delay = 12000; SI4432_offset_delay =1600; } #endif if (setting.step_delay_mode == SD_PRECISE) // In precise mode wait twice as long for RSSI to stabalize SI4432_step_delay *= 2; @@ -1314,29 +1324,29 @@ void update_rbw(void) // calculate the actual_rbw and the vbwSteps (# } else { setting.vbw_x10 = 3000; // trick to get right default rbw in zero span mode } - actual_rbw_x10 = setting.rbw_x10; // requested rbw - if (actual_rbw_x10 == 0) { // if auto rbw + uint32_t temp_actual_rbw_x10 = setting.rbw_x10; // requested rbw , 32 bit !!!!!! + if (temp_actual_rbw_x10 == 0) { // if auto rbw if (setting.step_delay_mode==SD_FAST) { // if in fast scanning if (setting.fast_speedup > 2) - actual_rbw_x10 = 6*setting.vbw_x10; // rbw is four the frequency step to ensure no gaps in coverage as there are some weird jumps + temp_actual_rbw_x10 = 6*setting.vbw_x10; // rbw is six times the frequency step to ensure no gaps in coverage as there are some weird jumps else - actual_rbw_x10 = 4*setting.vbw_x10; // rbw is four the frequency step to ensure no gaps in coverage as there are some weird jumps + temp_actual_rbw_x10 = 4*setting.vbw_x10; // rbw is four times the frequency step to ensure no gaps in coverage as there are some weird jumps } else - actual_rbw_x10 = 2*setting.vbw_x10; // rbw is twice the frequency step to ensure no gaps in coverage + temp_actual_rbw_x10 = 2*setting.vbw_x10; // rbw is twice the frequency step to ensure no gaps in coverage } #ifdef __SI4432__ - if (actual_rbw_x10 < 26) - actual_rbw_x10 = 26; - if (actual_rbw_x10 > 6000) - actual_rbw_x10 = 6000; + if (temp_actual_rbw_x10 < 26) + temp_actual_rbw_x10 = 26; + if (temp_actual_rbw_x10 > 6000) + temp_actual_rbw_x10 = 6000; #endif #ifdef __SI4463__ - if (actual_rbw_x10 < 1) - actual_rbw_x10 = 1; - if (actual_rbw_x10 > 8500) - actual_rbw_x10 = 8500; + if (temp_actual_rbw_x10 < 1) + temp_actual_rbw_x10 = 1; + if (temp_actual_rbw_x10 > 8500) + temp_actual_rbw_x10 = 8500; #endif - + actual_rbw_x10 = temp_actual_rbw_x10; // Now it fits in 16 bit #ifdef __SI4432__ if (setting.spur_removal && actual_rbw_x10 > 3000) @@ -1345,8 +1355,8 @@ void update_rbw(void) // calculate the actual_rbw and the vbwSteps (# actual_rbw_x10 = SI4432_SET_RBW(actual_rbw_x10); // see what rbw the SI4432 can realize #endif #ifdef __SI4463__ -// if (setting.spur_removal && actual_rbw_x10 > 3000) // Will depend on BPF width <------------------ TODO ------------------------- -// actual_rbw_x10 = 2500; // if spur suppression reduce max rbw to fit within BPF + if (setting.spur_removal && actual_rbw_x10 > 3000) // Will depend on BPF width <------------------ TODO ------------------------- + actual_rbw_x10 = 3000; // if spur suppression reduce max rbw to fit within BPF actual_rbw_x10 = SI4463_SET_RBW(actual_rbw_x10); // see what rbw the SI4432 can realize #endif if (setting.frequency_step > 0 && MODE_INPUT(setting.mode)) { // When doing frequency scanning in input mode @@ -1823,7 +1833,7 @@ modulation_again: } #endif #ifdef __SI4463__ - if (setting.mode == M_LOW || setting.mode == M_GENLOW) + if ((setting.mode == M_LOW || setting.mode == M_GENLOW ) && i == 0) { set_freq (SI4463_RX , local_IF); } diff --git a/si4432.c b/si4432.c index 88fb5aa..0b3d592 100644 --- a/si4432.c +++ b/si4432.c @@ -953,9 +953,11 @@ void ADF4351_Setup(void) // while(1) { // - ADF4351_R_counter(2); + ADF4351_R_counter(3); ADF4351_set_frequency(0,2000000000,0); + + // ADF4351_set_frequency(1,150000000,0); // ADF4351_Set(0); // ADF4351_Set(1); @@ -1239,6 +1241,14 @@ void ADF4351_prep_frequency(int channel, unsigned long freq, int drive) // freq int SI4463_frequency_changed = false; +static int SI4463_band = -1; +static int SI4463_outdiv = -1; +static uint32_t SI4463_prev_freq = 0; +float SI4463_step_size = 0; +uint8_t SI4463_channel = 0; +int SI4463_R = 5; + + #define MIN_DELAY 2 #include @@ -1441,6 +1451,7 @@ static const uint8_t SI4463_config[] = RADIO_CONFIGURATION_DATA_ARRAY; //#undef RF_MODEM_AGC_CONTROL_1 //#define RF_MODEM_AGC_CONTROL_1 0x11, 0x20, 0x01, 0x35, 0x92 // Override AGC gain increase +#define RF_MODEM_AGC_CONTROL_1 0x11, 0x20, 0x01, 0x35, 0xE0 + 0x10 //#undef RF_MODEM_RSSI_JUMP_THRESH_4 //#define RF_MODEM_RSSI_JUMP_THRESH_4 0x11, 0x20, 0x04, 0x4B, 0x06, 0x09, 0x10, 0x45 // Increase RSSI reported value with 2.5dB @@ -1481,7 +1492,7 @@ void SI4463_start_rx(uint8_t CHANNEL) }; retry: SI4463_do_api(data, sizeof(data), NULL, 0); - my_microsecond_delay(SI4432_offset_delay); +// my_microsecond_delay(SI4432_offset_delay); #if 0 // my_microsecond_delay(15000); @@ -1502,6 +1513,28 @@ void SI4463_clear_int_status() } +void Si4463_set_refer(int ref) +{ + if (ref >= 0) { + uint8_t data[8] = { + 0x13, 0x08, 0x08, 0x07, 0x12, 0x00, 0x00, 0x00 // GPIO_PIN_CFG GPIO 0 input ,1 CTS, clock div out + }; + SI4463_do_api(data, 8, NULL, 0); + + uint8_t data2[5] = { + 0x11, 0x00, 0x01, 0x01, 0x40 // GLOBAL_CLK_CFG Clock config + }; + data2[4] |= ref<<3; + SI4463_do_api(data2, 5, NULL, 0); + } else { + uint8_t data[8] = { + 0x13, 0x01, 0x08, 0x01, 0x12, 0x00, 0x00, 0x00 // GPIO_PIN_CFG GLOBAL_CLK_CFG GPIO 0,1 CTS, GPIO 2 clock div out + }; + SI4463_do_api(data, 8, NULL, 0); + + } +} + si446x_info_t SI4463_info; void Si446x_getInfo(si446x_info_t* info) @@ -1959,17 +1992,17 @@ uint16_t SI4463_force_RBW(int f) } SI4463_clear_int_status(); retry: - SI4463_start_rx(0); + SI4463_start_rx(SI4463_channel); my_microsecond_delay(15000); si446x_state_t s = getState(); if (s != SI446X_STATE_RX) { - SI4463_start_rx(0); - my_microsecond_delay(1000000); + SI4463_start_rx(SI4463_channel); + osalThreadSleepMilliseconds(1000); si446x_state_t s = getState(); if (s != SI446X_STATE_RX) { ili9341_drawstring_7x13("Waiting for RX", 50, 200); - my_microsecond_delay(3000000); + osalThreadSleepMilliseconds(3000); goto retry; } ili9341_drawstring_7x13("Waiting done ", 50, 200); @@ -1994,43 +2027,51 @@ static int prev_band = -1; void SI4463_set_freq(uint32_t freq, uint32_t step_size) { - int band = -1; - int outdiv; uint32_t offs = ((freq / 1000)* 0) / 1000; float RFout=(freq+offs)/1000000.0; // To MHz if (RFout >= 822 && RFout <= 1140) { // till 1140MHz - band = 0; - outdiv = 4; + SI4463_band = 0; + SI4463_outdiv = 4; #if 0 // band 4 does not function } else if (RFout >= 568 && RFout <= 758 ) { // works till 758MHz - band = 4; - outdiv = 6; + SI4463_band = 4; + SI4463_outdiv = 6; #endif } else if (RFout >= 420 && RFout <= 568) { // works till 568MHz - band = 2; - outdiv = 8; + SI4463_band = 2; + SI4463_outdiv = 8; } else if (RFout >= 329 && RFout <= 454) { // works till 454MHz - band = 1; - outdiv = 10; + SI4463_band = 1; + SI4463_outdiv = 10; } else if (RFout >= 274 && RFout <= 339) { // to 339 - band = 3; - outdiv = 12; + SI4463_band = 3; + SI4463_outdiv = 12; } else if (RFout >= 136 && RFout <= 190){ // 136 { // To 190 - band = 5; - outdiv = 24; + SI4463_band = 5; + SI4463_outdiv = 24; } - if (band == -1) + if (SI4463_band == -1) return; - int32_t R = (RFout * outdiv) / (Npresc ? 2*freq_xco : 4*freq_xco) - 1; // R between 0x00 and 0x7f (127) - float MOD = 520251.0; - int32_t F = (((RFout * outdiv) / (Npresc ? 2*freq_xco : 4*freq_xco)) - R) * MOD; - int S = (int)(step_size / 14.305); - if (S == 0) S = 1; - setState(SI446X_STATE_READY); - my_microsecond_delay(100); + int S = 4 ; // Aprox 100 Hz channels + SI4463_step_size = S * (Npresc ? 2000000*freq_xco : 4000000*freq_xco) / ((2<<18) * SI4463_outdiv); + + + if (freq < SI4463_prev_freq || freq > SI4463_prev_freq + 255 * SI4463_step_size ) { + + SI4463_channel = 128; + SI4463_prev_freq = freq - SI4463_channel * SI4463_step_size; + + RFout -= SI4463_channel * SI4463_step_size / 1000000.0; // shift for channel 128 - /* + int32_t R = (RFout * SI4463_outdiv) / (Npresc ? 2*freq_xco : 4*freq_xco) - 1; // R between 0x00 and 0x7f (127) + float MOD = 520251.0; + int32_t F = (((RFout * SI4463_outdiv) / (Npresc ? 2*freq_xco : 4*freq_xco)) - R) * MOD; + + setState(SI446X_STATE_READY); + my_microsecond_delay(100); + + /* // Set properties: RF_FREQ_CONTROL_INTE_8 // Number of properties: 8 // Group ID: 0x40 @@ -2045,26 +2086,26 @@ void SI4463_set_freq(uint32_t freq, uint32_t step_size) // FREQ_CONTROL_CHANNEL_STEP_SIZE_0 - EZ Frequency Programming channel step size. // FREQ_CONTROL_W_SIZE - Set window gating period (in number of crystal reference clock cycles) for counting VCO frequency during calibration. // FREQ_CONTROL_VCOCNT_RX_ADJ - Adjust target count for VCO calibration in RX mode. - */ - // #define RF_FREQ_CONTROL_INTE_8_1 0x11, 0x40, 0x08, 0x00, 0x41, 0x0D, 0xA9, 0x5A, 0x4E, 0xC5, 0x20, 0xFE - uint8_t data[] = { - 0x11, 0x40, 0x08, 0x00, - (uint8_t) R, // R data[4] - (uint8_t) ((F>>16) & 255), // F2,F1,F0 data[5] .. data[7] - (uint8_t) ((F>> 8) & 255), // F2,F1,F0 data[5] .. data[7] - (uint8_t) ((F ) & 255), // F2,F1,F0 data[5] .. data[7] - (uint8_t) ((S>> 8) & 255), // Step size data[8] .. data[9] - (uint8_t) ((S ) & 255), // Step size data[8] .. data[9] - 0x20, // Window gate - 0xFF // Adj count - }; + */ + // #define RF_FREQ_CONTROL_INTE_8_1 0x11, 0x40, 0x08, 0x00, 0x41, 0x0D, 0xA9, 0x5A, 0x4E, 0xC5, 0x20, 0xFE + uint8_t data[] = { + 0x11, 0x40, 0x08, 0x00, + (uint8_t) R, // R data[4] + (uint8_t) ((F>>16) & 255), // F2,F1,F0 data[5] .. data[7] + (uint8_t) ((F>> 8) & 255), // F2,F1,F0 data[5] .. data[7] + (uint8_t) ((F ) & 255), // F2,F1,F0 data[5] .. data[7] + (uint8_t) ((S>> 8) & 255), // Step size data[8] .. data[9] + (uint8_t) ((S ) & 255), // Step size data[8] .. data[9] + 0x20, // Window gate + 0xFF // Adj count + }; - SI4463_do_api(data, sizeof(data), NULL, 0); + SI4463_do_api(data, sizeof(data), NULL, 0); - if (band != prev_band) { - /* + if (SI4463_band != prev_band) { + /* // Set properties: RF_MODEM_CLKGEN_BAND_1 // Number of properties: 1 // Group ID: 0x20 @@ -2072,31 +2113,50 @@ void SI4463_set_freq(uint32_t freq, uint32_t step_size) // Default values: 0x08, // Descriptions: // MODEM_CLKGEN_BAND - Select PLL Synthesizer output divider ratio as a function of frequency band. - */ - // #define RF_MODEM_CLKGEN_BAND_1 0x11, 0x20, 0x01, 0x51, 0x0A - uint8_t data2[] = { - 0x11, 0x20, 0x01, 0x51, - 0x10 + (uint8_t)(band + (Npresc ? 0x08 : 0)) // 0x08 for high performance mode, 0x10 to skip recal - }; + */ + // #define RF_MODEM_CLKGEN_BAND_1 0x11, 0x20, 0x01, 0x51, 0x0A + uint8_t data2[] = { + 0x11, 0x20, 0x01, 0x51, + 0x10 + (uint8_t)(SI4463_band + (Npresc ? 0x08 : 0)) // 0x08 for high performance mode, 0x10 to skip recal + }; SI4463_do_api(data2, sizeof(data2), NULL, 0); my_microsecond_delay(30000); - prev_band = band; - } - -// SI4463_clear_int_status(); -retry: - SI4463_start_rx(0); - my_microsecond_delay(200); - si446x_state_t s = getState(); - if (s != SI446X_STATE_RX) { - SI4463_start_rx(0); - my_microsecond_delay(1000000); + prev_band = SI4463_band; + } + // SI4463_clear_int_status(); + retry: + SI4463_start_rx(SI4463_channel); + my_microsecond_delay(200); si446x_state_t s = getState(); if (s != SI446X_STATE_RX) { - my_microsecond_delay(3000000); - goto retry; + SI4463_start_rx(SI4463_channel); + osalThreadSleepMilliseconds(1000); + si446x_state_t s = getState(); + if (s != SI446X_STATE_RX) { + osalThreadSleepMilliseconds(3000); + goto retry; + } } + } else + { + SI4463_channel = (freq - SI4463_prev_freq)/SI4463_step_size; + SI4463_start_rx(SI4463_channel); + +/* + uint8_t data[] = { + 0x36, + (uint8_t) R, // R data[4] + (uint8_t) ((F>>16) & 255), // F2,F1,F0 data[5] .. data[7] + (uint8_t) ((F>> 8) & 255), // F2,F1,F0 data[5] .. data[7] + (uint8_t) ((F ) & 255), // F2,F1,F0 data[5] .. data[7] + 0x00, + 0xFF + }; + SI4463_do_api(data, sizeof(data), NULL, 0); + my_microsecond_delay(200); + */ } + SI4463_frequency_changed = true; } @@ -2158,12 +2218,12 @@ again: Si446x_getInfo(&SI4463_info); // s = getState(); // SI4463_clear_int_status(); - SI4463_start_rx(0); + SI4463_start_rx(SI4463_channel); my_microsecond_delay(15000); s = getState(); if (s != SI446X_STATE_RX) { ili9341_drawstring_7x13("Waiting for RX", 50, 200); - my_microsecond_delay(1000000); + osalThreadSleepMilliseconds(3000); goto again; } ili9341_drawstring_7x13("Waiting ready ", 50, 200); diff --git a/ui_sa.c b/ui_sa.c index 399014a..f59bd05 100644 --- a/ui_sa.c +++ b/ui_sa.c @@ -408,6 +408,7 @@ enum { KM_ACTUALPOWER, KM_IF, KM_SAMPLETIME, KM_DRIVE, KM_LOWOUTLEVEL, KM_DECAY, KM_NOISE, KM_10MHZ, KM_REPEAT, KM_OFFSET, KM_TRIGGER, KM_LEVELSWEEP, KM_SWEEP_TIME, KM_OFFSET_DELAY, KM_FAST_SPEEDUP, KM_GRIDLINES, KM_MARKER, KM_MODULATION,KM_COR_AM,KM_COR_WFM, KM_COR_NFM, KM_IF2, + KM_R, KM_NONE // always at enum end }; @@ -445,8 +446,10 @@ static const struct { {keypads_plusmin , "COR\nWFM"}, // KM_COR_WFM {keypads_plusmin , "COR\nNFM"}, // KM_COR_NFM {keypads_freq , "IF2"}, // KM_IF2 + {keypads_positive , "R"}, // KM_R }; + // ===[MENU CALLBACKS]========================================================= static const menuitem_t menu_lowoutputmode[]; static const menuitem_t menu_highoutputmode[]; @@ -1645,6 +1648,7 @@ static const menuitem_t menu_settings3[] = { MT_KEYPAD, KM_COR_WFM, "COR\nWFM", "Enter WFM modulation correction"}, { MT_KEYPAD, KM_COR_NFM, "COR\nNFM", "Enter NFM modulation correction"}, { MT_KEYPAD | MT_LOW, KM_IF2, "IF2 FREQ", "Set to zero for no IF2"}, + { MT_KEYPAD, KM_R, "R", "Set R"}, #ifdef __HAM_BAND__ { MT_ADV_CALLBACK, 0, "HAM\nBANDS", menu_settings_ham_bands}, @@ -1978,6 +1982,10 @@ static void fetch_numeric_target(void) uistat.value = config.frequency_IF2; plot_printf(uistat.text, sizeof uistat.text, "%3.3fMHz", uistat.value / 1000000.0); break; + case KM_R: + uistat.value = SI4463_R; + plot_printf(uistat.text, sizeof uistat.text, "%3d", uistat.value); + break; case KM_SAMPLETIME: uistat.value = setting.step_delay; plot_printf(uistat.text, sizeof uistat.text, "%3dus", ((int32_t)uistat.value)); @@ -2099,6 +2107,10 @@ set_numeric_value(void) break; case KM_IF2: set_IF2(uistat.value); +// config_save(); + break; + case KM_R: + set_R(uistat.value); // config_save(); break; case KM_SAMPLETIME: