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@ -313,7 +313,7 @@ si5351_set_frequency_with_offset(int freq, int offset, uint8_t drive_strength)
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band = 2;
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}
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#if 0
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#if 1
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if (current_band != band)
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si5351_disable_output();
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#endif
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@ -321,8 +321,12 @@ si5351_set_frequency_with_offset(int freq, int offset, uint8_t drive_strength)
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switch (band) {
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case 0:
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// fractional divider mode. only PLL A is used.
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//if (current_band != 0)
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if (current_band != 0)
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si5351_setupPLL(SI5351_PLL_A, 32, 0, 1);
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// Set PLL twice on changing from band 2
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if (current_band == 2)
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si5351_setupPLL(SI5351_PLL_A, 32, 0, 1);
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si5351_set_frequency_fixedpll(0, SI5351_PLL_A, PLLFREQ, freq + offset,
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SI5351_CLK_DRIVE_STRENGTH_2MA);
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si5351_set_frequency_fixedpll(1, SI5351_PLL_A, PLLFREQ, freq, drive_strength);
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@ -350,9 +354,9 @@ si5351_set_frequency_with_offset(int freq, int offset, uint8_t drive_strength)
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break;
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}
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si5351_reset_pll();
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if (current_band != band) {
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#if 0
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si5351_reset_pll();
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#if 1
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si5351_enable_output();
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#endif
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delay += 0;
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