From a69c265f28b037ca000fae61eaf287974a6651f7 Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Thu, 28 Jul 2022 13:05:34 +0200 Subject: [PATCH] Experimental scanning --- main.c | 40 ++++++++++++++++------------------------ sa_core.c | 32 +++++++++++++++++--------------- si4468.c | 4 ++-- 3 files changed, 35 insertions(+), 41 deletions(-) diff --git a/main.c b/main.c index a4742f5..5dc2267 100644 --- a/main.c +++ b/main.c @@ -2447,22 +2447,24 @@ static const GPTConfig gpt4cfg = { 0, 0 }; -void my_microsecond_delay(int t) -{ #ifdef TINYSA4 - if (t>1) gptPolledDelay(&GPTD4, t<<3); // t us delay +#define DELAY_TIMER GPTD4 #else - if (t>1) gptPolledDelay(&GPTD14, t<<3); // t us delay +#define DELAY_TIMER GPTD14 #endif + +void my_microsecond_delay(int t) +{ + while (t >= 0x1000) { // 16 bit timer + gptPolledDelay(&DELAY_TIMER, 0x1000<<3); // t us delay + t -= 0x1000; + } + if (t>1) gptPolledDelay(&DELAY_TIMER, t<<3); // t us delay } void my_veryfast_delay(int t) // In 8MHz ticks { -#ifdef TINYSA4 - if (t>0) gptPolledDelay(&GPTD4, t); -#else - if (t>0) gptPolledDelay(&GPTD14, t); -#endif + if (t>0) gptPolledDelay(&DELAY_TIMER, t); } /* Main thread stack size defined in makefile USE_PROCESS_STACKSIZE = 0x200 @@ -2485,15 +2487,10 @@ int main(void) { halInit(); /* - * Initiate 1 micro second timer + * Initiate 1/8 micro second timer */ - #ifdef TINYSA4 - gptStart(&GPTD4, &gpt4cfg); - gptPolledDelay(&GPTD4, 80); // 10 us delay - #else - gptStart(&GPTD14, &gpt4cfg); - gptPolledDelay(&GPTD14, 80); // 10 us delay - #endif + gptStart(&DELAY_TIMER, &gpt4cfg); + gptPolledDelay(&DELAY_TIMER, 80); // 10 us delay PULSE chSysInit(); @@ -2595,13 +2592,8 @@ int main(void) /* * Initiate 1 micro second timer */ -#ifdef TINYSA4 - gptStart(&GPTD4, &gpt4cfg); - gptPolledDelay(&GPTD4, 80); // 10 us delay -#else - gptStart(&GPTD14, &gpt4cfg); - gptPolledDelay(&GPTD14, 80); // 10 us delay -#endif + gptStart(&DELAY_TIMER, &gpt4cfg); + gptPolledDelay(&DELAY_TIMER, 80); // 10 us delay /* restore config */ #ifdef TINYSA3 diff --git a/sa_core.c b/sa_core.c index d241e47..ed69206 100644 --- a/sa_core.c +++ b/sa_core.c @@ -236,8 +236,10 @@ void set_output_path(freq_t f, float level) if (signal_path == PATH_HIGH) { return; //TODO setup high path } + +#define ATTENUATION_RESERVE 3.0 // Always 3dB in attenuator // if (signal_path != PATH_LEAKAGE) - level += 3.0; // Always 3dB in attenuator + level += ATTENUATION_RESERVE; float switch_atten = SWITCH_ATTENUATION; if (signal_path == PATH_LEAKAGE) @@ -275,17 +277,17 @@ void set_output_path(freq_t f, float level) d++; blw = BELOW_MAX_DRIVE(d); } - int ar = 28; + int ar = 31 - ATTENUATION_RESERVE; if (setting.modulation == MO_AM) // reserve attenuator range for AM modulation ar = 4; - while (a + ar < blw && d > LOWEST_LEVEL) { // reduce till it fits attenuator ((ar+3) - 3) + while (a + ar < blw && d > LOWEST_LEVEL) { // reduce till it fits attenuator ((ar+ATTENUATION_RESERVE) .. ATTENUATION_RESERVE) d--; blw = BELOW_MAX_DRIVE(d); } a -= blw; set_output_drive(d); // if (signal_path != PATH_LEAKAGE) - a -= 3.0; // Always at least 3dB attenuation + a -= ATTENUATION_RESERVE; if (a > 0) { a = 0; if (!level_error) { level_error = true; redraw_request |= REDRAW_CAL_STATUS; draw_all(true);} @@ -2015,15 +2017,15 @@ static const struct { float log_aver_correction; } step_delay_table[]={ // RBWx10 step_delay offset_delay spur_gate (value divided by 1000) - { 8500, 150, 50, 400, -90, 0.7}, - { 6000, 150, 50, 300, -95, 0.8}, - { 3000, 150, 50, 200, -95, 1.3}, - { 1000, 300, 100, 100, -105, 0.3}, - { 300, 400, 120, 100, -110, 0.7}, - { 100, 900, 120, 100, -115, 0.5}, - { 30, 1600, 300, 100, -120, 0.7}, - { 10, 4000, 600, 100, -122, 1.1}, - { 3, 18700, 12000, 100, -125, 1.0} + { 8500, 150, 150, 400, -90, 0.7}, + { 6000, 150, 150, 300, -95, 0.8}, + { 3000, 150, 150, 200, -95, 1.3}, + { 1000, 300, 300, 100, -105, 0.3}, + { 300, 400, 400, 100, -110, 0.7}, + { 100, 900, 900, 100, -115, 0.5}, + { 30, 1600, 1600, 100, -120, 0.7}, + { 10, 4000, 4000, 100, -122, 1.1}, + { 3, 18700, 18700, 100, -125, 1.0} }; #endif @@ -2634,7 +2636,7 @@ void update_rbw(void) // calculate the actual_rbw and the vbwSteps (# if (temp_actual_rbw_x10 == 0) { // if auto rbw if (setting.step_delay_mode==SD_FAST) { // if in fast scanning - temp_actual_rbw_x10 = frequency_step_x10; + temp_actual_rbw_x10 = 2*frequency_step_x10; // } else if (setting.step_delay_mode==SD_PRECISE) { // temp_actual_rbw_x10 = 4*frequency_step_x10; } else { @@ -4191,7 +4193,7 @@ again: // Spur redu // if (signal_path == PATH_LOW || signal_path == PATH_ULTRA) ADF4351_drive(actual_drive); // Max drive } - set_freq(ADF4351_LO, target_f); + set_freq(ADF4351_LO, (target_f/10000)*10000); // <----------- TESTING !!!!!!!!!!!!!! #if 1 // Compensate frequency ADF4350 error with SI4468 if (actual_rbw_x10 < 10000 || setting.frequency_step < 100000) { //TODO always compensate for the moment as this eliminates artifacts at larger RBW int32_t error_f = 0; diff --git a/si4468.c b/si4468.c index 918e823..81ca100 100644 --- a/si4468.c +++ b/si4468.c @@ -313,7 +313,7 @@ void ADF4351_Setup(void) si5351_available = si5351_init(); if (si5351_available) si5351_set_frequency(0, 30000000, 0); - //si5351_available = false; // Don't use shifting + si5351_available = false; // Don't use shifting #endif // SPI3_CLK_HIGH; @@ -364,7 +364,7 @@ void ADF4351_WriteRegister32(int channel, const uint32_t value) void ADF4351_Set(int channel) { -#if 0 +#if 1 for (int i = 5; i >= 0; i--) { if (registers[i] != old_registers[i]) goto update;