From a02f94d3c84c1a1d970d6dcba2e0f87e9b4d68ed Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Thu, 11 Jun 2020 17:35:59 +0200 Subject: [PATCH] Power cycle SI4432 on switch setting --- sa_core.c | 8 ++++++-- si4432.c | 9 ++++++--- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/sa_core.c b/sa_core.c index defcdf2..65b4b03 100644 --- a/sa_core.c +++ b/sa_core.c @@ -731,15 +731,17 @@ void set_mode(int m) void apply_settings(void) { + set_switches(setting.mode); if (setting.mode == M_HIGH) PE4302_Write_Byte(40); // Ensure defined input impedance of low port when using high input mode (power calibration) else PE4302_Write_Byte(setting.attenuate * 2); +#if 0 if (setting.modulation == MO_NONE) { SI4432_Write_Byte(0x73, 0); // Back to nominal offset SI4432_Write_Byte(0x74, 0); } - set_switches(setting.mode); +#endif SI4432_SetReference(setting.refer); update_rbw(); if (setting.frequency_step == 0.0) { @@ -802,9 +804,10 @@ int temppeakIndex; void setupSA(void) { SI4432_Init(); - SI4432_Sel = 1; + SI4432_Sel = 0; SI4432_Receive(); + SI4432_Sel = 1; SI4432_Transmit(0); PE4302_init(); PE4302_Write_Byte(0); @@ -855,6 +858,7 @@ void set_AGC_LNA(void) { void set_switches(int m) { + SI4432_Init(); switch(m) { case M_LOW: // Mixed into 0 #ifdef __ULTRA__ diff --git a/si4432.c b/si4432.c index e376cf0..a292e87 100644 --- a/si4432.c +++ b/si4432.c @@ -26,7 +26,7 @@ #define CS_SI1_HIGH palSetPad(GPIOC, GPIO_LO_SEL) #define CS_PE_HIGH palSetPad(GPIOC, GPIO_PE_SEL) -#define RF_POWER_HIGH palSetPad(GPIOC, GPIO_RF_PWR) +#define RF_POWER_HIGH palSetPad(GPIOB, GPIO_RF_PWR) #define CS_SI0_LOW palClearPad(GPIOC, GPIO_RX_SEL) @@ -433,8 +433,11 @@ void SI4432_Sub_Init(void) void SI4432_Init() { - RF_POWER_HIGH; // Power the RF part - chThdSleepMilliseconds(25); + palClearPad(GPIOB, GPIO_RF_PWR); + chThdSleepMilliseconds(100); + palSetPad(GPIOB, GPIO_RF_PWR); + chThdSleepMilliseconds(100); + //DebugLine("IO set"); SI4432_Sel = 0;