From 4f13e0472c9608b470634cc7388723396e24af5d Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 11:34:49 +0300 Subject: [PATCH 01/11] Move mcuconf.h files to board/CPU folder --- .settings/language.settings.xml | 73 ++- NANOVNA_STM32_F072/mcuconf.h | 478 ++++++++++++++++++ .../mcuconf.h | 0 mcuconf.h | 461 +---------------- 4 files changed, 530 insertions(+), 482 deletions(-) create mode 100644 NANOVNA_STM32_F072/mcuconf.h rename mcuconf_F303.h => NANOVNA_STM32_F303/mcuconf.h (100%) diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml index c2188e1..ac357e9 100644 --- a/.settings/language.settings.xml +++ b/.settings/language.settings.xml @@ -1,27 +1,52 @@ - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/NANOVNA_STM32_F072/mcuconf.h b/NANOVNA_STM32_F072/mcuconf.h new file mode 100644 index 0000000..1d4b073 --- /dev/null +++ b/NANOVNA_STM32_F072/mcuconf.h @@ -0,0 +1,478 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +#ifdef TINYSA_F303 + +/* + * STM32F3xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F3xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#if 0 // 72MHz +#define STM32_HSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#else +#define STM32_HSI_ENABLED TRUE // 48MHz +#define STM32_HSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 12 // prediv HSI always 2 +#define STM32_USBPRE STM32_USBPRE_DIV1 +#endif +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +// Set SPI1 more faster use PPRE2 max speed +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_PLLDIV2 +#define STM32_ADC12PRES STM32_ADC12PRES_DIV2 +//#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +//#define STM32_USART2SW STM32_USART2SW_PCLK +//#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +//#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_USB_CLOCK_REQUIRED TRUE + +/* + * RTC driver system settings for stm32f303 + */ + +#ifndef VNA_USE_LSE +// Use 40kHz LSI +#define STM32_LSE_ENABLED FALSE +#define STM32_LSI_ENABLED TRUE +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTC_PRESA_VALUE 40 +#define STM32_RTC_PRESS_VALUE 1000 +#else +// Use 32768Hz LSE +#define STM32_LSE_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_LSEDRV (3 << 3) +#endif + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +//#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +//#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +//#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 2 +//#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 +//#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +//#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_ADCCK +//#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV2 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +//#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 TRUE +#define STM32_DAC_USE_DAC1_CH2 TRUE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3 + +#define STM32_DISABLE_EXTI2122_HANDLER TRUE + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 +#define STM32_GPT_TIM4_IRQ_PRIORITY 2 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_IRQ_PRIORITY 3 +#define STM32_I2C_I2C2_IRQ_PRIORITY 3 +#define STM32_I2C_USE_DMA TRUE +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI1 FALSE +#define STM32_I2S_USE_SPI2 TRUE +#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_SLAVE | \ + STM32_I2S_MODE_RX ) +#define STM32_I2S_SPI1_IRQ_PRIORITY 2 +#define STM32_I2S_SPI2_IRQ_PRIORITY 2 +#define STM32_I2S_SPI1_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 2 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#else + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F0xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_HSI14_ENABLED TRUE +#define STM32_HSI48_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2 +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 12 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE STM32_PPRE_DIV1 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCOSEL STM32_MCOSEL_PLLDIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_USBSW STM32_USBSW_HSI48 +#define STM32_CECSW STM32_CECSW_HSI +//#define STM32_I2C1SW STM32_I2C1SW_HSI +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 TRUE +#define STM32_DAC_USE_DAC1_CH2 TRUE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3 + +#define STM32_DISABLE_EXTI2122_HANDLER TRUE + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM14 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 +#define STM32_GPT_TIM14_IRQ_PRIORITY 2 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_IRQ_PRIORITY 3 +#define STM32_I2C_I2C2_IRQ_PRIORITY 3 + +// I2C1 rx operation use DMA3, some as SPI1 DMA Tx used by LCD +#define STM32_I2C_USE_DMA FALSE +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI1 FALSE +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_SLAVE | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI1_IRQ_PRIORITY 2 +#define STM32_I2S_SPI2_IRQ_PRIORITY 2 +#define STM32_I2S_SPI1_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 2 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif + +#endif /* MCUCONF_H */ diff --git a/mcuconf_F303.h b/NANOVNA_STM32_F303/mcuconf.h similarity index 100% rename from mcuconf_F303.h rename to NANOVNA_STM32_F303/mcuconf.h diff --git a/mcuconf.h b/mcuconf.h index 1d4b073..b343ec3 100644 --- a/mcuconf.h +++ b/mcuconf.h @@ -14,465 +14,10 @@ limitations under the License. */ -#ifndef MCUCONF_H -#define MCUCONF_H - #ifdef TINYSA_F303 - -/* - * STM32F3xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F3xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#if 0 // 72MHz -#define STM32_HSI_ENABLED FALSE -#define STM32_HSE_ENABLED TRUE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#else -#define STM32_HSI_ENABLED TRUE // 48MHz -#define STM32_HSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 12 // prediv HSI always 2 -#define STM32_USBPRE STM32_USBPRE_DIV1 -#endif -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -// Set SPI1 more faster use PPRE2 max speed -#define STM32_PPRE2 STM32_PPRE2_DIV1 -#define STM32_MCOSEL STM32_MCOSEL_PLLDIV2 -#define STM32_ADC12PRES STM32_ADC12PRES_DIV2 -//#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -//#define STM32_USART2SW STM32_USART2SW_PCLK -//#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -//#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_USB_CLOCK_REQUIRED TRUE - -/* - * RTC driver system settings for stm32f303 - */ - -#ifndef VNA_USE_LSE -// Use 40kHz LSI -#define STM32_LSE_ENABLED FALSE -#define STM32_LSI_ENABLED TRUE -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_RTC_PRESA_VALUE 40 -#define STM32_RTC_PRESS_VALUE 1000 -#else -// Use 32768Hz LSE -#define STM32_LSE_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE -#define STM32_RTCSEL STM32_RTCSEL_LSE -#define STM32_RTC_PRESA_VALUE 32 -#define STM32_RTC_PRESS_VALUE 1024 -#define STM32_LSEDRV (3 << 3) +#include "NANOVNA_STM32_F303/mcuconf.h" #endif -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 FALSE -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) -#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -//#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) -//#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_ADC_ADC12_DMA_PRIORITY 2 -//#define STM32_ADC_ADC34_DMA_PRIORITY 2 -#define STM32_ADC_ADC12_IRQ_PRIORITY 2 -//#define STM32_ADC_ADC34_IRQ_PRIORITY 5 -#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 -//#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 -//#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_ADCCK -//#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV2 -#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -//#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -#define STM32_ADC_DUAL_MODE FALSE - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * DAC driver system settings. - */ -#define STM32_DAC_DUAL_MODE FALSE -#define STM32_DAC_USE_DAC1_CH1 TRUE -#define STM32_DAC_USE_DAC1_CH2 TRUE -#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3 - -#define STM32_DISABLE_EXTI2122_HANDLER TRUE - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_TIM1_IRQ_PRIORITY 2 -#define STM32_GPT_TIM2_IRQ_PRIORITY 2 -#define STM32_GPT_TIM3_IRQ_PRIORITY 2 -#define STM32_GPT_TIM4_IRQ_PRIORITY 2 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 TRUE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_BUSY_TIMEOUT 50 -#define STM32_I2C_I2C1_IRQ_PRIORITY 3 -#define STM32_I2C_I2C2_IRQ_PRIORITY 3 -#define STM32_I2C_USE_DMA TRUE -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") - -/* - * I2S driver system settings. - */ -#define STM32_I2S_USE_SPI1 FALSE -#define STM32_I2S_USE_SPI2 TRUE -#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ - STM32_I2S_MODE_RX) -#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_SLAVE | \ - STM32_I2S_MODE_RX ) -#define STM32_I2S_SPI1_IRQ_PRIORITY 2 -#define STM32_I2S_SPI2_IRQ_PRIORITY 2 -#define STM32_I2S_SPI1_DMA_PRIORITY 1 -#define STM32_I2S_SPI2_DMA_PRIORITY 1 -#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 3 -#define STM32_ICU_TIM2_IRQ_PRIORITY 3 -#define STM32_ICU_TIM3_IRQ_PRIORITY 3 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 3 -#define STM32_PWM_TIM2_IRQ_PRIORITY 3 -#define STM32_PWM_TIM3_IRQ_PRIORITY 3 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USART1_PRIORITY 3 -#define STM32_SERIAL_USART2_PRIORITY 3 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 2 -#define STM32_SPI_SPI2_IRQ_PRIORITY 2 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") - -/* - * ST driver system settings. - */ -#define STM32_ST_IRQ_PRIORITY 2 -#define STM32_ST_USE_TIMER 2 - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 3 -#define STM32_UART_USART2_IRQ_PRIORITY 3 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 - -/* - * WDG driver system settings. - */ -#define STM32_WDG_USE_IWDG FALSE - -#else - -/* - * STM32F0xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 3...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F0xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_HSI14_ENABLED TRUE -#define STM32_HSI48_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED FALSE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2 -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 12 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE STM32_PPRE_DIV1 -#define STM32_ADCSW STM32_ADCSW_HSI14 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCOSEL STM32_MCOSEL_PLLDIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_ADCSW STM32_ADCSW_HSI14 -#define STM32_USBSW STM32_USBSW_HSI48 -#define STM32_CECSW STM32_CECSW_HSI -//#define STM32_I2C1SW STM32_I2C1SW_HSI -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_RTCSEL STM32_RTCSEL_LSI - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 2 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) - -/* - * DAC driver system settings. - */ -#define STM32_DAC_DUAL_MODE FALSE -#define STM32_DAC_USE_DAC1_CH1 TRUE -#define STM32_DAC_USE_DAC1_CH2 TRUE -#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 3 - -#define STM32_DISABLE_EXTI2122_HANDLER TRUE - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM14 TRUE -#define STM32_GPT_TIM1_IRQ_PRIORITY 2 -#define STM32_GPT_TIM2_IRQ_PRIORITY 2 -#define STM32_GPT_TIM3_IRQ_PRIORITY 2 -#define STM32_GPT_TIM14_IRQ_PRIORITY 2 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_BUSY_TIMEOUT 50 -#define STM32_I2C_I2C1_IRQ_PRIORITY 3 -#define STM32_I2C_I2C2_IRQ_PRIORITY 3 - -// I2C1 rx operation use DMA3, some as SPI1 DMA Tx used by LCD -#define STM32_I2C_USE_DMA FALSE -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") - -/* - * I2S driver system settings. - */ -#define STM32_I2S_USE_SPI1 FALSE -#define STM32_I2S_USE_SPI2 FALSE -#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ - STM32_I2S_MODE_RX) -#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_SLAVE | \ - STM32_I2S_MODE_RX) -#define STM32_I2S_SPI1_IRQ_PRIORITY 2 -#define STM32_I2S_SPI2_IRQ_PRIORITY 2 -#define STM32_I2S_SPI1_DMA_PRIORITY 1 -#define STM32_I2S_SPI2_DMA_PRIORITY 1 -#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 3 -#define STM32_ICU_TIM2_IRQ_PRIORITY 3 -#define STM32_ICU_TIM3_IRQ_PRIORITY 3 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 3 -#define STM32_PWM_TIM2_IRQ_PRIORITY 3 -#define STM32_PWM_TIM3_IRQ_PRIORITY 3 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USART1_PRIORITY 3 -#define STM32_SERIAL_USART2_PRIORITY 3 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 2 -#define STM32_SPI_SPI2_IRQ_PRIORITY 2 -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") - -/* - * ST driver system settings. - */ -#define STM32_ST_IRQ_PRIORITY 2 -#define STM32_ST_USE_TIMER 2 - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 3 -#define STM32_UART_USART2_IRQ_PRIORITY 3 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 - -/* - * WDG driver system settings. - */ -#define STM32_WDG_USE_IWDG FALSE - +#ifdef TINYSA_F072 +#include "NANOVNA_STM32_F072/mcuconf.h" #endif - -#endif /* MCUCONF_H */ From 71697475b75ac44db058ba969754e7cc33357c45 Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 11:51:32 +0300 Subject: [PATCH 02/11] Update RTC module --- main.c | 36 ++++++++---- rtc.c | 177 +++++++++++++++++++++++++++++++++------------------------ ui.c | 24 +++++++- 3 files changed, 151 insertions(+), 86 deletions(-) diff --git a/main.c b/main.c index 95fe5b6..2090565 100644 --- a/main.c +++ b/main.c @@ -75,8 +75,6 @@ static volatile vna_shellcmd_t shell_function = 0; //#define ENABLED_DUMP // Allow get threads debug info #define ENABLE_THREADS_COMMAND -// RTC time not used -//#define ENABLE_TIME_COMMAND // Enable vbat_offset command, allow change battery voltage correction in config #define ENABLE_VBAT_OFFSET_COMMAND // Info about NanoVNA, need fore soft @@ -620,17 +618,35 @@ VNA_SHELL_FUNCTION(cmd_power) } #endif -#ifdef ENABLE_TIME_COMMAND -#if HAL_USE_RTC == FALSE -#error "Error cmd_time require define HAL_USE_RTC = TRUE in halconf.h" -#endif +#ifdef __USE_RTC__ VNA_SHELL_FUNCTION(cmd_time) { - RTCDateTime timespec; (void)argc; (void)argv; - rtcGetTime(&RTCD1, ×pec); - shell_printf("%d/%d/%d %d\r\n", timespec.year+1980, timespec.month, timespec.day, timespec.millisecond); + uint32_t dt_buf[2]; + dt_buf[0] = rtc_get_tr_bcd(); // TR should be read first for sync + dt_buf[1] = rtc_get_dr_bcd(); // DR should be read second + static const uint8_t idx_to_time[] = {6,5,4,2, 1, 0}; + static const char time_cmd[] = "y|m|d|h|min|sec"; + // 0 1 2 4 5 6 + // time[] ={sec, min, hr, 0, day, month, year, 0} + uint8_t *time = (uint8_t*)dt_buf; + if (argc == 3 && get_str_index(argv[0], "b") == 0){ + rtc_set_time(my_atoui(argv[1]), my_atoui(argv[2])); + return; + } + if (argc!=2) goto usage; + int idx = get_str_index(argv[0], time_cmd); + uint32_t val = my_atoui(argv[1]); + if (idx < 0 || val > 99) + goto usage; + // Write byte value in struct + time[idx_to_time[idx]] = ((val/10)<<4)|(val%10); // value in bcd format + rtc_set_time(dt_buf[1], dt_buf[0]); + return; +usage: + shell_printf("20%02X/%02X/%02X %02X:%02X:%02X\r\n"\ + "usage: time {[%s] 0-99} or {b 0xYYMMDD 0xHHMMSS}\r\n", time[6], time[5], time[4], time[2], time[1], time[0], time_cmd); } #endif @@ -2428,7 +2444,7 @@ static const VNAShellCommand commands[] = #ifdef __VNA__ {"offset" , cmd_offset , 0}, #endif -#ifdef ENABLE_TIME_COMMAND +#ifdef __USE_RTC__ {"time" , cmd_time , 0}, #endif {"dac" , cmd_dac , 0}, diff --git a/rtc.c b/rtc.c index 9bac4d9..dee4384 100644 --- a/rtc.c +++ b/rtc.c @@ -56,90 +56,119 @@ uint32_t rtc_get_FAT(void) { return fattime; } -void rtc_set_time(uint32_t dr, uint32_t tr) { - // Beginning of configuration procedure. - RTC->ISR |= RTC_ISR_INIT; - while ((RTC->ISR & RTC_ISR_INITF) == 0) - ; - // Writing the registers. - RTC->TR = tr; - RTC->DR = dr; +// Finish of configuration procedure. +static void rtc_exit_init(void) { RTC->ISR &= ~RTC_ISR_INIT; } -#define RTC_PRER(a, s) ((((a) - 1) << 16) | ((s) - 1)) +// Beginning of configuration procedure. +static bool rtc_enter_init(void){ + RTC->ISR |= RTC_ISR_INIT; + uint32_t count = 4*65536; + while (--count) + if (RTC->ISR & RTC_ISR_INITF) + return true; + return false; +} + +void rtc_set_time(uint32_t dr, uint32_t tr) { + if (rtc_enter_init()){ + RTC->TR = tr; // Write TR register + RTC->DR = dr; // Write TD register + } + rtc_exit_init(); +} + +#ifdef VNA_AUTO_SELECT_RTC_SOURCE + +// Enable LSE bypass if need +#if defined(STM32_LSE_BYPASS) +#define STM32_LSE_BYPASS RCC_BDCR_LSEBYP +#else +#define STM32_LSE_BYPASS 0 +#endif + +// Startup LSE or if not work, LSI generator +static void rtc_start_source(void){ + // LSE already work (enabled and ready) + if ((RCC->BDCR & (RCC_BDCR_LSEON|RCC_BDCR_LSERDY|STM32_LSE_BYPASS)) == (RCC_BDCR_LSEON|RCC_BDCR_LSERDY|STM32_LSE_BYPASS)) + return; + + // If LSE not enabled, try startup + RCC->BDCR |= STM32_LSEDRV | STM32_LSE_BYPASS | RCC_BDCR_LSEON; + // Waits until LSE is stable (need ~150ms for startup). + chThdSleepMilliseconds(200); + if (RCC->BDCR & RCC_BDCR_LSERDY) return; + + // Startup LSI if not allow start LSE + RCC->CSR |= RCC_CSR_LSION; + while ((RCC->CSR & RCC_CSR_LSIRDY) == 0); +} + +static void resetBCDR(uint32_t rtc_drv){ + // Backup domain reset, for change source. + RCC->BDCR = RCC_BDCR_BDRST; + RCC->BDCR = 0; + // Startup again source generator + rtc_start_source(); + // Select new clock source. And enable + RCC->BDCR|= rtc_drv; +} -// Initiate RTC clock, LSE or LSI generators initiate by ChibiOS !!! +void auto_backup_domain_init(void){ + // Init Backup domain, RTC clock source + uint32_t rtc_drv; + // Backup domain access enabled and left open. + PWR->CR |= PWR_CR_DBP; + // Start/check source + rtc_start_source(); + // Check LSE ready, if ok, select as source + rtc_drv = RCC->BDCR & RCC_BDCR_LSERDY ? STM32_RTCSEL_LSE|RCC_BDCR_RTCEN : // Select LSE as source + STM32_RTCSEL_LSI|RCC_BDCR_RTCEN; // Select LSI as source + // If the backup domain hasn't been initialized yet or work on different source, then proceed with initialization + if ((RCC->BDCR & (STM32_RTCSEL_MASK|RCC_BDCR_RTCEN)) != rtc_drv) + resetBCDR(rtc_drv); +/* + // Check RTC clock, and reset backup domain to LSI if clock not start + if (rtc_enter_init()) + rtc_exit_init(); + else + resetBCDR(STM32_RTCSEL_LSI|RCC_BDCR_RTCEN); +*/ +} +#endif + +// Initiate RTC clock void rtc_init(void){ +#ifdef VNA_AUTO_SELECT_RTC_SOURCE + // Auto start LSE or LSI source for RTC + auto_backup_domain_init(); +#else + // ChibiOS init BDCR LSE or LSI source by self from user defined in mcuconf.h source + // For add auto select RTC source need rewrite it + // see hal_lld_backup_domain_init() in hal_lld.c for every CPU + // Default RTC clock is LSE, but it possible not launch if no quartz installed +#endif + uint32_t src = RCC->BDCR & STM32_RTCSEL_MASK; + if (src == STM32_RTCSEL_NOCLOCK) return; + // If calendar has not been initialized yet or different PRER settings then proceed with the initial setup. // Disable write protection. RTC->WPR = 0xCA; RTC->WPR = 0x53; + uint32_t rtc_prer = (src == STM32_RTCSEL_LSE) ? STM32_RTC_LSE_PRER : + STM32_RTC_LSI_PRER; // If calendar has not been initialized yet then proceed with the initial setup. - if (!(RTC->ISR & RTC_ISR_INITS)) { - // Beginning of configuration procedure. - RTC->ISR |= RTC_ISR_INIT; - while ((RTC->ISR & RTC_ISR_INITF) == 0) - ; - RTC->CR = 0; - RTC->ISR = RTC_ISR_INIT; // Clearing all but RTC_ISR_INIT. - RTC->PRER = RTC_PRER(STM32_RTC_PRESA_VALUE, STM32_RTC_PRESS_VALUE); - RTC->PRER = RTC_PRER(STM32_RTC_PRESA_VALUE, STM32_RTC_PRESS_VALUE); - RTC->ISR &= ~RTC_ISR_INIT; + if ((RTC->ISR & RTC_ISR_INITS) == 0 || RTC->PRER != rtc_prer) { + if (rtc_enter_init()){ + RTC->CR = 0; + RTC->ISR = RTC_ISR_INIT; // Clearing all but RTC_ISR_INIT. + RTC->PRER = rtc_prer; // Prescaler value loaded in registers 2 times + RTC->PRER = rtc_prer; + } + // Finalizing of configuration procedure. + rtc_exit_init(); } else RTC->ISR &= ~RTC_ISR_RSF; -#if 0 - // ChibiOS init BDCR by self!! - // For add auto select RTC source need rewrite it - // see hal_lld_backup_domain_init() in hal_lld.c for every CPU - // Default RTC clock is LSE, but it possible not launch if no quartz installed - uint32_t rtc_drv = STM32_RTCSEL_LSI; - uint32_t rtc_prer = RTC_PRER(40, 1000); - - // If LSE off try launch it - if ((RCC->BDCR & RCC_BDCR_LSEON) == 0){ - // Try start LSE - RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON; - uint32_t count = 65535; - do{ - if (RCC->BDCR & RCC_BDCR_LSERDY) break; - }while (--count);// Waits until LSE is stable. or count == 0 - } - // Check, if LSE ready, then prepare it data - if (RCC->BDCR & RCC_BDCR_LSERDY){ - rtc_drv = STM32_RTCSEL_LSE; - rtc_prer = RTC_PRER(32, 1024); - } else{ - // Try start LSI - RCC->CSR |= RCC_CSR_LSION; - while ((RCC->CSR & RCC_CSR_LSIRDY) == 0) - ; - } - - PWR->CR |= PWR_CR_DBP; - // If the backup domain hasn't been initialized yet then proceed with initialization or source different - if ((RCC->BDCR & RCC_BDCR_RTCEN) == 0 || (RCC->BDCR & STM32_RTCSEL_MASK)!=rtc_drv) { - // Backup domain reset. - RCC->BDCR = RCC_BDCR_BDRST; - RCC->BDCR = 0; - // Selects clock source. - RCC->BDCR |= rtc_drv; - // Disable write protection. - RTC->WPR = 0xCA; - RTC->WPR = 0x53; - // Beginning of configuration procedure. - RTC->ISR |= RTC_ISR_INIT; - while ((RTC->ISR & RTC_ISR_INITF) == 0) - ; - // Prescaler value loaded in registers. - RTC->CR = 0; - RTC->ISR = RTC_ISR_INIT; // Clearing all but RTC_ISR_INIT. - RTC->PRER = rtc_prer; - RTC->PRER = rtc_prer; - // Finalizing of configuration procedure. - RTC->ISR &= ~RTC_ISR_INIT; - RCC->BDCR |= RCC_BDCR_RTCEN; // RTC clock enabled. - } -#endif } -#endif +#endif // __USE_RTC__ diff --git a/ui.c b/ui.c index 2d109f8..43b7c00 100644 --- a/ui.c +++ b/ui.c @@ -474,8 +474,8 @@ show_version(void) do {shift>>=1; y+=5;} while (shift&1); ili9341_drawstring(info_about[i++], x, y+=5); } + char buf[96]; #ifdef TINYSA4 - static char buf[96]; extern const char *states[]; #define ENABLE_THREADS_COMMAND @@ -501,14 +501,34 @@ extern const char *states[]; } while (tp != NULL); #endif - #endif // TINYSA4 + uint16_t cnt = 0; while (true) { if (touch_check() == EVT_TOUCH_PRESSED) break; if (btn_check() & EVT_BUTTON_SINGLE_CLICK) break; + chThdSleepMilliseconds(40); + if ((cnt++)&0x07) continue; // Not update time so fast +#ifdef __USE_RTC__ + uint32_t tr = rtc_get_tr_bin(); // TR read first + uint32_t dr = rtc_get_dr_bin(); // DR read second + plot_printf(buf, sizeof(buf), "Time: 20%02d/%02d/%02d %02d:%02d:%02d" " (LS%c)", + RTC_DR_YEAR(dr), + RTC_DR_MONTH(dr), + RTC_DR_DAY(dr), + RTC_TR_HOUR(dr), + RTC_TR_MIN(dr), + RTC_TR_SEC(dr), + (RCC->BDCR & STM32_RTCSEL_MASK) == STM32_RTCSEL_LSE ? 'E' : 'I'); + ili9341_drawstring(buffer, x, y); +#endif +#if 1 + uint32_t vbat=adc_vbat_read(); + plot_printf(buf, sizeof(buf), "Batt: %d.%03dV", vbat/1000, vbat%1000); + ili9341_drawstring(buf, x, y + FONT_STR_HEIGHT + 2); +#endif } touch_start_watchdog(); From f972ba35a0da4dac068c1a78ef60a2ac2011e4be Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 11:58:48 +0300 Subject: [PATCH 03/11] Fix touch calibrate string position on bigger display --- ui.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ui.c b/ui.c index 43b7c00..f7f7607 100644 --- a/ui.c +++ b/ui.c @@ -388,7 +388,7 @@ touch_cal_exec(void) ili9341_line(LCD_WIDTH-1, LCD_HEIGHT-1, LCD_WIDTH-1, LCD_HEIGHT-32); ili9341_line(LCD_WIDTH-1, LCD_HEIGHT-1, LCD_WIDTH-32, LCD_HEIGHT-1); ili9341_line(LCD_WIDTH-1, LCD_HEIGHT-1, LCD_WIDTH-32, LCD_HEIGHT-32); - ili9341_drawstring("TOUCH LOWER RIGHT", 210, 200); + ili9341_drawstring("TOUCH LOWER RIGHT", LCD_WIDTH-17*(FONT_WIDTH)-30, LCD_HEIGHT-FONT_GET_HEIGHT-35); touch_wait_released(); // touch_wait_release(); From 0bdf34fc30416ade23efea243a22d67c2f9bebea Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 18:22:33 +0300 Subject: [PATCH 04/11] Replace force_set_markmap to redraw_request |= REDRAW_AREA for less screen update --- main.c | 9 +------- nanovna.h | 1 - plot.c | 61 ++++++++++++++++++++++++++----------------------------- sa_core.c | 4 ++-- ui.c | 2 -- ui_sa.c | 11 ++++------ 6 files changed, 36 insertions(+), 52 deletions(-) diff --git a/main.c b/main.c index 95fe5b6..876e773 100644 --- a/main.c +++ b/main.c @@ -1855,17 +1855,10 @@ void set_trace_type(int t, int type) } if (force) { plot_into_index(measured); - force_set_markmap(); + redraw_request |= REDRAW_AREA; } } -void set_trace_channel(int t, int channel) -{ - if (trace[t].channel != channel) { - trace[t].channel = channel; - force_set_markmap(); - } -} void set_trace_scale(float scale) { diff --git a/nanovna.h b/nanovna.h index a5a6bca..357893a 100644 --- a/nanovna.h +++ b/nanovna.h @@ -692,7 +692,6 @@ void request_to_draw_cells_behind_numeric_input(void); void redraw_marker(int marker); void markmap_all_markers(void); void plot_into_index(measurement_t measured); -void force_set_markmap(void); void draw_frequencies(void); void draw_all(bool flush); diff --git a/plot.c b/plot.c index 115d88e..23e0e22 100644 --- a/plot.c +++ b/plot.c @@ -150,12 +150,11 @@ void update_grid(void) grid_offset = (WIDTH) * ((fstart % grid) / 100) / (fspan / 100); grid_width = (WIDTH) * (grid / 100) / (fspan / 1000); - force_set_markmap(); if (get_waterfall()){ ili9341_set_background(LCD_BG_COLOR); ili9341_fill(OFFSETX, graph_bottom, LCD_WIDTH - OFFSETX, CHART_BOTTOM - graph_bottom); } - redraw_request |= REDRAW_FREQUENCY; + redraw_request |= REDRAW_FREQUENCY | REDRAW_AREA; } #ifdef __VNA__ @@ -1028,13 +1027,6 @@ static float distance_of_index(int idx) } #endif -static inline void -mark_map(int x, int y) -{ - if (y >= 0 && y < MAX_MARKMAP_Y && x >= 0 && x < MAX_MARKMAP_X) - markmap[current_mappage][y] |= 1 << x; -} - static inline void swap_markmap(void) { @@ -1047,24 +1039,27 @@ clear_markmap(void) memset(markmap[current_mappage], 0, sizeof markmap[current_mappage]); } -void +static void force_set_markmap(void) { memset(markmap[current_mappage], 0xff, sizeof markmap[current_mappage]); } -void -invalidate_rect(int x0, int y0, int x1, int y1) +/* + * Force region of screen update + */ +static void +invalidate_rect_func(int x0, int y0, int x1, int y1) { - x0 /= CELLWIDTH; - x1 /= CELLWIDTH; - y0 /= CELLHEIGHT; - y1 /= CELLHEIGHT; int x, y; + map_t *map = &markmap[current_mappage][0]; for (y = y0; y <= y1; y++) - for (x = x0; x <= x1; x++) - mark_map(x, y); + if ((uint32_t)y < MAX_MARKMAP_Y) + for (x = x0; x <= x1; x++) + map[y]|= 1 << x; } +#define invalidate_rect(x0, y0, x1, y1) invalidate_rect_func((x0)/CELLWIDTH, (y0)/CELLHEIGHT, (x1)/CELLWIDTH, (y1)/CELLHEIGHT) + #define SWAP(x,y) {int t=x;x=y;y=t;} @@ -1575,8 +1570,8 @@ draw_cell(int m, int n) int x = CELL_X(index) - x0 - X_MARKER_OFFSET; int y = CELL_Y(index) - y0 - Y_MARKER_OFFSET; // Check marker icon on cell - if (x + MARKER_WIDTH >= 0 && x - MARKER_WIDTH < CELLWIDTH && - y + MARKER_HEIGHT >= 0 && y - MARKER_HEIGHT < CELLHEIGHT){ + if ((uint32_t)(x+MARKER_WIDTH ) < (CELLWIDTH + MARKER_WIDTH ) && + (uint32_t)(y+MARKER_HEIGHT) < (CELLHEIGHT + MARKER_HEIGHT)){ // Draw marker plate ili9341_set_foreground(LCD_TRACE_1_COLOR + t); cell_blit_bitmap(x, y, MARKER_WIDTH, MARKER_HEIGHT, MARKER_BITMAP(0)); @@ -1723,18 +1718,19 @@ request_to_draw_cells_behind_numeric_input(void) } static void -cell_blit_bitmap(int x, int y, uint16_t w, uint16_t h, const uint8_t *bitmap) +cell_blit_bitmap(int x, int y, uint16_t w, uint16_t h, const uint8_t *bmp) { if (x <= -w) return; uint8_t bits = 0; int c = h+y, r; for (; y < c; y++) { - for (r = 0; r < w; r++) { - if ((r&7)==0) bits = *bitmap++; - if (y >= 0 && x+r >= 0 && y < CELLHEIGHT && x+r < CELLWIDTH && (0x80 & bits)) - cell_buffer[y*CELLWIDTH + x + r] = foreground_color; - bits <<= 1; + for (r = 0; r < w; r++, bits<<=1) { + if ((r&7)==0) bits = *bmp++; + if ((0x80 & bits) == 0) continue; // no pixel + if ((uint32_t)(y+0) >= CELLHEIGHT) continue; // y < 0 || y >= CELLHEIGHT + if ((uint32_t)(x+r) >= CELLWIDTH ) continue; // x+r < 0 || x+r >= CELLWIDTH + cell_buffer[y*CELLWIDTH + x + r] = foreground_color; } } } @@ -1742,21 +1738,22 @@ cell_blit_bitmap(int x, int y, uint16_t w, uint16_t h, const uint8_t *bitmap) void cell_drawstring(char *str, int x, int y) { - if (y <= -FONT_GET_HEIGHT || y >= CELLHEIGHT) + if ((uint32_t)(y+FONT_GET_HEIGHT) >= CELLHEIGHT + FONT_GET_HEIGHT) return; while (*str) { if (x >= CELLWIDTH) return; - uint8_t ch = *str++; + uint16_t ch = *str++; uint16_t w = FONT_GET_WIDTH(ch); cell_blit_bitmap(x, y, w, FONT_GET_HEIGHT, FONT_GET_DATA(ch)); x += w; } } -void + +static void cell_drawstring_7x13(char *str, int x, int y) { - if (y <= -bFONT_GET_HEIGHT || y >= CELLHEIGHT) + if ((uint32_t)(y+bFONT_GET_HEIGHT) >= CELLHEIGHT + bFONT_GET_HEIGHT) return; while (*str) { if (x >= CELLWIDTH) @@ -1772,7 +1769,7 @@ void cell_drawstring_10x14(char *str, int x, int y) { #ifdef wFONT_GET_DATA - if (y <= -wFONT_GET_HEIGHT || y >= CELLHEIGHT) + if ((uint32_t)(y+wFONT_GET_HEIGHT) >= CELLHEIGHT + wFONT_GET_HEIGHT) return; while (*str) { if (x >= CELLWIDTH) @@ -2300,7 +2297,7 @@ int display_test(void) spi_buffer[w] = 0; } ili9341_read_memory(0, h, LCD_WIDTH, 1, LCD_WIDTH, spi_buffer); - for (int volatile w = 0; w < LCD_WIDTH; w++) { + for (int w = 0; w < LCD_WIDTH; w++) { if (spi_buffer[w] != ((w*h) & 0xfff)) return false; } diff --git a/sa_core.c b/sa_core.c index 441f9d3..6d0b847 100644 --- a/sa_core.c +++ b/sa_core.c @@ -1118,7 +1118,7 @@ void user_set_scale(float s) set_scale(s); if (UNIT_IS_LINEAR(setting.unit) && setting.reflevel < setting.scale*NGRIDY) set_reflevel(setting.scale*NGRIDY); - force_set_markmap(); + redraw_request|=REDRAW_AREA; } void set_scale(float t) { @@ -1161,7 +1161,7 @@ void set_offset(float offset) min = level_min(); max = min + level_range(); plot_printf(low_level_help_text, sizeof low_level_help_text, "%+d..%+d", min + (int)offset, max + (int)offset); - force_set_markmap(); + redraw_request|=REDRAW_AREA; dirty = true; // No HW update required, only status panel refresh but need to ensure the cached value is updated in the calculation of the RSSI } diff --git a/ui.c b/ui.c index 2d109f8..50a84ef 100644 --- a/ui.c +++ b/ui.c @@ -143,8 +143,6 @@ static int16_t last_touch_y; #define KP_DONE 1 #define KP_CANCEL 2 -void ui_mode_normal(void); -//static void ui_mode_menu(void); static void ui_mode_keypad(int _keypad_mode); // static void draw_menu(void); static void leave_ui_mode(void); diff --git a/ui_sa.c b/ui_sa.c index ecac7f3..aebdf83 100644 --- a/ui_sa.c +++ b/ui_sa.c @@ -645,13 +645,9 @@ static UI_FUNCTION_CALLBACK(menu_config_cb) switch (data) { case CONFIG_MENUITEM_TOUCH_CAL: touch_cal_exec(); - redraw_frame(); - request_to_redraw_grid(); break; case CONFIG_MENUITEM_TOUCH_TEST: touch_draw_test(); - redraw_frame(); - request_to_redraw_grid(); break; case CONFIG_MENUITEM_SELFTEST: sweep_mode = 0; // Suspend sweep to save time @@ -659,12 +655,13 @@ static UI_FUNCTION_CALLBACK(menu_config_cb) setting.test = 0; setting.test_argument = 0; sweep_mode = SWEEP_SELFTEST; - break; + return; case CONFIG_MENUITEM_VERSION: show_version(); - redraw_frame(); - request_to_redraw_grid(); + break; } + redraw_frame(); + request_to_redraw_grid(); } static UI_FUNCTION_CALLBACK(menu_dfu_cb) From de687a77df09f33459d23a89980c67794fac3de2 Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 22:16:21 +0300 Subject: [PATCH 05/11] Rewrite touch subsystem Unification for both platform Possible if need use hardware touch module Use cache for battery measure (made real measure once in 5s) Not need start/stop watchdog in user calls --- adc.c | 73 +++++++++++++++++++--------- adc_F303.c | 53 +++++++++++--------- ui.c | 139 ++++++++++++++++++++++++----------------------------- 3 files changed, 141 insertions(+), 124 deletions(-) diff --git a/adc.c b/adc.c index 5123d20..a55b4a8 100644 --- a/adc.c +++ b/adc.c @@ -68,36 +68,58 @@ uint16_t adc_single_read(uint32_t chsel) VNA_ADC->CFGR1 = ADC_CFGR1_RES_12BIT; VNA_ADC->CHSELR = chsel; - uint32_t result = 0; - uint32_t count = 1<<3; // Average count - do{ - VNA_ADC->CR |= ADC_CR_ADSTART; // ADC conversion start. - while (VNA_ADC->CR & ADC_CR_ADSTART) - ; - result+=VNA_ADC->DR; - }while(--count); - return result>>3; + VNA_ADC->CR |= ADC_CR_ADSTART; // ADC conversion start + while (VNA_ADC->CR & ADC_CR_ADSTART) + ; + + return VNA_ADC->DR; } int16_t adc_vbat_read(void) { +// Vbat measure averange count = 2^VBAT_AVERAGE +#define VBAT_AVERAGE 4 +// Measure vbat every 5 second +#define VBAT_MEASURE_INTERVAL 50000 + + static int16_t vbat_raw = 0; + static systime_t vbat_time = -VBAT_MEASURE_INTERVAL-1; + systime_t _time = chVTGetSystemTimeX(); + if (_time - vbat_time < VBAT_MEASURE_INTERVAL) + goto return_cached; + vbat_time = _time; // 13.9 Temperature sensor and internal reference voltage // VREFINT_CAL calibrated on 3.3V, need get value in mV #define ADC_FULL_SCALE 3300 #define VREFINT_CAL (*((uint16_t*)0x1FFFF7BA)) - adc_stop(); + uint32_t vrefint = 0; + uint32_t vbat = 0; + + uint8_t restart_touch = 0; + if (VNA_ADC->CR & ADC_CR_ADSTART){ + adc_stop_analog_watchdog(); + restart_touch = 1; + } ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_VBATEN; - // VREFINT == ADC_IN17 - uint32_t vrefint = adc_single_read(ADC_CHSELR_CHSEL17); - // VBAT == ADC_IN18 - // VBATEN enables resiter devider circuit. It consume vbat power. - uint32_t vbat = adc_single_read(ADC_CHSELR_CHSEL18); + for (uint16_t i = 0; i < 1<>=VBAT_AVERAGE; + vrefint>>=VBAT_AVERAGE; ADC->CCR &= ~(ADC_CCR_VREFEN | ADC_CCR_VBATEN); - touch_start_watchdog(); + + if (restart_touch) + adc_start_analog_watchdog(); + // vbat_raw = (3300 * 2 * vbat / 4095) * (VREFINT_CAL / vrefint) // uint16_t vbat_raw = (ADC_FULL_SCALE * VREFINT_CAL * (float)vbat * 2 / (vrefint * ((1<<12)-1))); // For speed divide not on 4095, divide on 4096, get little error, but no matter - uint16_t vbat_raw = ((ADC_FULL_SCALE * 2 * vbat)>>12) * VREFINT_CAL / vrefint; + vbat_raw = ((ADC_FULL_SCALE * 2 * vbat)>>12) * VREFINT_CAL / vrefint; +return_cached: if (vbat_raw < 100) { // maybe D2 is not installed return -1; @@ -105,7 +127,7 @@ int16_t adc_vbat_read(void) return vbat_raw + config.vbat_offset; } -void adc_start_analog_watchdogd(uint32_t chsel) +void adc_start_analog_watchdog(void) { uint32_t cfgr1; @@ -119,7 +141,7 @@ void adc_start_analog_watchdogd(uint32_t chsel) VNA_ADC->IER = ADC_IER_AWDIE; VNA_ADC->TR = ADC_TR(0, TOUCH_THRESHOLD); VNA_ADC->SMPR = ADC_SMPR_SMP_1P5; - VNA_ADC->CHSELR = chsel; + VNA_ADC->CHSELR = ADC_TOUCH_Y; /* ADC configuration and start.*/ VNA_ADC->CFGR1 = cfgr1; @@ -128,7 +150,7 @@ void adc_start_analog_watchdogd(uint32_t chsel) VNA_ADC->CR |= ADC_CR_ADSTART; } -void adc_stop(void) +void adc_stop_analog_watchdog(void) { if (VNA_ADC->CR & ADC_CR_ADEN) { if (VNA_ADC->CR & ADC_CR_ADSTART) { @@ -200,9 +222,11 @@ uint16_t adc_multi_read(uint32_t chsel, uint16_t *result, uint32_t count) int16_t adc_buf_read(uint32_t chsel, uint16_t *result, uint32_t count) { - - adc_stop(); - + uint8_t restart_touch = 0; + if (VNA_ADC->CR & ADC_CR_ADSTART){ + adc_stop_analog_watchdog(); + restart_touch = 1; + } #if 0 // drive high to low on Y line (coordinates from left to right) palSetPad(GPIOB, GPIOB_YN); @@ -218,7 +242,8 @@ int16_t adc_buf_read(uint32_t chsel, uint16_t *result, uint32_t count) // palSetPadMode(GPIOA, 9, PAL_MODE_INPUT_ANALOG); uint16_t res = adc_multi_read(chsel, result, count); // ADC_CHSELR_CHSEL9 #endif - touch_start_watchdog(); + if (restart_touch) + adc_start_analog_watchdog();; return res; } diff --git a/adc_F303.c b/adc_F303.c index 556ec6a..8cbfdc7 100644 --- a/adc_F303.c +++ b/adc_F303.c @@ -93,9 +93,21 @@ uint16_t adc_single_read(uint32_t chsel) int16_t adc_vbat_read(void) { +// Vbat measure averange count = 2^VBAT_AVERAGE +#define VBAT_AVERAGE 4 +// Measure vbat every 5 second +#define VBAT_MEASURE_INTERVAL 50000 + + static int16_t vbat_raw = 0; + static systime_t vbat_time = -VBAT_MEASURE_INTERVAL-1; + + systime_t _time = chVTGetSystemTimeX(); + if (_time - vbat_time < VBAT_MEASURE_INTERVAL) + goto return_cached; + vbat_time = _time; uint16_t VREFINT_CAL = (*((uint16_t*)0x1FFFF7BA)); - uint32_t vbat; - uint32_t vrefint; + uint32_t vrefint = 0; + uint32_t vbat = 0; // const uint16_t V25 = 1750;// when V25=1.41V at ref 3.3V // const uint16_t Avg_Slope = 5; //when avg_slope=4.3mV/C at ref 3.3V // uint16_t temperature_cal1 = *((uint16_t*) ((uint32_t)0x1FFFF7B8U)); @@ -108,19 +120,24 @@ int16_t adc_vbat_read(void) // Vref+ = 3.3 V (tolerance: +-10 mV). */ // float avg_slope = ((float)(temperature_cal1 - temperature_cal2))/(110-25); // float ts; - #ifndef F303_ADC_VREF_ALWAYS_ON +#ifndef F303_ADC_VREF_ALWAYS_ON adcSTM32EnableVBAT(&ADCD1); adcSTM32EnableVREF(&ADCD1); // adcSTM32EnableTS(&ADCD1); - adcConvert(&ADCD1, &adcgrpcfgVBAT, samplesVBAT, ADC_GRP_BUF_DEPTH_VBAT); +#endif + for (uint16_t i = 0; i < 1<>=VBAT_AVERAGE; + vrefint>>=VBAT_AVERAGE; +#ifndef F303_ADC_VREF_ALWAYS_ON adcSTM32DisableVBAT(&ADCD1); adcSTM32DisableVREF(&ADCD1); // adcSTM32DisableTS(&ADCD1); - #else - adcConvert(&ADCD1, &adcgrpcfgVBAT, samplesVBAT, sizeof(samplesVBAT)/(sizeof(adcsample_t)*ADC_GRP_NUM_CHANNELS_VBAT)); - #endif - vbat = samplesVBAT[0]; - vrefint = samplesVBAT[1]; +#endif + // ts = samplesVBAT[2]; // uint16_t vts = (ADC_FULL_SCALE * VREFINT_CAL * ts / (vrefint * ((1<<12)-1))); // uint16_t TemperatureC2 = (uint16_t)((V25-ts)/Avg_Slope+25); @@ -129,7 +146,8 @@ int16_t adc_vbat_read(void) // vbat_raw = (3300 * 2 * vbat / 4095) * (VREFINT_CAL / vrefint) // uint16_t vbat_raw = (ADC_FULL_SCALE * VREFINT_CAL * (float)vbat * 2 / (vrefint * ((1<<12)-1))); // For speed divide not on 4095, divide on 4096, get little error, but no matter - uint16_t vbat_raw = ((ADC_FULL_SCALE * 2 * vbat)>>12) * VREFINT_CAL / vrefint; + vbat_raw = ((ADC_FULL_SCALE * 2 * vbat)>>12) * VREFINT_CAL / vrefint; +return_cached: if (vbat_raw < 100) { // maybe D2 is not installed return -1; @@ -137,25 +155,14 @@ int16_t adc_vbat_read(void) return vbat_raw + config.vbat_offset; } -void adc_start_analog_watchdogd(void) +void adc_start_analog_watchdog(void) { -// adcStart(&ADCD2, NULL); adcStartConversion(&ADCD2, &adcgrpcfgTouch, samples, 1); } -void adc_stop(void) +void adc_stop_analog_watchdog(void) { - #if 1 adcStopConversion(&ADCD2); - #else - if (ADC2->CR & ADC_CR_ADEN) { - if (ADC2->CR & ADC_CR_ADSTART) { - ADC2->CR |= ADC_CR_ADSTP; - while (ADC2->CR & ADC_CR_ADSTP) - ; - } - } - #endif } static inline void adc_interrupt(void) diff --git a/ui.c b/ui.c index 8d50adc..d208f25 100644 --- a/ui.c +++ b/ui.c @@ -135,6 +135,9 @@ typedef struct { #define EVT_TOUCH_PRESSED 2 #define EVT_TOUCH_RELEASED 3 #define EVT_TOUCH_LONGPRESS 4 + +#define TOUCH_INTERRUPT_ENABLED 1 +static uint8_t touch_status_flag = 0; static int8_t last_touch_status = EVT_TOUCH_NONE; static int16_t last_touch_x; static int16_t last_touch_y; @@ -220,9 +223,15 @@ static int btn_wait_release(void) } } + +#define SOFTWARE_TOUCH +//******************************************************************************* +// Software Touch module +//******************************************************************************* +#ifdef SOFTWARE_TOUCH // ADC read count for measure X and Y (2^N count) -#define TOUCH_X_N 4 -#define TOUCH_Y_N 3 +#define TOUCH_X_N 2 +#define TOUCH_Y_N 2 static int touch_measure_y(void) { @@ -260,8 +269,14 @@ touch_measure_x(void) do{v+=adc_single_read(ADC_TOUCH_X);}while(--cnt); return v>>TOUCH_X_N; } +// Manually measure touch event +static inline int +touch_status(void) +{ + return adc_single_read(ADC_TOUCH_Y) > TOUCH_THRESHOLD; +} -void +static void touch_prepare_sense(void) { // Set Y line as input @@ -277,35 +292,54 @@ touch_prepare_sense(void) // chThdSleepMilliseconds(10); // Wait 10ms for denounce touch } -void +static void touch_start_watchdog(void) { - touch_prepare_sense(); -#ifdef TINYSA4 - adc_start_analog_watchdogd(); -#else - adc_start_analog_watchdogd(ADC_TOUCH_Y); -#endif + if (touch_status_flag&TOUCH_INTERRUPT_ENABLED) return; + touch_status_flag^=TOUCH_INTERRUPT_ENABLED; + adc_start_analog_watchdog(); } -static inline int -touch_status(void) +static void +touch_stop_watchdog(void) { - return adc_single_read(ADC_TOUCH_Y) > TOUCH_THRESHOLD; + if (!(touch_status_flag&TOUCH_INTERRUPT_ENABLED)) return; + touch_status_flag^=TOUCH_INTERRUPT_ENABLED; + adc_stop_analog_watchdog(); +} + +// Touch panel timer check (check press frequency 20Hz) +static const GPTConfig gpt3cfg = { + 20, // 200Hz timer clock. 200/10 = 20Hz touch check + NULL, // Timer callback. + 0x0020, // CR2:MMS=02 to output TRGO + 0 +}; + +// +// Touch init function init timer 3 trigger adc for check touch interrupt, and run measure +// +static void touch_init(void){ + // Prepare pin for measure touch event + touch_prepare_sense(); + // Start touch interrupt, used timer_3 ADC check threshold: + gptStart(&GPTD3, &gpt3cfg); // Init timer 3 + gptStartContinuous(&GPTD3, 10); // Start timer 3 vs timer 10 interval + touch_start_watchdog(); // Start ADC watchdog (measure by timer 3 interval and trigger interrupt if touch pressed) } +// Main software touch function, should: +// set last_touch_x and last_touch_x +// return touch status static int touch_check(void) { + touch_stop_watchdog(); + int stat = touch_status(); if (stat) { - static int prev_x=0; int y = touch_measure_y(); int x = touch_measure_x(); -#define X_NOISE 5 - if (x > prev_x - X_NOISE && x < prev_x + X_NOISE) // avoid noise - x = prev_x; - prev_x = x; touch_prepare_sense(); if (touch_status()) { @@ -321,10 +355,8 @@ touch_check(void) last_touch_x = mouse_x; last_touch_y = mouse_y; } +#endif } -#else - } -#endif #if 0 // Long press detection systime_t ticks = chVTGetSystemTimeX(); @@ -341,6 +373,10 @@ touch_check(void) } return stat ? EVT_TOUCH_DOWN : EVT_TOUCH_NONE; } +//******************************************************************************* +// End Software Touch module +//******************************************************************************* +#endif // end SOFTWARE_TOUCH void touch_wait_release(void) @@ -368,8 +404,6 @@ void touch_cal_exec(void) { int x1, x2, y1, y2; - - adc_stop(); ili9341_set_foreground(LCD_FG_COLOR); ili9341_set_background(LCD_BG_COLOR); ili9341_clear_screen(); @@ -401,7 +435,6 @@ touch_cal_exec(void) config_save(); // Auto save touch calibration //redraw_all(); - touch_start_watchdog(); } void @@ -409,8 +442,6 @@ touch_draw_test(void) { int x0, y0; int x1, y1; - - adc_stop(); ili9341_set_foreground(LCD_FG_COLOR); ili9341_set_background(LCD_BG_COLOR); @@ -441,7 +472,6 @@ touch_draw_test(void) } while (touch_check() != EVT_TOUCH_RELEASED); } }while (!(btn_check() & EVT_BUTTON_SINGLE_CLICK)); - touch_start_watchdog(); } @@ -461,7 +491,6 @@ void show_version(void) { int x = 5, y = 5, i = 0; - adc_stop(); ili9341_set_foreground(LCD_FG_COLOR); ili9341_set_background(LCD_BG_COLOR); @@ -522,21 +551,17 @@ extern const char *states[]; (RCC->BDCR & STM32_RTCSEL_MASK) == STM32_RTCSEL_LSE ? 'E' : 'I'); ili9341_drawstring(buffer, x, y); #endif -#if 1 +#if 0 uint32_t vbat=adc_vbat_read(); plot_printf(buf, sizeof(buf), "Batt: %d.%03dV", vbat/1000, vbat%1000); ili9341_drawstring(buf, x, y + FONT_STR_HEIGHT + 2); #endif } - - touch_start_watchdog(); } void enter_dfu(void) { - adc_stop(); - int x = 5, y = 5; ili9341_set_foreground(LCD_FG_COLOR); ili9341_set_background(LCD_BG_COLOR); @@ -2692,8 +2717,6 @@ static void ui_process_keypad(void) { int status; - adc_stop(); - kp_index = 0; while (TRUE) { status = btn_check(); @@ -2735,7 +2758,6 @@ ui_process_keypad(void) // request_to_redraw_grid(); } //redraw_all(); - touch_start_watchdog(); } static void @@ -2926,8 +2948,6 @@ touch_marker_select(int touch_x, int touch_y) static void ui_process_touch(void) { -// awd_count++; - adc_stop(); int touch_x, touch_y; int status = touch_check(); if (status == EVT_TOUCH_PRESSED || status == EVT_TOUCH_DOWN) { @@ -2958,7 +2978,6 @@ void ui_process_touch(void) break; } } - touch_start_watchdog(); } static int previous_button_state = 0; @@ -2989,6 +3008,7 @@ ui_process(void) ui_process_touch(); operation_requested = OP_NONE; } + touch_start_watchdog(); } /* Triggered when the button is pressed or released. The LED4 is set to ON.*/ @@ -3028,27 +3048,6 @@ static const EXTConfig extcfg = { } }; -// Used for touch check interval -static const GPTConfig gpt3cfg = { - 20, /* 20Hz timer clock.*/ - NULL, /* Timer callback.*/ - 0x0020, /* CR2:MMS=02 to output TRGO */ - 0 -}; - -#if 0 -static void -test_touch(int *x, int *y) -{ - adc_stop(ADC1); - - *x = touch_measure_x(); - *y = touch_measure_y(); - - touch_start_watchdog(); -} -#endif - void handle_touch_interrupt(void) { @@ -3059,25 +3058,14 @@ void ui_init() { adc_init(); - - /* - * Activates the EXT driver 1. - */ - + // Activates the EXT driver 1. extStart(&EXTD1, &extcfg); -#if 1 - gptStart(&GPTD3, &gpt3cfg); - gptPolledDelay(&GPTD3, 10); /* Small delay.*/ - - gptStartContinuous(&GPTD3, 10); -#endif - - touch_start_watchdog(); + // Init touch subsystem + touch_init(); } void wait_user(void) { - adc_stop(); touch_wait_released(); #if 0 operation_requested = OP_NONE; @@ -3088,16 +3076,13 @@ void wait_user(void) break; } #endif - touch_start_watchdog(); } int check_touched(void) { int touched = false; - adc_stop(); if (touch_check() == EVT_TOUCH_RELEASED) touched = true; - touch_start_watchdog(); return touched; } From af089574eb9a7a4db87794c7cc27b348118563d8 Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 22:17:02 +0300 Subject: [PATCH 06/11] Lost header for ADC fixes --- nanovna.h | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/nanovna.h b/nanovna.h index 357893a..0e346e5 100644 --- a/nanovna.h +++ b/nanovna.h @@ -1146,7 +1146,6 @@ void ui_init(void); void ui_show(void); void ui_hide(void); -void touch_start_watchdog(void); void touch_position(int *x, int *y); void handle_touch_interrupt(void); @@ -1160,26 +1159,20 @@ void enter_dfu(void); * adc.c */ #ifdef TINYSA4 - #define rccEnableWWDG(lp) rccEnableAPB1(RCC_APB1ENR_WWDGEN, lp) +#define rccEnableWWDG(lp) rccEnableAPB1(RCC_APB1ENR_WWDGEN, lp) #define ADC_TOUCH_X ADC_CHANNEL_IN3 #define ADC_TOUCH_Y ADC_CHANNEL_IN4 - -void adc_init(void); -uint16_t adc_single_read(uint32_t chsel); -void adc_start_analog_watchdogd(void); -void adc_stop(void); -int16_t adc_vbat_read(void); #else #define ADC_TOUCH_X ADC_CHSELR_CHSEL6 #define ADC_TOUCH_Y ADC_CHSELR_CHSEL7 +#endif void adc_init(void); uint16_t adc_single_read(uint32_t chsel); -void adc_start_analog_watchdogd(uint32_t chsel); -void adc_stop(void); -void adc_interrupt(void); +void adc_start_analog_watchdog(void); +void adc_stop_analog_watchdog(void); int16_t adc_vbat_read(void); -#endif + /* * misclinous */ From 71b2d5cdf6de13f62294c1824667b18b97274ea5 Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 22:20:16 +0300 Subject: [PATCH 07/11] setting_t stricture optimization Less size, less code size Move waterfall setting to setting_t Add comments to used structure !! Old config and settings data lost after!! --- nanovna.h | 151 +++++++++++++++++++++++++++++------------------------- plot.c | 46 ++++++++--------- sa_core.c | 3 +- 3 files changed, 105 insertions(+), 95 deletions(-) diff --git a/nanovna.h b/nanovna.h index 0e346e5..3ba0369 100644 --- a/nanovna.h +++ b/nanovna.h @@ -285,7 +285,7 @@ void set_harmonic(int); //extern int setting.harmonic; int search_is_greater(void); void set_auto_attenuation(void); -void set_auto_reflevel(int); +void set_auto_reflevel(bool); int is_paused(void); void set_actual_power(float); void SetGenerate(int); @@ -586,6 +586,7 @@ typedef struct trace { typedef struct config { int32_t magic; + uint32_t deviceid; uint16_t lcd_palette[MAX_PALETTE]; int16_t touch_cal[4]; uint32_t _serial_speed; @@ -598,11 +599,10 @@ typedef struct config { float high_level_offset; float low_level_output_offset; float high_level_output_offset; + float low_correction_value[CORRECTION_POINTS]; + float high_correction_value[CORRECTION_POINTS]; freq_t low_correction_frequency[CORRECTION_POINTS]; - float low_correction_value[CORRECTION_POINTS]; freq_t high_correction_frequency[CORRECTION_POINTS]; - float high_correction_value[CORRECTION_POINTS]; - uint32_t deviceid; #ifdef TINYSA4 freq_t setting_frequency_30mhz; #else @@ -841,87 +841,97 @@ void show_version(void); /* * flash.c */ - - typedef struct setting { uint32_t magic; -// freq_t _frequency0; -// freq_t _frequency1; - int mode; + bool auto_reflevel; // bool + bool auto_attenuation; // bool + bool mirror_masking; // bool + bool subtract_stored; // bool + bool show_stored; // bool + bool tracking_output; // bool + bool mute; // bool + bool auto_IF; // bool + + uint8_t mode; // enum + uint8_t below_IF; // enum + uint8_t unit; // enum + uint8_t agc; // enum + uint8_t lna; // enum + uint8_t modulation; // enum + uint8_t trigger; // enum + uint8_t trigger_mode; // enum + uint8_t trigger_direction; // enum + uint8_t step_delay_mode; // enum + uint8_t waterfall; // enum + uint8_t average; // enum + uint8_t measurement; // enum + uint8_t spur_removal; // enum + + int8_t tracking; // -1...1 !!! need convert to bool + uint8_t atten_step; // 0...1 !!! need convert to bool + int8_t _active_marker; // -1...MARKER_MAX + uint8_t unit_scale_index; // table index + uint8_t repeat; // 1...100 + uint8_t noise; // 2...50 + uint8_t lo_drive; // 0-3 , 3dB steps + uint8_t rx_drive; // 0-15 , 7=+20dBm, 3dB steps + uint8_t test; // current test number + uint8_t harmonic; // used harmonic number 1...5 + uint8_t fast_speedup; // 0 - 20 + + uint16_t linearity_step; // range equal POINTS_COUNT uint16_t _sweep_points; - int16_t attenuate_x2; - uint8_t auto_attenuation; - uint8_t below_IF; - int8_t _active_marker; - int8_t unit; - uint8_t mirror_masking; - uint8_t subtract_stored; // uint8_t increases size - uint8_t agc; - uint8_t lna; - uint8_t auto_reflevel; - uint8_t dummy2; - int modulation; - int show_stored; - int atten_step; - int test; - int harmonic; + int16_t attenuate_x2; // 0...60 !!! in calculation can be < 0 + + uint16_t step_delay; // KM_SAMPLETIME 250...10000, 0=auto + uint16_t offset_delay; // KM_OFFSET_DELAY 250...10000, 0=auto + + uint16_t freq_mode; // 0...1!!! need convert to bool or bit field + int16_t refer; // -1 disabled + + uint16_t modulation_frequency; // 50...6000 + int decay; // KM_DECAY < 1000000 + int attack; // KM_ATTACK < 20000 + + int32_t slider_position; + uint32_t slider_span; + uint32_t rbw_x10; - int average; - int lo_drive; // 0-3 , 3dB steps - int rx_drive; // 0-15 , 7=+20dBm, 3dB steps + uint32_t vbw_x10; + float reflevel; float scale; - int tracking; - int step_delay; + float offset; + float trigger_level; + float level; + float level_sweep; + + float unit_scale; + float normalize_level; // Level to set normalize to, zero if not doing anything + freq_t frequency_step; - int decay; - int attack; - int noise; - uint32_t vbw_x10; - int tracking_output; - int repeat; freq_t frequency0; freq_t frequency1; freq_t frequency_IF; - int freq_mode; - int measurement; - int refer; - int spur_removal; + trace_t _trace[TRACES_MAX]; marker_t _markers[MARKERS_MAX]; - float offset; - float trigger_level; - int trigger_direction; - int trigger; - int linearity_step; - float level; - float level_sweep; - uint32_t sweep_time_us; + + systime_t sweep_time_us; systime_t measure_sweep_time_us; - uint32_t actual_sweep_time_us; - uint32_t additional_step_delay_us; - int test_argument; - int auto_IF; - unsigned int unit_scale_index; - float unit_scale; - int mute; - int step_delay_mode; - int offset_delay; - int fast_speedup; - float normalize_level; // Level to set normalize to, zero if not doing anything - int modulation_frequency; - int trigger_mode; - int slider_position; - int32_t slider_span; - freq_t *correction_frequency; + systime_t actual_sweep_time_us; + systime_t additional_step_delay_us; + + freq_t *correction_frequency; float *correction_value; + #ifdef TINYSA4 - int extra_lna; - int ultra; - int R; + bool extra_lna; + uint8_t ultra; // enum ?? + int R; // KM_R #endif - uint16_t dummy; + int test_argument; // used for tests uint32_t checksum; // must be last and at 4 byte boundary }setting_t; @@ -929,13 +939,14 @@ extern setting_t setting; void reset_settings(int m); - #define S_IS_AUTO(x) ((x)&2) #define S_STATE(X) ((X)&1) enum { S_OFF=0, S_ON=1, S_AUTO_OFF=2, S_AUTO_ON=3 }; enum { SD_NORMAL, SD_PRECISE, SD_FAST, SD_MANUAL }; +enum {W_OFF, W_SMALL, W_BIG}; + #ifdef __FAST_SWEEP__ #define MINIMUM_SWEEP_TIME 1800U // Minimum sweep time on zero span in uS #else @@ -1028,7 +1039,7 @@ typedef struct properties { //sizeof(properties_t) == 0x1200 -#define CONFIG_MAGIC 0x434f4e47 /* 'CONF' */ +#define CONFIG_MAGIC 0x434f4e48 /* 'CONF' */ extern int16_t lastsaveid; //extern properties_t *active_props; diff --git a/plot.c b/plot.c index 23e0e22..6064a45 100644 --- a/plot.c +++ b/plot.c @@ -31,7 +31,6 @@ #ifdef __SCROLL__ uint16_t _grid_y = (CHART_BOTTOM / NGRIDY); uint16_t graph_bottom = CHART_BOTTOM; -static int waterfall = false; #endif static void cell_draw_marker_info(int x0, int y0); static void cell_grid_line_info(int x0, int y0); @@ -517,7 +516,7 @@ draw_on_strut(int v0, int d, int color) #define SQRT_50 ((float)7.0710678118654) #define LOG_10_SQRT_50 ((float)0.84948500216800) #define POW_30_20 ((float) 0.215443469) -#define POW_SQRT ((float)1.5234153789) +#define POW_SQRT ((float)0.2236067950725555419921875) #define LOG_10_SQRT_50_x20_plus30 ((float)46.98970004336) #define LOG_10_SQRT_50_x20_plus90 ((float)106.98970004336) @@ -538,20 +537,20 @@ value(const float v) switch(setting.unit) { case U_DBMV: -// return v + 30.0 + 20.0*log10f(sqrt(50)); +// return v + 30.0 + 20.0*log10f(sqrtf(50)); return v + LOG_10_SQRT_50_x20_plus30; // + 30.0 + 20.0*LOG_10_SQRT_50; //TODO convert constants to single float number as GCC compiler does runtime calculation break; case U_DBUV: -// return v + 90.0 + 20.0*log10f(sqrt(50.0)); //TODO convert constants to single float number as GCC compiler does runtime calculation +// return v + 90.0 + 20.0*log10f(sqrtf(50.0)); //TODO convert constants to single float number as GCC compiler does runtime calculation return v + LOG_10_SQRT_50_x20_plus90; // 90.0 + 20.0*LOG_10_SQRT_50; break; case U_VOLT: -// return powf(10, (v-30.0)/20.0) * sqrt((float)50.0); - return powf((float)10.0, (v-(float)30.0)/(float)20.0)*SQRT_50; // Do NOT change pow to powf as this will increase the size -// return pow(10, v/20.0) * POW_SQRT; //TODO there is an error in this calculation as the outcome is different from the not optimized version +// return powf(10.0, (v-30.0)/20.0) * sqrtf(50.0); +// return powf(10.0, (v-30.0)/20.0) * SQRT_50; // + return powf(10.0, v/20) * POW_SQRT; // powf(10.0,v/20.0) * powf(10, -30.0/20.0) * sqrtf(50) break; case U_WATT: - return powf((float)10.0, v/10.0)/1000.0; // Do NOT change pow to powf as this will increase the size + return powf((float)10.0, v/10.0)/1000.0; // break; } // case U_DBM: @@ -565,16 +564,16 @@ to_dBm(const float v) switch(setting.unit) { case U_DBMV: -// return v - 30.0 - 20.0*log10f(sqrt(50)); +// return v - 30.0 - 20.0*log10f(sqrtf(50)); return v - LOG_10_SQRT_50_x20_plus30; // (30.0 + 20.0*LOG_10_SQRT_50); break; case U_DBUV: -// return v - 90.0 - 20.0*log10f(sqrt(50.0)); //TODO convert constants to single float number as GCC compiler does runtime calculation +// return v - 90.0 - 20.0*log10f(sqrtf(50.0)); //TODO convert constants to single float number as GCC compiler does runtime calculation return v - LOG_10_SQRT_50_x20_plus90; // (90.0 + 20.0*LOG_10_SQRT_50); break; case U_VOLT: -// return log10f( v / (sqrt(50.0))) * 20.0 + 30.0 ; - return log10f( v / (SQRT_50)) * 20.0 + 30.0 ; +// return log10f( v / (sqrtf(50.0))) * 20.0 + 30.0 ; + return log10f( v / SQRT_50) * 20.0 + 30.0 ; break; case U_WATT: return log10f(v*1000.0)*10.0; @@ -1072,7 +1071,7 @@ mark_cells_from_index(void) for (t = 0; t < TRACES_MAX; t++) { if (!trace[t].enabled) continue; - index_t *index = &trace_index[t][0]; + index_t *index = trace_index[t]; int m0 = CELL_X(index[0]) / CELLWIDTH; int n0 = CELL_Y(index[0]) / CELLHEIGHT; map[n0] |= 1 << m0; @@ -1481,7 +1480,7 @@ draw_cell(int m, int n) for (y = 0; y < h; y++) { if (rectangular_grid_y(y + y0)) { for (x = 0; x < w; x++) - if (x + x0 >= CELLOFFSETX && x + x0 <= WIDTH + CELLOFFSETX) + if ((uint32_t)(x + x0 - CELLOFFSETX) <= WIDTH) cell_buffer[y * CELLWIDTH + x] = c; } } @@ -1665,8 +1664,8 @@ draw_all(bool flush) draw_all_cells(flush); #ifdef __SCROLL__ // START_PROFILE - if (waterfall) - update_waterfall(); + if (setting.waterfall) + update_waterfall(); // STOP_PROFILE #endif } @@ -2374,26 +2373,25 @@ static void update_waterfall(void){ int get_waterfall(void) { - return(waterfall); + return(setting.waterfall); } -enum {W_OFF, W_SMALL, W_BIG}; void toggle_waterfall(void) { - if (waterfall == W_OFF) { + if (setting.waterfall == W_OFF) { w_min = (int)min_level; w_max = (int)peakLevel; if (w_max < w_min + 20) w_max = w_min + 20; graph_bottom = SMALL_WATERFALL; - waterfall = W_SMALL; - } else if (waterfall == W_SMALL) { + setting.waterfall = W_SMALL; + } else if (setting.waterfall == W_SMALL) { graph_bottom = BIG_WATERFALL; - waterfall = W_BIG; + setting.waterfall = W_BIG; } else { graph_bottom = NO_WATERFALL; - waterfall = W_OFF; + setting.waterfall = W_OFF; } _grid_y = graph_bottom / NGRIDY; ili9341_set_background(LCD_BG_COLOR); @@ -2405,7 +2403,7 @@ void disable_waterfall(void) { graph_bottom = NO_WATERFALL; - waterfall = W_OFF; + setting.waterfall = W_OFF; _grid_y = graph_bottom / NGRIDY; ili9341_set_background(LCD_BG_COLOR); ili9341_fill(OFFSETX, graph_bottom, LCD_WIDTH - OFFSETX, CHART_BOTTOM - graph_bottom); diff --git a/sa_core.c b/sa_core.c index 6d0b847..684a3ab 100644 --- a/sa_core.c +++ b/sa_core.c @@ -192,6 +192,7 @@ void reset_settings(int m) setting.auto_attenuation = false; setting.subtract_stored = false; setting.normalize_level = 0.0; + setting.waterfall = W_OFF; #ifdef TINYSA4 setting.lo_drive=1; #else @@ -614,7 +615,7 @@ void set_auto_attenuation(void) dirty = true; } -void set_auto_reflevel(int v) +void set_auto_reflevel(bool v) { setting.auto_reflevel = v; } From a86cfbd7eff16a6109ff6cbec04f421795e5f1bb Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 23:19:10 +0300 Subject: [PATCH 08/11] Restore quick menus --- ui_sa.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/ui_sa.c b/ui_sa.c index aebdf83..6c5b5a3 100644 --- a/ui_sa.c +++ b/ui_sa.c @@ -2510,16 +2510,19 @@ const char * const unit_string[] = { "dBm", "dBmV", "dB"S_MICRO"V", "V", "W", "d static const float scale_value[]={50000, 20000, 10000, 5000, 2000, 1000, 500, 200, 100, 50, 20,10,5,2,1,0.5,0.2,0.1,0.05,0.02,0.01,0.005,0.002, 0.001,0.0005,0.0002, 0.0001}; static const char * const scale_vtext[]= {"50000", "20000", "10000", "5000", "2000", "1000", "500", "200", "100", "50", "20","10","5","2","1","0.5","0.2","0.1","0.05","0.02","0.01", "0.005","0.002","0.001", "0.0005","0.0002","0.0001"}; +// Quick menu #define MAX_QUICK_MENU 20 -uint8_t quick_menu_y[MAX_QUICK_MENU]; -menuitem_t *quick_menu[MAX_QUICK_MENU]; -int max_quick_menu = 0; +enum { ITEM_NO_SPACE = 0, ITEM_NORMAL_SPACE= 1, ITEM_DOUBLE_SPACE = 2 }; +static uint16_t quick_menu_y[MAX_QUICK_MENU]; +static menuitem_t *quick_menu[MAX_QUICK_MENU]; +static uint8_t max_quick_menu = 0; +static uint8_t item_space = ITEM_NORMAL_SPACE; int invoke_quick_menu(int y) { - int i=0; - while (i < max_quick_menu) { - if (y < quick_menu_y[i] && quick_menu[i] != NULL) { + int i; + for (i = 0; i < max_quick_menu;i++) { + if (y < quick_menu_y[i]) { if ((uint32_t)quick_menu[i] < KM_NONE) { ui_mode_keypad((int)quick_menu[i]); ui_process_keypad(); @@ -2527,19 +2530,15 @@ int invoke_quick_menu(int y) selection = -1; menu_current_level = 0; menu_push_submenu(quick_menu[i]); + draw_menu(); } return TRUE; } - i++; } return FALSE; } #define YSTEP 8 -enum { ITEM_NO_SPACE = 0, ITEM_NORMAL_SPACE= 1, ITEM_DOUBLE_SPACE = 2 }; - -int item_space = ITEM_NORMAL_SPACE; - int add_quick_menu(char *buf, int x, int y, menuitem_t *menu) { ili9341_drawstring(buf, x, y); From b9d59957f2cc17e58e77ba36eb4830b745890f50 Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 23:50:41 +0300 Subject: [PATCH 09/11] Less quick menu code --- ui_sa.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/ui_sa.c b/ui_sa.c index 6c5b5a3..5edd9cb 100644 --- a/ui_sa.c +++ b/ui_sa.c @@ -2512,11 +2512,11 @@ static const char * const scale_vtext[]= {"50000", "20000", "10000", "5000", "20 // Quick menu #define MAX_QUICK_MENU 20 -enum { ITEM_NO_SPACE = 0, ITEM_NORMAL_SPACE= 1, ITEM_DOUBLE_SPACE = 2 }; +#define MAX_ITEM_SPACE 2 static uint16_t quick_menu_y[MAX_QUICK_MENU]; static menuitem_t *quick_menu[MAX_QUICK_MENU]; static uint8_t max_quick_menu = 0; -static uint8_t item_space = ITEM_NORMAL_SPACE; +static uint8_t item_space = 0; // int invoke_quick_menu(int y) { @@ -2542,15 +2542,7 @@ int invoke_quick_menu(int y) int add_quick_menu(char *buf, int x, int y, menuitem_t *menu) { ili9341_drawstring(buf, x, y); - y += YSTEP; - switch (item_space) { - case ITEM_NORMAL_SPACE: - y += YSTEP/2 ; - break; - case ITEM_DOUBLE_SPACE: - y += YSTEP; - break; - } + y += YSTEP*item_space/2 + YSTEP; if (max_quick_menu= BATTERY_START && item_space > ITEM_NO_SPACE) { + if (y >= BATTERY_START && item_space > 0) { item_space--; // Reduce item spacing goto redraw_cal_status; } - if ((y + (max_quick_menu+1) * YSTEP/2) < BATTERY_START && item_space < ITEM_DOUBLE_SPACE) { + if ((y + (max_quick_menu+1) * YSTEP/2) < BATTERY_START && item_space < MAX_ITEM_SPACE) { item_space++; // Increase item spacing goto redraw_cal_status; } From d03d7e82729cb6af66c986e6c062c5f42e7e6387 Mon Sep 17 00:00:00 2001 From: DiSlord Date: Wed, 3 Mar 2021 23:51:20 +0300 Subject: [PATCH 10/11] Center vertically FORM button text --- ui.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ui.c b/ui.c index d208f25..2163212 100644 --- a/ui.c +++ b/ui.c @@ -1899,7 +1899,7 @@ draw_menu_buttons(const menuitem_t *menu) text_offs = button_start+6+ICON_WIDTH+1; } // ili9341_drawstring_size(button.text, text_offs, y+(button_height-2*FONT_GET_HEIGHT)/2, 2); - ili9341_drawstring_10x14(button.text, text_offs, y+(button_height-wFONT_GET_HEIGHT)/2 - 2); + ili9341_drawstring_10x14(button.text, text_offs, y+(button_height-wFONT_GET_HEIGHT)/2); #ifdef __ICONS__ if (menu[i].type & MT_ICON) { blit8BitWidthBitmap(button_start+MENU_FORM_WIDTH-2*FORM_ICON_WIDTH-8,y+(button_height-FORM_ICON_HEIGHT)/2,FORM_ICON_WIDTH,FORM_ICON_HEIGHT,& left_icons[((menu[i].data >>4)&0xf)*2*FORM_ICON_HEIGHT]); From 984f6c947fd4129f8a63e22eeb103476efa5c563 Mon Sep 17 00:00:00 2001 From: DiSlord Date: Thu, 4 Mar 2021 00:13:27 +0300 Subject: [PATCH 11/11] Better solve draw_menu on menu_push_submenu call Shift text up on 2 pixels for slider forms --- ui.c | 11 ++++++++--- ui_sa.c | 1 - 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/ui.c b/ui.c index 2163212..69dbfa8 100644 --- a/ui.c +++ b/ui.c @@ -1342,7 +1342,6 @@ menu_move_back_and_leave_ui(void) static void menu_push_submenu(const menuitem_t *submenu) { - ui_mode = UI_MENU; // Only needed for auto mode setting erase_menu_buttons(); if (menu_current_level < MENU_STACK_DEPTH_MAX-1) menu_current_level++; @@ -1359,6 +1358,10 @@ menu_push_submenu(const menuitem_t *submenu) // request_to_redraw_grid(); area_width = AREA_WIDTH_NORMAL - MENU_BUTTON_WIDTH; } + if (ui_mode != UI_MENU){ + draw_menu(); // Draw menu only on enter menu mode + ui_mode = UI_MENU; // Only needed for auto mode setting + } } void @@ -1898,8 +1901,6 @@ draw_menu_buttons(const menuitem_t *menu) blit8BitWidthBitmap(button_start+3, y+(MENU_BUTTON_HEIGHT-ICON_HEIGHT)/2, ICON_WIDTH, ICON_HEIGHT, &check_box[button.icon*2*ICON_HEIGHT]); text_offs = button_start+6+ICON_WIDTH+1; } -// ili9341_drawstring_size(button.text, text_offs, y+(button_height-2*FONT_GET_HEIGHT)/2, 2); - ili9341_drawstring_10x14(button.text, text_offs, y+(button_height-wFONT_GET_HEIGHT)/2); #ifdef __ICONS__ if (menu[i].type & MT_ICON) { blit8BitWidthBitmap(button_start+MENU_FORM_WIDTH-2*FORM_ICON_WIDTH-8,y+(button_height-FORM_ICON_HEIGHT)/2,FORM_ICON_WIDTH,FORM_ICON_HEIGHT,& left_icons[((menu[i].data >>4)&0xf)*2*FORM_ICON_HEIGHT]); @@ -1907,7 +1908,9 @@ draw_menu_buttons(const menuitem_t *menu) } #endif int local_slider_positions = 0; + int local_text_shift = 0; if (MT_MASK(menu[i].type) == MT_KEYPAD) { + local_text_shift = 2; if (menu[i].data == KM_CENTER) { local_slider_positions = LCD_WIDTH/2+setting.slider_position; plot_printf(step_text_freq[0], sizeof step_text_freq[0], "-%3.0FHz", (float)setting.slider_span); @@ -1942,6 +1945,8 @@ draw_menu_buttons(const menuitem_t *menu) goto draw_slider; } #endif +// ili9341_drawstring_size(button.text, text_offs, y+(button_height-2*FONT_GET_HEIGHT)/2-local_text_shift, 2); + ili9341_drawstring_10x14(button.text, text_offs, y+(button_height-wFONT_GET_HEIGHT)/2-local_text_shift); } else { int button_width = MENU_BUTTON_WIDTH; int button_start = LCD_WIDTH - MENU_BUTTON_WIDTH; diff --git a/ui_sa.c b/ui_sa.c index 5edd9cb..e422376 100644 --- a/ui_sa.c +++ b/ui_sa.c @@ -2530,7 +2530,6 @@ int invoke_quick_menu(int y) selection = -1; menu_current_level = 0; menu_push_submenu(quick_menu[i]); - draw_menu(); } return TRUE; }