From 568cbe17c93c2312a16925c6d249f6293138d35a Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Sat, 1 May 2021 18:57:33 +0200 Subject: [PATCH 1/5] DisLord update --- si4468.c | 29 +++++++++-------------------- 1 file changed, 9 insertions(+), 20 deletions(-) diff --git a/si4468.c b/si4468.c index afb38a0..646be8c 100644 --- a/si4468.c +++ b/si4468.c @@ -720,13 +720,13 @@ void SI4463_do_api(void* data, uint8_t len, void* out, uint8_t outLen) while (!SI4463_READ_CTS);// {SHORT_DELAY; } // Wait for CTS SI_CS_LOW; #if 1 // Inline transfer - while (len-- > 0) { + while (len--){ while (SPI_TX_IS_NOT_EMPTY(SI4432_SPI)); SPI_WRITE_8BIT(SI4432_SPI, *ptr++); } while (SPI_IS_BUSY(SI4432_SPI)); #else - while (len-- > 0) + while (len--) shiftOut(*ptr++); // (pgm_read_byte(&((uint8_t*)data)[i])); #endif SI_CS_HIGH; @@ -747,7 +747,7 @@ void SI4463_do_api(void* data, uint8_t len, void* out, uint8_t outLen) #endif // Get response data ptr = (uint8_t *)out; - while (outLen-- > 0) { + while (outLen--){ #if 1 // Inline transfer SPI_WRITE_8BIT(SI4432_SPI, 0x00); while (SPI_RX_IS_EMPTY(SI4432_SPI)); //wait rx data in buffer @@ -755,9 +755,8 @@ void SI4463_do_api(void* data, uint8_t len, void* out, uint8_t outLen) #else *ptr++ = shiftIn(); #endif - SI_CS_HIGH; } -// __enable_irq(); + SI_CS_HIGH; } #ifdef notused @@ -967,22 +966,12 @@ void SI4463_start_rx(uint8_t CHANNEL) SI4463_set_state(SI446X_STATE_READY); } SI4463_refresh_gpio(); - - - - #if 0 { uint8_t data[] = { - 0x11, 0x10, 0x01, 0x03, 0xf0 - }; - SI4463_do_api(data, sizeof(data), NULL, 0); // Send PREAMBLE_CONFIG_STD_2 for long timeout - } - { - uint8_t data[] = - { - 0x11, 0x20, 0x01, 0x00, 0x09, // Restore OOK mode + 0x11, 0x20, 0x01, 0x00, + 0x0A, // Restore 2FSK mode }; SI4463_do_api(data, sizeof(data), NULL, 0); } @@ -1310,7 +1299,7 @@ void SI446x_Fill(int s, int start) systime_t measure = chVTGetSystemTimeX(); int i = start; while(SPI_RX_IS_NOT_EMPTY(SI4432_SPI)) (void)SPI_READ_8BIT(SI4432_SPI); // Remove lingering bytes -#if 1 +#if 0 while (!SI4463_READ_CTS); // Wait for CTS #endif __disable_irq(); @@ -1321,8 +1310,8 @@ void SI446x_Fill(int s, int start) if (t) my_microsecond_delay(t); #else -#if 1 - SI_CS_LOW; +#if 0 + SI_CS_LOW; SPI_WRITE_8BIT(SI4432_SPI, SI446X_CMD_ID_START_RX); while (SPI_IS_BUSY(SI4432_SPI)) ; // wait tx SPI_READ_8BIT(SI4432_SPI); // Skip command byte response From 09ab2f583cd357472c8ed6f0c828230d63c785c8 Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Sun, 2 May 2021 07:53:24 +0200 Subject: [PATCH 2/5] Reverted back to old si4468.c code --- nanovna.h | 1 + plot.c | 19 ++++++++++++++++++- sa_core.c | 7 ++++++- 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/nanovna.h b/nanovna.h index 734936f..941adb7 100644 --- a/nanovna.h +++ b/nanovna.h @@ -76,6 +76,7 @@ #define __LISTEN__ #define __CHANNEL_POWER__ #define __LIMITS__ +#define __MCU_CLOCK_SHIFT__ #ifdef TINYSA4 #define __HARMONIC__ #define __VBW__ diff --git a/plot.c b/plot.c index 810c6a5..60b6a4d 100644 --- a/plot.c +++ b/plot.c @@ -376,6 +376,23 @@ dBm_to_Watt(const float v) return logf(v*1000.0)*(10.0/logf(10.0)); } +static float fast_expf(float x) +{ + union { float f; int32_t i; } v; + v.i = (int32_t)(12102203.0f*x) + 0x3F800000; + int32_t m = (v.i >> 7) & 0xFFFF; // copy mantissa +#if 1 + // cubic spline approximation + // empirical values for small maximum relative error (8.34e-5): + v.i += ((((((((1277*m) >> 14) + 14825)*m) >> 14) - 79749)*m) >> 11) - 626; +#else + // quartic spline approximation + // empirical values for small maximum relative error (1.21e-5): + v.i += (((((((((((3537*m) >> 16) + 13668)*m) >> 18) + 15817)*m) >> 14) - 80470)*m) >> 11); +#endif + return v.f; +} + static void trace_into_index_x_array(index_x_t *x, uint16_t points){ // Not need update if index calculated for this points count @@ -417,7 +434,7 @@ trace_into_index_y_array(index_y_t *y, float *array, int points) int max = NGRIDY * GRIDY, i; for (i=0;i 40000000){ uint32_t tf = lf; + while (tf > 240000000) tf -= 240000000; // Wrap between 0-48MHz while (tf > 48000000) tf -= 48000000; // Wrap between 0-48MHz if (tf < 20000000 ) set_below = true; From f8148134eb41d92225724957a5ef73b55ac28042 Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Sun, 2 May 2021 08:13:16 +0200 Subject: [PATCH 3/5] DiSlord updates --- si4468.c | 43 +++++++++++++++++++++++++------------------ 1 file changed, 25 insertions(+), 18 deletions(-) diff --git a/si4468.c b/si4468.c index 646be8c..d90cca4 100644 --- a/si4468.c +++ b/si4468.c @@ -318,11 +318,12 @@ void ADF4351_WriteRegister32(int channel, const uint32_t value) // if (reg_dirty[value & 0x07] || (value & 0x07) == 0) { if (old_registers[value & 0x07] != registers[value & 0x07] || (value & 0x07) == 0 ) { registers[value & 0x07] = value; - for (int i = 3; i >= 0; i--) shiftOut((value >> (8 * i)) & 0xFF); - palSetLine(ADF4351_LE[channel]); - my_microsecond_delay(1); // Must palClearLine(ADF4351_LE[channel]); -// reg_dirty[value & 0x07] = false; + shiftOut((value >> 24) & 0xFF); + shiftOut((value >> 16) & 0xFF); + shiftOut((value >> 8) & 0xFF); + shiftOut((value >> 0) & 0xFF); + palSetLine(ADF4351_LE[channel]); old_registers[value & 0x07] = registers[value & 0x07]; } } @@ -332,11 +333,6 @@ void ADF4351_Set(int channel) set_SPI_mode(SPI_MODE_SI); if (SI4432_SPI_SPEED != ADF_SPI_SPEED) SPI_BR_SET(SI4432_SPI, ADF_SPI_SPEED); - -// my_microsecond_delay(1); - palClearLine(ADF4351_LE[channel]); -// my_microsecond_delay(1); - for (int i = 5; i >= 0; i--) { ADF4351_WriteRegister32(channel, registers[i]); } @@ -789,7 +785,7 @@ static void SI4463_set_properties(uint16_t prop, void* values, uint8_t len) #define GLOBAL_GPIO_PIN_CFG 0x13, 0x07, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00 #define GLOBAL_CLK_CFG 0x11, 0x00, 0x01, 0x01, 0x00 // ---------------------------------------------------------------------------------------------------- v ------------ RSSI control byte -#define GLOBAL_RF_MODEM_RAW_CONTROL 0x11, 0x20, 0x0A, 0x45, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x06, 0x03, 0x10, 0x40 +#define GLOBAL_RF_MODEM_RAW_CONTROL 0x11, 0x20, 0x0A, 0x45, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x06, 0x18, 0x10, 0x40 //0x11 SI446X_CMD_SET_PROPERTY //0x20 SI446X_PROP_GROUP_MODEM //0x0A 10 Count @@ -801,7 +797,7 @@ static void SI4463_set_properties(uint16_t prop, void* values, uint8_t len) //0x00 [0x49] MODEM_ANT_DIV_CONTROL //0xFF [0x4A] MODEM_RSSI_THRESH //0x06 [0x4B] MODEM_RSSI_JUMP_THRESH -//0x03 [0x4C] MODEM_RSSI_CONTROL +//0x18 [0x4C] MODEM_RSSI_CONTROL //0x10 [0x4D] MODEM_RSSI_CONTROL2 //0x40 [0x4E] MODEM_RSSI_COMP // -----------------------------------------------------------------------------------------------------^ -------------- @@ -966,12 +962,22 @@ void SI4463_start_rx(uint8_t CHANNEL) SI4463_set_state(SI446X_STATE_READY); } SI4463_refresh_gpio(); + + + + #if 0 { uint8_t data[] = { - 0x11, 0x20, 0x01, 0x00, - 0x0A, // Restore 2FSK mode + 0x11, 0x10, 0x01, 0x03, 0xf0 + }; + SI4463_do_api(data, sizeof(data), NULL, 0); // Send PREAMBLE_CONFIG_STD_2 for long timeout + } + { + uint8_t data[] = + { + 0x11, 0x20, 0x01, 0x00, 0x09, // Restore OOK mode }; SI4463_do_api(data, sizeof(data), NULL, 0); } @@ -1299,7 +1305,7 @@ void SI446x_Fill(int s, int start) systime_t measure = chVTGetSystemTimeX(); int i = start; while(SPI_RX_IS_NOT_EMPTY(SI4432_SPI)) (void)SPI_READ_8BIT(SI4432_SPI); // Remove lingering bytes -#if 0 +#if 1 while (!SI4463_READ_CTS); // Wait for CTS #endif __disable_irq(); @@ -1310,7 +1316,7 @@ void SI446x_Fill(int s, int start) if (t) my_microsecond_delay(t); #else -#if 0 +#if 1 SI_CS_LOW; SPI_WRITE_8BIT(SI4432_SPI, SI446X_CMD_ID_START_RX); while (SPI_IS_BUSY(SI4432_SPI)) ; // wait tx @@ -1657,9 +1663,10 @@ freq_t SI4463_set_freq(freq_t freq) #endif } else return 0; - - si_set_offset(0); - + if (SI4463_offset_active) { + si_set_offset(0); + SI4463_offset_active = false; + } uint32_t R = (freq * SI4463_outdiv) / (Npresc ? 2*config.setting_frequency_30mhz : 4*config.setting_frequency_30mhz) - 1; // R between 0x00 and 0x7f (127) uint64_t MOD = 524288; // = 2^19 uint32_t F = ((freq * SI4463_outdiv*MOD) / (Npresc ? 2*config.setting_frequency_30mhz : 4*config.setting_frequency_30mhz)) - R*MOD; From f524fc0da06a8f0d765611c974318fa8262b47ab Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Sun, 2 May 2021 09:06:35 +0200 Subject: [PATCH 4/5] Code cleaning --- si4468.c | 259 ++++++++++++------------------------------------------- 1 file changed, 56 insertions(+), 203 deletions(-) diff --git a/si4468.c b/si4468.c index d90cca4..80aeb92 100644 --- a/si4468.c +++ b/si4468.c @@ -163,35 +163,13 @@ void PE4302_init(void) { } #define PE4302_DELAY 100 -#if 0 -void PE4302_shiftOut(uint8_t val) -{ - uint8_t i; - SI4432_log(SI4432_Sel); - SI4432_log(val); - for (i = 0; i < 8; i++) { - if (val & (1 << (7 - i))) - SPI1_SDI_HIGH; - else - SPI1_SDI_LOW; -// my_microsecond_delay(PE4302_DELAY); - SPI1_CLK_HIGH; -// my_microsecond_delay(PE4302_DELAY); - SPI1_CLK_LOW; -// my_microsecond_delay(PE4302_DELAY); - } -} -#endif static unsigned char old_attenuation = 255; bool PE4302_Write_Byte(unsigned char DATA ) { if (old_attenuation == DATA) return false; -// my_microsecond_delay(PE4302_DELAY); -// SPI1_CLK_LOW; -// my_microsecond_delay(PE4302_DELAY); -// PE4302_shiftOut(DATA); + old_attenuation = DATA; set_SPI_mode(SPI_MODE_SI); if (SI4432_SPI_SPEED != PE_SPI_SPEED) @@ -224,15 +202,9 @@ bool PE4302_Write_Byte(unsigned char DATA ) #define CS_ADF0_LOW palClearLine(LINE_LO_SEL) #define CS_ADF1_LOW palClearLine(LINE_LO_SEL) -//uint32_t t_R[6] = {0x320000, 0x8008011, 0x4E42, 0x4B3,0x8C803C , 0x580005} ; //25 MHz ref -#ifdef TINYSA4_PROTO uint32_t registers[6] = {0xC80000, 0x8008011, 0x1800C642, 0x48963,0xA5003C , 0x580005} ; //10 MHz ref -#else -uint32_t registers[6] = {0xA00000, 0x8000011, 0x4E42, 0x4B3,0xDC003C , 0x580005} ; //10 MHz ref -#endif uint32_t old_registers[6]; -bool reg_dirty[6] = {true, true, true, true, true, true}; int debug = 0; ioline_t ADF4351_LE[2] = { LINE_LO_SEL, LINE_LO_SEL}; //int ADF4351_Mux = 7; @@ -246,29 +218,15 @@ bool ADF4351_frequency_changed = false; #define DEBUG(X) #define DEBUGLN(X) -#ifdef TINYSA4_PROTO -#define XTAL 29999960 -#else -#define XTAL 26000000 -#endif -//double RFout; //Output freq in MHz +#define XTAL 30000000 uint64_t PFDRFout[6] = {XTAL,XTAL,XTAL,10000000,10000000,10000000}; //Reference freq in MHz -//uint64_t Chrystal[6] = {XTAL,XTAL,XTAL,10000000,10000000,10000000}; -//double FRACF; // Temp int64_t -// INTA, // Temp ADF4350_modulo = 0, // Linked to spur table!!!!! -// MOD, -// FRAC, //Temp target_freq; -uint8_t OutputDivider; // Temp -uint8_t lock=2; //Not used int old_R = 0; -// Lock = A4 - void ADF4351_Setup(void) { // palSetPadMode(GPIOA, 1, PAL_MODE_OUTPUT_PUSHPULL ); @@ -297,26 +255,11 @@ void ADF4351_Setup(void) ADF4351_mux(2); // No led // ADF4351_mux(6); // Show lock on led -// ADF4351_set_frequency(1,150000000,0); -// ADF4351_Set(0); -// ADF4351_Set(1); -// chThdSleepMilliseconds(1000); -// } -// bitSet (registers[2], 17); // R set to 8 -// bitClear (registers[2], 14); // R set to 8 -// for (int i=0; i<6; i++) pinMode(ADF4351_LE[i], OUTPUT); // Setup pins -// for (int i=0; i<6; i++) digitalWrite(ADF4351_LE[i], HIGH); -// pinMode(ADF4351_Mux, INPUT); -// SPI.begin(); // Init SPI bus -// SPI.beginTransaction(SPISettings(8000000, MSBFIRST, SPI_MODE0)); - //SPI.setDataMode(SPI_MODE0); // CPHA = 0 Clock positive - //SPI.setBitOrder(MSBFIRST); } void ADF4351_WriteRegister32(int channel, const uint32_t value) { -// if (reg_dirty[value & 0x07] || (value & 0x07) == 0) { - if (old_registers[value & 0x07] != registers[value & 0x07] || (value & 0x07) == 0 ) { + if (old_registers[value & 0x07] != registers[value & 0x07] || (value & 0x07) == 0 ) { // Always write register zero registers[value & 0x07] = value; palClearLine(ADF4351_LE[channel]); shiftOut((value >> 24) & 0xFF); @@ -344,7 +287,6 @@ static freq_t prev_actual_freq = 0; void ADF4351_force_refresh(void) { prev_actual_freq = 0; -// old_R = -1; // Force updating from config.actual_frequency_30MHz } void ADF4351_modulo(int m) @@ -355,20 +297,12 @@ void ADF4351_modulo(int m) uint64_t ADF4351_set_frequency(int channel, uint64_t freq) // freq / 10Hz { -// freq -= 71000; -// SI4463_set_gpio(3,GPIO_HIGH); - -// uint32_t offs = ((freq / 1000)* ( 0) )/ 1000; - uint32_t offs = 0; - uint64_t actual_freq = ADF4351_prepare_frequency(channel,freq + offs); -// SI4463_set_gpio(3,GPIO_LOW); + uint64_t actual_freq = ADF4351_prepare_frequency(channel,freq); if (actual_freq != prev_actual_freq) { -//START_PROFILE; ADF4351_frequency_changed = true; ADF4351_Set(channel); prev_actual_freq = actual_freq; } -//STOP_PROFILE; return actual_freq; } @@ -383,7 +317,6 @@ void ADF4351_spur_mode(int S) bitSet (registers[2], 30); // R set to 8 else bitClear (registers[2], 30); // R set to 8 - reg_dirty[2] = true; ADF4351_Set(0); } @@ -410,7 +343,6 @@ void ADF4351_R_counter(int R) clear_frequency_cache(); // When R changes the possible frequencies will change registers[2] &= ~ (((unsigned long)0x3FF) << 14); registers[2] |= (((unsigned long)R) << 14); - reg_dirty[2] = true; ADF4351_Set(0); } @@ -427,7 +359,6 @@ void ADF4351_mux(int R) { registers[2] &= ~ (((unsigned long)0x7) << 26); registers[2] |= (((unsigned long)R & (unsigned long)0x07) << 26); - reg_dirty[2] = true; ADF4351_Set(0); } @@ -435,7 +366,6 @@ void ADF4351_csr(int c) { registers[3] &= ~ (((unsigned long)0x1) << 18); registers[3] |= (((unsigned long)c & (unsigned long)0x01) << 18); - reg_dirty[3] = true; ADF4351_Set(0); } @@ -443,7 +373,6 @@ void ADF4351_fastlock(int c) { registers[3] &= ~ (((unsigned long)0x3) << 15); registers[3] |= (((unsigned long)c & (unsigned long)0x03) << 15); - reg_dirty[3] = true; ADF4351_Set(0); } @@ -451,7 +380,6 @@ void ADF4351_CP(int p) { registers[2] &= ~ (((unsigned long)0xF) << 9); registers[2] |= (((unsigned long)p) << 9); - reg_dirty[2] = true; ADF4351_Set(0); } @@ -460,7 +388,6 @@ void ADF4351_drive(int p) p &= 0x03; registers[4] &= ~ (((unsigned long)0x3) << 3); registers[4] |= (((unsigned long)p) << 3); - reg_dirty[4] = true; ADF4351_Set(0); } @@ -469,7 +396,6 @@ void ADF4351_aux_drive(int p) p &= 0x03; registers[4] &= ~ (((unsigned long)0x3) << 6); registers[4] |= (((unsigned long)p) << 6); - reg_dirty[4] = true; ADF4351_Set(0); } #if 0 @@ -487,6 +413,7 @@ static uint32_t gcd(uint32_t x, uint32_t y) uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz { + uint8_t OutputDivider; target_freq = freq; if (freq >= 2200000000) { OutputDivider = 1; @@ -514,7 +441,6 @@ uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz bitWrite (registers[4], 21, 0); bitWrite (registers[4], 20, 0); } - reg_dirty[4] = true; uint32_t PFDR = (uint32_t)PFDRFout[channel]; uint32_t MOD = ADF4350_modulo; @@ -561,13 +487,11 @@ uint64_t ADF4351_prepare_frequency(int channel, uint64_t freq) // freq / 10Hz registers[0] = 0; registers[0] = INTA << 15; // OK registers[0] = registers[0] + (FRAC << 3); - reg_dirty[0] = true; if (MOD == 1) MOD = 2; registers[1] = 0; registers[1] = MOD << 3; - registers[1] = registers[1] + 1 ; // restore address "001" + registers[1] = registers[1] + 1 ; // restore register address "001" bitSet (registers[1], 27); // Prescaler at 8/9 - reg_dirty[1] = true; return actual_freq; } @@ -577,7 +501,6 @@ void ADF4351_enable(int s) bitClear(registers[4], 11); // Inverse logic!!!!! else bitSet(registers[4], 11); - reg_dirty[4] = true; ADF4351_Set(0); } @@ -587,7 +510,6 @@ void ADF4351_enable_aux_out(int s) bitSet(registers[4], 8); else bitClear(registers[4], 8); - reg_dirty[4] = true; ADF4351_Set(0); } @@ -602,8 +524,6 @@ void ADF4351_enable_out(int s) bitSet(registers[2], 5); // Enable power down bitSet(registers[2], 11); // Enable VCO power down } - reg_dirty[2] = true; - reg_dirty[4] = true; ADF4351_Set(0); } @@ -631,8 +551,7 @@ static void SI4463_set_state(si446x_state_t); static int SI4463_wait_for_cts(void) { -// set_SPI_mode(SPI_MODE_SI); - while (!SI4463_READ_CTS) { + while (!SI4463_READ_CTS) { //CTS is read through GPIO // chThdSleepMicroseconds(100); my_microsecond_delay(1); } @@ -834,13 +753,6 @@ static uint8_t gpio_state[4] = { 7,8,0,0 }; void SI4463_refresh_gpio(void) { -#ifndef TINYSA4_PROTO // Force clock to max frequency for ADF - uint8_t data[] = - { - 0x11, 0x00, 0x01, 0x01, 0x40 // GLOBAL_CLK_CFG Enable divided clock - }; - SI4463_do_api(data, sizeof(data), NULL, 0); -#endif uint8_t data2[] = { 0x13, gpio_state[0], gpio_state[1], gpio_state[2], gpio_state[3], 0, 0, 0 @@ -944,7 +856,7 @@ void SI4463_start_tx(uint8_t CHANNEL) } SI4463_in_tx_mode = true; my_microsecond_delay(1000); -#if 0 +#if 0 // Check state for debugging s = SI4463_get_state(); if (s != SI446X_STATE_TX){ my_microsecond_delay(1000); @@ -964,8 +876,6 @@ void SI4463_start_rx(uint8_t CHANNEL) SI4463_refresh_gpio(); - - #if 0 { uint8_t data[] = @@ -995,7 +905,7 @@ void SI4463_start_rx(uint8_t CHANNEL) //retry: SI4463_do_api(data, sizeof(data), NULL, 0); -#if 0 +#if 0 // Get state for debugging si446x_state_t s = SI4463_get_state(); if (s != SI446X_STATE_RX) { my_microsecond_delay(1000); @@ -1003,7 +913,7 @@ void SI4463_start_rx(uint8_t CHANNEL) } #endif { - uint8_t data2[] = { 0x11, 0x20, 0x01, 0x58, 0x10 }; // set FAST_DELAY to 0x10 + uint8_t data2[] = { 0x11, 0x20, 0x01, 0x58, 0x10 }; // set FAST_DELAY to 0x10, SI4463_do_api(data2, sizeof(data2), NULL, 0); } SI4463_in_tx_mode = false; @@ -1031,48 +941,44 @@ void SI4463_clear_int_status(void) void set_calibration_freq(int ref) { -#ifndef TINYSA4_PROTO - ref = 0; // <--------------------- DISABLED FOR PROTOTYPE!!!!!!!!!!!!!!!!!!!!!!!!! -#endif + if (ref >= 0) { + SI4463_set_gpio(0, 7); // GPIO 0 is clock out - if (ref >= 0) { - SI4463_set_gpio(0, 7); // GPIO 0 is clock out - - uint8_t data2[5] = { + uint8_t data2[5] = { 0x11, 0x00, 0x01, 0x01, 0x40 // GLOBAL_CLK_CFG Clock config - }; - data2[4] |= ref<<3; - SI4463_do_api(data2, 5, NULL, 0); - } else { - SI4463_set_gpio(0, 1); // stop clock out - } + }; + data2[4] |= ref<<3; + SI4463_do_api(data2, 5, NULL, 0); + } else { + SI4463_set_gpio(0, 1); // stop clock out + } } si446x_info_t SI4463_info; void Si446x_getInfo(si446x_info_t* info) { - uint8_t data[8] = { - SI446X_CMD_PART_INFO - }; - SI4463_do_api(data, 1, data, 8); + uint8_t data[8] = { + SI446X_CMD_PART_INFO + }; + SI4463_do_api(data, 1, data, 8); - info->chipRev = data[0]; - info->part = (data[1]<<8) | data[2]; - info->partBuild = data[3]; - info->id = (data[4]<<8) | data[5]; - info->customer = data[6]; - info->romId = data[7]; + info->chipRev = data[0]; + info->part = (data[1]<<8) | data[2]; + info->partBuild = data[3]; + info->id = (data[4]<<8) | data[5]; + info->customer = data[6]; + info->romId = data[7]; - data[0] = SI446X_CMD_FUNC_INFO; - SI4463_do_api(data, 1, data, 6); + data[0] = SI446X_CMD_FUNC_INFO; + SI4463_do_api(data, 1, data, 6); - info->revExternal = data[0]; - info->revBranch = data[1]; - info->revInternal = data[2]; - info->patch = (data[3]<<8) | data[4]; - info->func = data[5]; + info->revExternal = data[0]; + info->revBranch = data[1]; + info->revInternal = data[2]; + info->patch = (data[3]<<8) | data[4]; + info->func = data[5]; } float old_temp = -100; @@ -1080,18 +986,18 @@ float old_temp = -100; float Si446x_get_temp(void) { - uint8_t data[8] = { SI446X_CMD_GET_ADC_READING, 0x10, 0 }; - SI4463_do_api(data, 3, data, 8); - int i = 4; - if (data[0]==255) - i = 6; - float t = (data[i] << 8) + data[i+1]; - t = (899.0 * t /4096.0) - 293.0; - if (t > old_temp - TEMP_HISTERESE && t < old_temp + TEMP_HISTERESE) { - return(old_temp); - } - old_temp = t; - return t; + uint8_t data[8] = { SI446X_CMD_GET_ADC_READING, 0x10, 0 }; + SI4463_do_api(data, 3, data, 8); + int i = 4; + if (data[0]==255) + i = 6; + float t = (data[i] << 8) + data[i+1]; + t = (899.0 * t /4096.0) - 293.0; + if (t > old_temp - TEMP_HISTERESE && t < old_temp + TEMP_HISTERESE) { + return(old_temp); + } + old_temp = t; + return t; } #ifdef notused @@ -1134,10 +1040,12 @@ again: SI4463_wait_for_cts(); uint8_t state = getFRR(SI446X_CMD_READ_FRR_B); #endif +#if 0 // Only for debugging if (state == 255) { my_microsecond_delay(100); goto again; } +#endif if(state == SI446X_STATE_TX_TUNE) state = SI446X_STATE_TX; else if(state == SI446X_STATE_RX_TUNE) @@ -1638,7 +1546,7 @@ static int refresh_count = 0; freq_t SI4463_set_freq(freq_t freq) { -// SI4463_set_gpio(3,GPIO_HIGH); +// SI4463_set_gpio(3,GPIO_HIGH); // For measuring duration of set_freq int S = 4 ; // Approx 100 Hz channels SI4463_channel = 0; if (freq >= 822000000 && freq <= 1130000000) { // 822 to 1130MHz @@ -1671,7 +1579,7 @@ freq_t SI4463_set_freq(freq_t freq) uint64_t MOD = 524288; // = 2^19 uint32_t F = ((freq * SI4463_outdiv*MOD) / (Npresc ? 2*config.setting_frequency_30mhz : 4*config.setting_frequency_30mhz)) - R*MOD; freq_t actual_freq = (R*MOD + F) * (Npresc ? 2*config.setting_frequency_30mhz : 4*config.setting_frequency_30mhz)/ SI4463_outdiv/MOD; -#if 0 +#if 0 // Only for debugging int delta = freq - actual_freq; if (delta < -100 || delta > 100 ){ while(1) @@ -1712,7 +1620,7 @@ freq_t SI4463_set_freq(freq_t freq) SI4463_do_api(data, sizeof(data), NULL, 0); } SI4463_frequency_changed = true; -// SI4463_set_gpio(3,GPIO_LOW); +// SI4463_set_gpio(3,GPIO_LOW); // For measuring duration of set_freq return actual_freq; } #if 0 @@ -1779,16 +1687,13 @@ freq_t SI4463_set_freq(freq_t freq) } - - - // SI4463_clear_int_status(); if (SI4463_in_tx_mode) SI4463_start_tx(0); else { SI4463_start_rx(SI4463_channel); } - SI4463_wait_for_cts(); -// SI4463_set_gpio(3,GPIO_LOW); +// SI4463_wait_for_cts(); +// SI4463_set_gpio(3,GPIO_LOW); // For measuring duration of set_freq SI4463_frequency_changed = true; prev_band = SI4463_band; return actual_freq; @@ -1803,71 +1708,26 @@ void SI4463_init_rx(void) my_microsecond_delay(1000); SI_SDN_LOW; my_microsecond_delay(1000); -#ifdef __SI4468__ for(uint16_t i=0;i Date: Sun, 2 May 2021 09:29:19 +0200 Subject: [PATCH 5/5] Scanning speed restored --- si4468.c | 28 +++++++++------------------- 1 file changed, 9 insertions(+), 19 deletions(-) diff --git a/si4468.c b/si4468.c index 80aeb92..9df633f 100644 --- a/si4468.c +++ b/si4468.c @@ -912,10 +912,12 @@ void SI4463_start_rx(uint8_t CHANNEL) goto retry; } #endif +#if 0 { uint8_t data2[] = { 0x11, 0x20, 0x01, 0x58, 0x10 }; // set FAST_DELAY to 0x10, SI4463_do_api(data2, sizeof(data2), NULL, 0); } +#endif SI4463_in_tx_mode = false; } @@ -1542,8 +1544,6 @@ uint16_t set_rbw(uint16_t WISH) { #define Npresc 1 // 0=low / 1=High performance mode -static int refresh_count = 0; - freq_t SI4463_set_freq(freq_t freq) { // SI4463_set_gpio(3,GPIO_HIGH); // For measuring duration of set_freq @@ -1590,12 +1590,14 @@ freq_t SI4463_set_freq(freq_t freq) my_microsecond_delay(10); } #endif - if (false && (SI4463_band == prev_band)) { + +#if 0 // Hopping is fast but frequency setting is not yet reliable !!!!! + if (SI4463_band == prev_band) { int vco = 2091 + ((((freq / 4 ) * SI4463_outdiv - 850000000)/1000) * 492) / 200000; if (SI4463_in_tx_mode) { uint8_t data[] = { - 0x37, + SI446X_CMD_ID_TX_HOP, (uint8_t) R, // R data[4] (uint8_t) ((F>>16) & 255), // F2,F1,F0 data[5] .. data[7] (uint8_t) ((F>> 8) & 255), // F2,F1,F0 data[5] .. data[7] @@ -1609,7 +1611,7 @@ freq_t SI4463_set_freq(freq_t freq) } else { uint8_t data[] = { - 0x36, + SI446X_CMD_ID_RX_HOP, (uint8_t) R, // R data[4] (uint8_t) ((F>>16) & 255), // F2,F1,F0 data[5] .. data[7] (uint8_t) ((F>> 8) & 255), // F2,F1,F0 data[5] .. data[7] @@ -1623,15 +1625,8 @@ freq_t SI4463_set_freq(freq_t freq) // SI4463_set_gpio(3,GPIO_LOW); // For measuring duration of set_freq return actual_freq; } -#if 0 - static int old_R = -1; // What about TX/RX switching? - static int old_F = -1; - if (old_R == R || old_F == F) - return; - old_R = R; - old_F = f; #endif - refresh_count=0; + SI4463_set_state(SI446X_STATE_READY); /* @@ -1682,20 +1677,15 @@ freq_t SI4463_set_freq(freq_t freq) 0x10 + (uint8_t)(SI4463_band + (Npresc ? 0x08 : 0)) // 0x08 for high performance mode, 0x10 to skip recal }; SI4463_do_api(data2, sizeof(data2), NULL, 0); - SI4463_frequency_changed = true; -// my_microsecond_delay(30000); + prev_band = SI4463_band; } - - if (SI4463_in_tx_mode) SI4463_start_tx(0); else { SI4463_start_rx(SI4463_channel); } -// SI4463_wait_for_cts(); // SI4463_set_gpio(3,GPIO_LOW); // For measuring duration of set_freq SI4463_frequency_changed = true; - prev_band = SI4463_band; return actual_freq; }