From 8edff4d95b9c1eade39e6a037638e2df35f2ee98 Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Sat, 26 Dec 2020 14:46:03 +0100 Subject: [PATCH] Offset working and freq checked --- nanovna.h | 22 +++++++++ radio_config_Si4468_100kHz.h | 2 +- radio_config_Si4468_10kHz.h | 2 +- radio_config_Si4468_1kHz.h | 2 +- radio_config_Si4468_200Hz.h | 2 +- radio_config_Si4468_300kHz.h | 2 +- radio_config_Si4468_30kHz.h | 2 +- radio_config_Si4468_3kHz.h | 2 +- radio_config_Si4468_850kHz.h | 2 +- radio_config_Si4468_default.h | 2 +- sa_cmd.c | 17 ++++--- sa_core.c | 87 ++++++++++++++++++++++++++++++----- si4432.c | 51 +++++++++++++++++--- si4432.h | 3 ++ 14 files changed, 164 insertions(+), 34 deletions(-) diff --git a/nanovna.h b/nanovna.h index 912a97c..ea9e8fc 100644 --- a/nanovna.h +++ b/nanovna.h @@ -290,6 +290,7 @@ void set_measurement(int); // extern int settingSpeed; //extern int setting.step_delay; void sweep_remote(void); +extern void set_modulo(uint32_t f); #ifdef __AUDIO__ /* * dsp.c @@ -1130,4 +1131,25 @@ enum { T_AUTO, T_NORMAL, T_SINGLE, T_DONE, T_UP, T_DOWN, T_MODE, T_PRE, T_POST, T_MID }; +// si4432.c + +extern void ADF4351_mux(int R); +extern void ADF4351_force_refresh(void); +extern void ADF4351_CP(int p); +extern int SI4463_R; +extern volatile int64_t ADF4350_modulo; +extern void SI446x_set_AGC_LNA(uint8_t v); +extern void SI4463_init_rx(void); +extern void SI4463_init_tx(void); +extern void SI4463_start_tx(uint8_t CHANNEL); +extern void SI4463_set_output_level(int t); +extern void SI4463_set_freq(uint32_t freq); +extern uint16_t set_rbw(uint16_t rbw_x10); +extern uint16_t force_rbw(int f); +extern void SI4463_do_api(void* data, uint8_t len, void* out, uint8_t outLen); +extern void SI4463_set_gpio(int i, int s); +extern void si_set_offset(int16_t offset); +extern int SI4463_offset_changed; + + /*EOF*/ diff --git a/radio_config_Si4468_100kHz.h b/radio_config_Si4468_100kHz.h index e90db41..ad1e906 100644 --- a/radio_config_Si4468_100kHz.h +++ b/radio_config_Si4468_100kHz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xBE, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xBE, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_10kHz.h b/radio_config_Si4468_10kHz.h index e610ad1..143e2b4 100644 --- a/radio_config_Si4468_10kHz.h +++ b/radio_config_Si4468_10kHz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xC7, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xC7, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_1kHz.h b/radio_config_Si4468_1kHz.h index 7a54c1d..f0fd906 100644 --- a/radio_config_Si4468_1kHz.h +++ b/radio_config_Si4468_1kHz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0x87, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0x87, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_200Hz.h b/radio_config_Si4468_200Hz.h index fc845fc..497adae 100644 --- a/radio_config_Si4468_200Hz.h +++ b/radio_config_Si4468_200Hz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x00, 0xFC, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x00, 0xFC, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_300kHz.h b/radio_config_Si4468_300kHz.h index ccddc9f..dda35a7 100644 --- a/radio_config_Si4468_300kHz.h +++ b/radio_config_Si4468_300kHz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x00, 0xDB, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x00, 0xDB, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_30kHz.h b/radio_config_Si4468_30kHz.h index 4fe7b04..999a9bd 100644 --- a/radio_config_Si4468_30kHz.h +++ b/radio_config_Si4468_30kHz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xEC, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xEC, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_3kHz.h b/radio_config_Si4468_3kHz.h index f961d92..c445e9b 100644 --- a/radio_config_Si4468_3kHz.h +++ b/radio_config_Si4468_3kHz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xB8, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0xB8, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_850kHz.h b/radio_config_Si4468_850kHz.h index 9408e14..f8a4f6b 100644 --- a/radio_config_Si4468_850kHz.h +++ b/radio_config_Si4468_850kHz.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0x9A, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0x9A, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/radio_config_Si4468_default.h b/radio_config_Si4468_default.h index 6e9823d..d18cde7 100644 --- a/radio_config_Si4468_default.h +++ b/radio_config_Si4468_default.h @@ -575,7 +575,7 @@ // MODEM_AFC_LIMITER_0 - Set the AFC limiter value. // MODEM_AFC_MISC - Specifies miscellaneous AFC control bits. */ -#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0x92, 0xA0 +#define RF_MODEM_AFC_LIMITER_1_3_1 0x11, 0x20, 0x03, 0x30, 0x01, 0x92, 0x00 /* // Set properties: RF_MODEM_AGC_CONTROL_1_1 diff --git a/sa_cmd.c b/sa_cmd.c index 93cc561..aeb24aa 100644 --- a/sa_cmd.c +++ b/sa_cmd.c @@ -355,18 +355,14 @@ VNA_SHELL_FUNCTION(cmd_v) VNA_SHELL_FUNCTION(cmd_y) { - int rvalue; - uint8_t data[16]; if (argc < 1) { shell_printf("usage: y {addr(0-FF)} [value(0-FF)]+\r\n"); return; } - data[0] = xtoi(argv[0]); - for (int i=1; i < argc; i++) { - data[i] = xtoi(argv[i]); - } #ifdef __SI4432__ int lvalue = 0; + int rvalue; + rvalue = xtoi(argv[0]); SI4432_Sel = VFO; if (argc == 2){ lvalue = my_atoui(argv[1]); @@ -377,6 +373,11 @@ VNA_SHELL_FUNCTION(cmd_y) } #endif #ifdef __SI4463__ + uint8_t data[16]; + data[0] = xtoi(argv[0]); + for (int i=1; i < argc; i++) { + data[i] = xtoi(argv[i]); + } SI4463_do_api(data, argc, data, 16); for (int i=0; i<16; i++) shell_printf("%02x ", data[i]); @@ -473,9 +474,11 @@ VNA_SHELL_FUNCTION(cmd_x) VNA_SHELL_FUNCTION(cmd_i) { - int rvalue; + (void)argc; + (void)argv; return; // Don't use!!!! #ifdef __SI4432__ +int rvalue; SI4432_Init(); shell_printf("SI4432 init done\r\n"); if (argc == 1) { diff --git a/sa_core.c b/sa_core.c index 017b765..5a6e895 100644 --- a/sa_core.c +++ b/sa_core.c @@ -1070,11 +1070,11 @@ void calculate_step_delay(void) if (actual_rbw_x10 >= 8500) { SI4432_step_delay = 300; SI4432_offset_delay = 100; } else if (actual_rbw_x10 >= 3000) { SI4432_step_delay = 300; SI4432_offset_delay = 100; } else if (actual_rbw_x10 >= 1000) { SI4432_step_delay = 300; SI4432_offset_delay = 100; } - else if (actual_rbw_x10 >= 300) { SI4432_step_delay = 1000; SI4432_offset_delay = 100; } - else if (actual_rbw_x10 >= 100) { SI4432_step_delay = 1400; SI4432_offset_delay = 100; } - else if (actual_rbw_x10 >= 30) { SI4432_step_delay = 2500; SI4432_offset_delay = 100; } - else if (actual_rbw_x10 >= 10) { SI4432_step_delay = 7000; SI4432_offset_delay = 100; } - else { SI4432_step_delay = 15000; SI4432_offset_delay =1600; } + else if (actual_rbw_x10 >= 300) { SI4432_step_delay = 1000; SI4432_offset_delay = 30; } + else if (actual_rbw_x10 >= 100) { SI4432_step_delay = 1400; SI4432_offset_delay = 500; } + else if (actual_rbw_x10 >= 30) { SI4432_step_delay = 2500; SI4432_offset_delay = 800; } + else if (actual_rbw_x10 >= 10) { SI4432_step_delay = 7000; SI4432_offset_delay = 2500; } + else { SI4432_step_delay = 15000; SI4432_offset_delay =5000; } #endif if (setting.step_delay_mode == SD_PRECISE) // In precise mode wait twice as long for RSSI to stabalize SI4432_step_delay *= 2; @@ -1314,10 +1314,61 @@ void set_freq(int V, unsigned long freq) // translate the requested frequency } } else if (V==ADF4351_LO2){ real_old_freq[V] = ADF4351_set_frequency(V-ADF4351_LO, freq); - } else - if (V==SI4463_RX) { - SI4463_set_freq(freq); + } else if (V==SI4463_RX) { + if (setting.step_delay_mode == SD_FAST) { // If in extra fast scanning mode and NOT SI4432_RX !!!!!! + int delta = freq - real_old_freq[V]; +//#define OFFSET_STEP 14.30555 +#define OFFSET_STEP 12.3981 +#define OFFSET_RANGE 937500 // Hz + if (real_old_freq[V] >= 480000000) // 480MHz, high band + delta = delta >> 1; + delta = ((float)delta) / OFFSET_STEP; // Calculate and set the offset register i.s.o programming a new frequency + if (delta > - 0x6fff && delta < 0x6fff) { // and requested frequency can easily be reached by using the offset registers +#if 0 + if (real_old_freq[V] >= 480000000) + shell_printf("%d: Offs %q HW %d\r\n", SI4432_Sel, (uint32_t)(real_old_freq[V]+delta*2), real_old_freq[V]); + else + shell_printf("%d: Offs %q HW %d\r\n", SI4432_Sel, (uint32_t)(real_old_freq[V]+delta*1), real_old_freq[V]); +#endif + si_set_offset(delta); // Signal offset changed so RSSI retrieval is delayed for frequency settling + old_freq[V] = freq; + } else { +#ifdef __WIDE_OFFSET__ + uint32_t target_f = freq; // Impossible to use offset so set SI4432 to new frequency +#if 0 + if (freq < real_old_freq[V]) { // sweeping down + if (freq - OFFSET_RANGE >= 480000000) { + target_f = freq - OFFSET_RANGE*2; + } else { + target_f = freq - OFFSET_RANGE; + } + SI4463_set_freq(target_f); + si_set_offset(0x7fff); // set offset to most positive + real_old_freq[V] = target_f; + } else { // sweeping up + if (freq + OFFSET_RANGE >= 480000000) { + target_f = freq + OFFSET_RANGE*2; + } else { + target_f = freq + OFFSET_RANGE; + } +#else + { +#endif + SI4463_set_freq(target_f); // Also sets offset to zero + real_old_freq[V] = target_f; + } +#else + SI4432_Set_Frequency(freq); // Impossible to use offset so set SI4432 to new frequency + SI4432_Write_2_Byte(SI4432_FREQ_OFFSET1, 0, 0); // set offset to zero +// SI4432_Write_Byte(SI4432_FREQ_OFFSET2, 0); + real_old_freq[V] = freq; +#endif + } + } else { + SI4463_set_freq(freq); // Not in fast mode + real_old_freq[V] = freq; } + } old_freq[V] = freq; } @@ -1499,6 +1550,7 @@ void update_rbw(void) // calculate the actual_rbw and the vbwSteps (# { if (!MODE_INPUT(setting.mode)) { vbwSteps = 1; + actual_rbw_x10 = 1; // To force substepping of the SI4463 return; } if (setting.frequency_step > 0 && MODE_INPUT(setting.mode)) { @@ -1509,10 +1561,15 @@ void update_rbw(void) // calculate the actual_rbw and the vbwSteps (# uint32_t temp_actual_rbw_x10 = setting.rbw_x10; // requested rbw , 32 bit !!!!!! if (temp_actual_rbw_x10 == 0) { // if auto rbw if (setting.step_delay_mode==SD_FAST) { // if in fast scanning +#ifdef __SI4432__ if (setting.fast_speedup > 2) temp_actual_rbw_x10 = 6*setting.vbw_x10; // rbw is six times the frequency step to ensure no gaps in coverage as there are some weird jumps else temp_actual_rbw_x10 = 4*setting.vbw_x10; // rbw is four times the frequency step to ensure no gaps in coverage as there are some weird jumps +#endif +#ifdef __SI4463__ + temp_actual_rbw_x10 = setting.vbw_x10; +#endif } else temp_actual_rbw_x10 = 2*setting.vbw_x10; // rbw is twice the frequency step to ensure no gaps in coverage } @@ -2116,11 +2173,12 @@ modulation_again: } else if (setting.mode == M_HIGH) { set_freq (SI4463_RX, lf); // sweep RX, local_IF = 0 in high mode } else if (setting.mode == M_GENHIGH) { -#if 1 // Let SI TX only +#if 0 // Let SI TX only set_freq (SI4463_RX, lf); // sweep RX, local_IF = 0 in high mode local_IF = 0; #else set_freq (ADF4351_LO, lf); // sweep LO, local_IF = 0 in high mode + local_IF = lf; #endif } // STOP_PROFILE; @@ -2195,7 +2253,7 @@ modulation_again: if (i == 0 && setting.frequency_step == 0 && setting.trigger != T_AUTO) { // if in zero span mode and wait for trigger to happen and NOT in trigger mode -#if 1 +#if 0 volatile uint8_t trigger_lvl = PURE_TO_DEVICE_RSSI((int16_t)((float_TO_PURE_RSSI(setting.trigger_level) - correct_RSSI - correct_RSSI_freq))); SI4432_trigger_fill(MODE_SELECT(setting.mode), trigger_lvl, (setting.trigger_direction == T_UP), setting.trigger_mode); #else @@ -2258,6 +2316,11 @@ modulation_again: #ifdef __SI4463__ pureRSSI = Si446x_RSSI(); #endif +//#define __DEBUG_FREQUENCY_SETTING__ +#ifdef __DEBUG_FREQUENCY_SETTING__ // For debugging the frequency calculation + stored_t[i] = -60.0 + (real_old_freq[ADF4351_LO] - f - old_freq[2])/10; +#endif + } #ifdef __SPUR__ static pureRSSI_t spur_RSSI = -1; // Initialization only to avoid warning. @@ -3578,11 +3641,11 @@ void self_test(int test) test_prepare(TEST_ATTEN); test_acquire(TEST_ATTEN); // Acquire test test_validate(TEST_ATTEN); // Validate test -#if 0 +#if 1 for (int j= 0; j < 64; j++ ) { // test_prepare(TEST_ATTEN); set_attenuation(((float)j)/2.0); - float summed_peak_level = 0; +// float summed_peak_level = 0; // for (int k=0; k<10; k++) { test_acquire(TEST_ATTEN); // Acquire test test_validate(TEST_ATTEN); // Validate test diff --git a/si4432.c b/si4432.c index 3309f25..ab6e6d7 100644 --- a/si4432.c +++ b/si4432.c @@ -1313,6 +1313,8 @@ void ADF4351_enable_out(int s) int SI4463_frequency_changed = false; +int SI4463_offset_changed = false; + static int SI4463_band = -1; static int64_t SI4463_outdiv = -1; //static uint32_t SI4463_prev_freq = 0; @@ -1499,6 +1501,8 @@ static const uint8_t SI4463_config[] = RADIO_CONFIGURATION_DATA_ARRAY; #undef RF_GLOBAL_CLK_CFG_1 #define RF_GLOBAL_CLK_CFG_1 GLOBAL_CLK_CFG +// Remember to change RF_MODEM_AFC_LIMITER_1_3_1 !!!!!!!!! + static const uint8_t SI4468_config[] = RADIO_CONFIGURATION_DATA_ARRAY; #endif @@ -1802,6 +1806,36 @@ void set_RSSI_comp(void) } +int SI4463_offset_active = false; + +void si_set_offset(int16_t offset) +{ + // Set properties: MODEM_FREQ_OFFSET + // Number of properties: 2 + // Group ID: 0x20 + // Start ID: 0x0d + // Default values: 0x00, 0x00 + // Descriptions: + // MODEM_FREQ_OFFSET1 - High byte of the offset + // MODEM_FREQ_OFFSET2 - Low byte of the offset + // + // #define RF_MODEM_RSSI_COMP_1 0x11, 0x20, 0x01, 0x4E, 0x40 + + uint8_t data[] = { + 0x11, + 0x20, + 0x02, + 0x0d, + (uint8_t) ((offset>>8) & 0xff), + (uint8_t) ((offset) & 0xff) + }; + SI4463_do_api(data, sizeof(data), NULL, 0); + SI4463_offset_changed = true; + if (offset) + SI4463_offset_active = true; +} + + #ifdef __FAST_SWEEP__ extern deviceRSSI_t age[POINTS_COUNT]; @@ -1810,6 +1844,7 @@ static bool buf_read = false; void SI446x_Fill(int s, int start) { + (void)s; #if 0 set_SPI_mode(SPI_MODE_SI); SI4432_Sel = s; @@ -1870,10 +1905,10 @@ int16_t Si446x_RSSI(void) my_microsecond_delay(SI4432_step_delay); ADF4351_frequency_changed = false; SI4463_frequency_changed = false; - } else if (SI4432_offset_delay && SI4463_frequency_changed) { + } else if (SI4432_offset_delay && SI4463_offset_changed) { my_microsecond_delay(SI4432_offset_delay); ADF4351_frequency_changed = false; - SI4463_frequency_changed = false; + SI4463_offset_changed = false; } int j = 1; //setting.repeat; @@ -2306,6 +2341,10 @@ void SI4463_set_freq(uint32_t freq) #else #define freq_xco 26000000 #endif + if (SI4463_offset_active) { + si_set_offset(0); + SI4463_offset_active = false; + } int32_t R = (freq * SI4463_outdiv) / (Npresc ? 2*freq_xco : 4*freq_xco) - 1; // R between 0x00 and 0x7f (127) int64_t MOD = 524288; int32_t F = ((freq * SI4463_outdiv*MOD) / (Npresc ? 2*freq_xco : 4*freq_xco)) - R*MOD; @@ -2555,17 +2594,17 @@ static int old_ultra = -1; void enable_rx_output(int s) { if (s) - SI4463_set_gpio(3,GPIO_HIGH); + SI4463_set_gpio(3,SI446X_GPIO_MODE_DRIVE1); else - SI4463_set_gpio(3,GPIO_LOW); + SI4463_set_gpio(3,SI446X_GPIO_MODE_DRIVE0); } void enable_high(int s) { if (s) - SI4463_set_gpio(2,GPIO_HIGH); + SI4463_set_gpio(2,SI446X_GPIO_MODE_DRIVE1); else - SI4463_set_gpio(2,GPIO_LOW); + SI4463_set_gpio(2,SI446X_GPIO_MODE_DRIVE0); } diff --git a/si4432.h b/si4432.h index 37ef66b..01715bf 100644 --- a/si4432.h +++ b/si4432.h @@ -178,6 +178,8 @@ int ADF4351_locked(void); void ADF4351_enable(int s); void ADF4351_enable_aux_out(int s); + + #endif #ifdef __SI4463__ @@ -193,6 +195,7 @@ pureRSSI_t getSI4463_RSSI_correction(void); void Si446x_getInfo(si446x_info_t* info); void SI446x_Fill(int s, int start); void SI4463_init(void); +void set_calibration_freq(int freq); #define ADF4351_LO 3 #define ADF4351_LO2 4 #define SI4463_RX 2