erikkaashoek
6 years ago
commit
8852ba1384
@ -0,0 +1,52 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="0.632494471">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.632494471" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration buildProperties="" description="" id="0.632494471" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||
<folderInfo id="0.632494471." name="/" resourcePath="">
|
||||
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.634936630" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.634936630.838183685" name=""/>
|
||||
<builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1821817659" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1098741703" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.827577975" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1071007085" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1654493752" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.58808415" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1096008220" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.846521722" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="tinySA.null.1625903942" name="tinySA"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="0.632494471">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="0.1682776706">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
</cproject>
|
||||
@ -0,0 +1,27 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>nanoVNA-Erik</name>
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||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
<nature>org.eclipse.cdt.core.ccnature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
@ -0,0 +1,15 @@
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||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="cdt.managedbuild.toolchain.gnu.cross.base.1097268449" name="Default">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
|
||||
<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="834375144321394" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
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||||
File diff suppressed because it is too large
Load Diff
@ -1,131 +0,0 @@
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/*
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||||
* Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com
|
||||
* All rights reserved.
|
||||
*
|
||||
* This is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* The software is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with GNU Radio; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include <arm_math.h>
|
||||
#include "nanovna.h"
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||||
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||||
#ifdef ENABLED_DUMP
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||||
int16_t samp_buf[SAMPLE_LEN];
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||||
int16_t ref_buf[SAMPLE_LEN];
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||||
#endif
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||||
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||||
const int16_t sincos_tbl[48][2] = {
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||||
{ 10533, 31029 }, { 27246, 18205 }, { 32698, -2143 }, { 24636, -21605 },
|
||||
{ 6393, -32138 }, {-14493, -29389 }, {-29389, -14493 }, {-32138, 6393 },
|
||||
{-21605, 24636 }, { -2143, 32698 }, { 18205, 27246 }, { 31029, 10533 },
|
||||
{ 31029, -10533 }, { 18205, -27246 }, { -2143, -32698 }, {-21605, -24636 },
|
||||
{-32138, -6393 }, {-29389, 14493 }, {-14493, 29389 }, { 6393, 32138 },
|
||||
{ 24636, 21605 }, { 32698, 2143 }, { 27246, -18205 }, { 10533, -31029 },
|
||||
{-10533, -31029 }, {-27246, -18205 }, {-32698, 2143 }, {-24636, 21605 },
|
||||
{ -6393, 32138 }, { 14493, 29389 }, { 29389, 14493 }, { 32138, -6393 },
|
||||
{ 21605, -24636 }, { 2143, -32698 }, {-18205, -27246 }, {-31029, -10533 },
|
||||
{-31029, 10533 }, {-18205, 27246 }, { 2143, 32698 }, { 21605, 24636 },
|
||||
{ 32138, 6393 }, { 29389, -14493 }, { 14493, -29389 }, { -6393, -32138 },
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||||
{-24636, -21605 }, {-32698, -2143 }, {-27246, 18205 }, {-10533, 31029 }
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||||
};
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||||
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||||
float acc_samp_s;
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float acc_samp_c;
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||||
float acc_ref_s;
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||||
float acc_ref_c;
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||||
|
||||
void
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||||
dsp_process(int16_t *capture, size_t length)
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||||
{
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||||
uint32_t *p = (uint32_t*)capture;
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||||
uint32_t len = length / 2;
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uint32_t i;
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int32_t samp_s = 0;
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int32_t samp_c = 0;
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||||
int32_t ref_s = 0;
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||||
int32_t ref_c = 0;
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for (i = 0; i < len; i++) {
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uint32_t sr = *p++;
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||||
int16_t ref = sr & 0xffff;
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int16_t smp = (sr>>16) & 0xffff;
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#ifdef ENABLED_DUMP
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ref_buf[i] = ref;
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samp_buf[i] = smp;
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#endif
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int32_t s = sincos_tbl[i][0];
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int32_t c = sincos_tbl[i][1];
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||||
samp_s += smp * s / 16;
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samp_c += smp * c / 16;
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ref_s += ref * s / 16;
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ref_c += ref * c / 16;
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#if 0
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uint32_t sc = *(uint32_t)&sincos_tbl[i];
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samp_s = __SMLABB(sr, sc, samp_s);
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samp_c = __SMLABT(sr, sc, samp_c);
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ref_s = __SMLATB(sr, sc, ref_s);
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||||
ref_c = __SMLATT(sr, sc, ref_c);
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||||
#endif
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||||
}
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acc_samp_s += samp_s;
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acc_samp_c += samp_c;
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acc_ref_s += ref_s;
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acc_ref_c += ref_c;
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||||
}
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||||
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||||
void
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||||
calculate_gamma(float gamma[2])
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||||
{
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||||
#if 1
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||||
// calculate reflection coeff. by samp divide by ref
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||||
float rs = acc_ref_s;
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||||
float rc = acc_ref_c;
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||||
float rr = rs * rs + rc * rc;
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||||
//rr = sqrtf(rr) * 1e8;
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||||
float ss = acc_samp_s;
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||||
float sc = acc_samp_c;
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||||
gamma[0] = (sc * rc + ss * rs) / rr;
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||||
gamma[1] = (ss * rc - sc * rs) / rr;
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||||
#elif 0
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||||
gamma[0] = acc_samp_s;
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||||
gamma[1] = acc_samp_c;
|
||||
#else
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||||
gamma[0] = acc_ref_s;
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||||
gamma[1] = acc_ref_c;
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
fetch_amplitude(float gamma[2])
|
||||
{
|
||||
gamma[0] = acc_samp_s * 1e-9;
|
||||
gamma[1] = acc_samp_c * 1e-9;
|
||||
}
|
||||
|
||||
void
|
||||
fetch_amplitude_ref(float gamma[2])
|
||||
{
|
||||
gamma[0] = acc_ref_s * 1e-9;
|
||||
gamma[1] = acc_ref_c * 1e-9;
|
||||
}
|
||||
|
||||
void
|
||||
reset_dsp_accumerator(void)
|
||||
{
|
||||
acc_ref_s = 0;
|
||||
acc_ref_c = 0;
|
||||
acc_samp_s = 0;
|
||||
acc_samp_c = 0;
|
||||
}
|
||||
@ -1,193 +0,0 @@
|
||||
/* CHIBIOS FIX */
|
||||
#include "ch.h"
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ FatFs - FAT file system module configuration file R0.09 (C)ChaN, 2011
|
||||
/----------------------------------------------------------------------------/
|
||||
/
|
||||
/ CAUTION! Do not forget to make clean the project after any changes to
|
||||
/ the configuration options.
|
||||
/
|
||||
/----------------------------------------------------------------------------*/
|
||||
#ifndef _FFCONF
|
||||
#define _FFCONF 6502 /* Revision ID */
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Functions and Buffer Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
|
||||
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
|
||||
/ object instead of the sector buffer in the individual file object for file
|
||||
/ data transfer. This reduces memory consumption 512 bytes each file object. */
|
||||
|
||||
|
||||
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
|
||||
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
|
||||
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
|
||||
/ f_truncate and useless f_getfree. */
|
||||
|
||||
|
||||
#define _FS_MINIMIZE 0 /* 0 to 3 */
|
||||
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
|
||||
/
|
||||
/ 0: Full function.
|
||||
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
|
||||
/ are removed.
|
||||
/ 2: f_opendir and f_readdir are removed in addition to 1.
|
||||
/ 3: f_lseek is removed in addition to 2. */
|
||||
|
||||
|
||||
#define _USE_STRFUNC 0 /* 0:Disable or 1-2:Enable */
|
||||
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
|
||||
|
||||
|
||||
#define _USE_MKFS 1 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
|
||||
|
||||
|
||||
#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
|
||||
|
||||
|
||||
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
|
||||
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Locale and Namespace Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _CODE_PAGE 1251
|
||||
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
|
||||
/ Incorrect setting of the code page can cause a file open failure.
|
||||
/
|
||||
/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows)
|
||||
/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows)
|
||||
/ 949 - Korean (DBCS, OEM, Windows)
|
||||
/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows)
|
||||
/ 1250 - Central Europe (Windows)
|
||||
/ 1251 - Cyrillic (Windows)
|
||||
/ 1252 - Latin 1 (Windows)
|
||||
/ 1253 - Greek (Windows)
|
||||
/ 1254 - Turkish (Windows)
|
||||
/ 1255 - Hebrew (Windows)
|
||||
/ 1256 - Arabic (Windows)
|
||||
/ 1257 - Baltic (Windows)
|
||||
/ 1258 - Vietnam (OEM, Windows)
|
||||
/ 437 - U.S. (OEM)
|
||||
/ 720 - Arabic (OEM)
|
||||
/ 737 - Greek (OEM)
|
||||
/ 775 - Baltic (OEM)
|
||||
/ 850 - Multilingual Latin 1 (OEM)
|
||||
/ 858 - Multilingual Latin 1 + Euro (OEM)
|
||||
/ 852 - Latin 2 (OEM)
|
||||
/ 855 - Cyrillic (OEM)
|
||||
/ 866 - Russian (OEM)
|
||||
/ 857 - Turkish (OEM)
|
||||
/ 862 - Hebrew (OEM)
|
||||
/ 874 - Thai (OEM, Windows)
|
||||
/ 1 - ASCII only (Valid for non LFN cfg.)
|
||||
*/
|
||||
|
||||
|
||||
#define _USE_LFN 1 /* 0 to 3 */
|
||||
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
|
||||
/* The _USE_LFN option switches the LFN support.
|
||||
/
|
||||
/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect.
|
||||
/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant.
|
||||
/ 2: Enable LFN with dynamic working buffer on the STACK.
|
||||
/ 3: Enable LFN with dynamic working buffer on the HEAP.
|
||||
/
|
||||
/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN,
|
||||
/ Unicode handling functions ff_convert() and ff_wtoupper() must be added
|
||||
/ to the project. When enable to use heap, memory control functions
|
||||
/ ff_memalloc() and ff_memfree() must be added to the project. */
|
||||
|
||||
|
||||
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
|
||||
/* To switch the character code set on FatFs API to Unicode,
|
||||
/ enable LFN feature and set _LFN_UNICODE to 1. */
|
||||
|
||||
|
||||
#define _FS_RPATH 0 /* 0 to 2 */
|
||||
/* The _FS_RPATH option configures relative path feature.
|
||||
/
|
||||
/ 0: Disable relative path feature and remove related functions.
|
||||
/ 1: Enable relative path. f_chdrive() and f_chdir() are available.
|
||||
/ 2: f_getcwd() is available in addition to 1.
|
||||
/
|
||||
/ Note that output of the f_readdir fnction is affected by this option. */
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ Physical Drive Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _VOLUMES 1
|
||||
/* Number of volumes (logical drives) to be used. */
|
||||
|
||||
|
||||
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
|
||||
/* Maximum sector size to be handled.
|
||||
/ Always set 512 for memory card and hard disk but a larger value may be
|
||||
/ required for on-board flash memory, floppy disk and optical disk.
|
||||
/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size
|
||||
/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */
|
||||
|
||||
|
||||
#define _MULTI_PARTITION 0 /* 0:Single partition, 1/2:Enable multiple partition */
|
||||
/* When set to 0, each volume is bound to the same physical drive number and
|
||||
/ it can mount only first primaly partition. When it is set to 1, each volume
|
||||
/ is tied to the partitions listed in VolToPart[]. */
|
||||
|
||||
|
||||
#define _USE_ERASE 1 /* 0:Disable or 1:Enable */
|
||||
/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command
|
||||
/ should be added to the disk_ioctl functio. */
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------------/
|
||||
/ System Configurations
|
||||
/----------------------------------------------------------------------------*/
|
||||
|
||||
#define _WORD_ACCESS 1 /* 0 or 1 */
|
||||
/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS
|
||||
/ option defines which access method is used to the word data on the FAT volume.
|
||||
/
|
||||
/ 0: Byte-by-byte access.
|
||||
/ 1: Word access. Do not choose this unless following condition is met.
|
||||
/
|
||||
/ When the byte order on the memory is big-endian or address miss-aligned word
|
||||
/ access results incorrect behavior, the _WORD_ACCESS must be set to 0.
|
||||
/ If it is not the case, the value can also be set to 1 to improve the
|
||||
/ performance and code size.
|
||||
*/
|
||||
|
||||
|
||||
/* A header file that defines sync object types on the O/S, such as
|
||||
/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */
|
||||
|
||||
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
|
||||
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
|
||||
#define _SYNC_t Semaphore * /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */
|
||||
|
||||
/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module.
|
||||
/
|
||||
/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect.
|
||||
/ 1: Enable reentrancy. Also user provided synchronization handlers,
|
||||
/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj
|
||||
/ function must be added to the project. */
|
||||
|
||||
|
||||
#define _FS_SHARE 0 /* 0:Disable or >=1:Enable */
|
||||
/* To enable file shareing feature, set _FS_SHARE to 1 or greater. The value
|
||||
defines how many files can be opened simultaneously. */
|
||||
|
||||
|
||||
#endif /* _FFCONFIG */
|
||||
@ -1,90 +0,0 @@
|
||||
/*
|
||||
* fft.h is Based on
|
||||
* Free FFT and convolution (C)
|
||||
*
|
||||
* Copyright (c) 2019 Project Nayuki. (MIT License)
|
||||
* https://www.nayuki.io/page/free-small-fft-in-multiple-languages
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
* - The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
* - The Software is provided "as is", without warranty of any kind, express or
|
||||
* implied, including but not limited to the warranties of merchantability,
|
||||
* fitness for a particular purpose and noninfringement. In no event shall the
|
||||
* authors or copyright holders be liable for any claim, damages or other
|
||||
* liability, whether in an action of contract, tort or otherwise, arising from,
|
||||
* out of or in connection with the Software or the use or other dealings in the
|
||||
* Software.
|
||||
*/
|
||||
|
||||
|
||||
#include <math.h>
|
||||
#include <stdint.h>
|
||||
|
||||
static uint16_t reverse_bits(uint16_t x, int n) {
|
||||
uint16_t result = 0;
|
||||
int i;
|
||||
for (i = 0; i < n; i++, x >>= 1)
|
||||
result = (result << 1) | (x & 1U);
|
||||
return result;
|
||||
}
|
||||
|
||||
/***
|
||||
* dir = forward: 0, inverse: 1
|
||||
* https://www.nayuki.io/res/free-small-fft-in-multiple-languages/fft.c
|
||||
*/
|
||||
static void fft256(float array[][2], const uint8_t dir) {
|
||||
const uint16_t n = 256;
|
||||
const uint8_t levels = 8; // log2(n)
|
||||
|
||||
const uint8_t real = dir & 1;
|
||||
const uint8_t imag = ~real & 1;
|
||||
uint16_t i;
|
||||
uint16_t size;
|
||||
|
||||
for (i = 0; i < n; i++) {
|
||||
uint16_t j = reverse_bits(i, levels);
|
||||
if (j > i) {
|
||||
float temp = array[i][real];
|
||||
array[i][real] = array[j][real];
|
||||
array[j][real] = temp;
|
||||
temp = array[i][imag];
|
||||
array[i][imag] = array[j][imag];
|
||||
array[j][imag] = temp;
|
||||
}
|
||||
}
|
||||
|
||||
// Cooley-Tukey decimation-in-time radix-2 FFT
|
||||
for (size = 2; size <= n; size *= 2) {
|
||||
uint16_t halfsize = size / 2;
|
||||
uint16_t tablestep = n / size;
|
||||
uint16_t i;
|
||||
for (i = 0; i < n; i += size) {
|
||||
uint16_t j, k;
|
||||
for (j = i, k = 0; j < i + halfsize; j++, k += tablestep) {
|
||||
uint16_t l = j + halfsize;
|
||||
float tpre = array[l][real] * cos(2 * VNA_PI * k / 256) + array[l][imag] * sin(2 * VNA_PI * k / 256);
|
||||
float tpim = -array[l][real] * sin(2 * VNA_PI * k / 256) + array[l][imag] * cos(2 * VNA_PI * k / 256);
|
||||
array[l][real] = array[j][real] - tpre;
|
||||
array[l][imag] = array[j][imag] - tpim;
|
||||
array[j][real] += tpre;
|
||||
array[j][imag] += tpim;
|
||||
}
|
||||
}
|
||||
if (size == n) // Prevent overflow in 'size *= 2'
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void fft256_forward(float array[][2]) {
|
||||
fft256(array, 0);
|
||||
}
|
||||
|
||||
static inline void fft256_inverse(float array[][2]) {
|
||||
fft256(array, 1);
|
||||
}
|
||||
@ -0,0 +1,447 @@
|
||||
|
||||
extern volatile int SI4432_Sel; // currently selected SI4432
|
||||
void SI4432_Write_Byte(byte ADR, byte DATA );
|
||||
byte SI4432_Read_Byte( byte ADR );
|
||||
int VFO = 0;
|
||||
int points = 101; // For 's' and 'm' commands
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_mode)
|
||||
{
|
||||
static const char cmd_low_high[] = "low|high";
|
||||
static const char cmd_in_out[] = "input|output";
|
||||
if (argc != 2) {
|
||||
usage:
|
||||
shell_printf("usage: mode %s %s\r\n", cmd_low_high,cmd_in_out);
|
||||
return;
|
||||
}
|
||||
int lh = get_str_index(argv[0], cmd_low_high);
|
||||
int io = get_str_index(argv[1], cmd_in_out);
|
||||
if (lh<0 || io<0)
|
||||
goto usage;
|
||||
switch(lh+io*2)
|
||||
{
|
||||
case 0:
|
||||
set_mode(M_LOW);
|
||||
break;
|
||||
case 1:
|
||||
set_mode(M_HIGH);
|
||||
break;
|
||||
case 2:
|
||||
set_mode(M_GENLOW);
|
||||
break;
|
||||
case 3:
|
||||
set_mode(M_GENHIGH);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_modulation )
|
||||
{
|
||||
static const char cmd_mod[] = "off|AM_1kHz|AM_10Hz|NFM|WFM|extern";
|
||||
if (argc != 1) {
|
||||
usage:
|
||||
shell_printf("usage: modulation %s\r\n", cmd_mod);
|
||||
return;
|
||||
}
|
||||
static const int cmd_mod_val[] = { MO_NONE, MO_AM_1kHz, MO_AM_10Hz, MO_NFM, MO_WFM, MO_EXTERNAL};
|
||||
int m = get_str_index(argv[1], cmd_mod);
|
||||
if (m<0)
|
||||
goto usage;
|
||||
set_modulation(cmd_mod_val[m]);
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_spur)
|
||||
{
|
||||
if (argc != 1) {
|
||||
usage:
|
||||
shell_printf("usage: spur on|off\r\n");
|
||||
return;
|
||||
}
|
||||
if (strcmp(argv[0],"on") == 0) {
|
||||
setting.spur = 1;
|
||||
} else if (strcmp(argv[0],"off") == 0) {
|
||||
setting.spur = 0;
|
||||
} else
|
||||
goto usage;
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_load)
|
||||
{
|
||||
if (argc != 1) {
|
||||
usage:
|
||||
shell_printf("usage: load 0..4\r\n");
|
||||
return;
|
||||
}
|
||||
int a = my_atoi(argv[0]);
|
||||
if (0 <= a && a <= 4) {
|
||||
caldata_recall(a);
|
||||
} else
|
||||
goto usage;
|
||||
}
|
||||
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_attenuate)
|
||||
{
|
||||
if (argc != 1) {
|
||||
usage:
|
||||
shell_printf("usage: attenuate 0..31|auto\r\n");
|
||||
return;
|
||||
}
|
||||
if (strcmp(argv[0],"auto") == 0) {
|
||||
set_auto_attenuation();
|
||||
} else {
|
||||
int a = my_atoi(argv[0]);
|
||||
if (a < 0 || a>31)
|
||||
goto usage;
|
||||
set_attenuation(a);
|
||||
}
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_level)
|
||||
{
|
||||
if (argc != 1) {
|
||||
shell_printf("usage: level -76..-6\r\n");
|
||||
return;
|
||||
}
|
||||
float f = my_atof(argv[0]);
|
||||
set_level(f);
|
||||
}
|
||||
|
||||
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_levelsweep)
|
||||
{
|
||||
if (argc != 1) {
|
||||
shell_printf("usage: levelsweep -76..+76\r\n");
|
||||
return;
|
||||
}
|
||||
float f = my_atof(argv[0]);
|
||||
set_level_sweep(f);
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_leveloffset)
|
||||
{
|
||||
if (argc == 0) {
|
||||
shell_printf("leveloffset low %.1f\r\n", (float) config.low_level_offset);
|
||||
shell_printf("leveloffset high %.1f\r\n", (float)config.high_level_offset);
|
||||
return;
|
||||
} else if (argc == 2) {
|
||||
float v = my_atof(argv[1]);
|
||||
if (strcmp(argv[0],"low") == 0)
|
||||
config.low_level_offset = v;
|
||||
else if (strcmp(argv[0],"high") == 0)
|
||||
config.low_level_offset = v;
|
||||
else
|
||||
goto usage;
|
||||
} else {
|
||||
usage:
|
||||
shell_printf("leveloffset [low|high] [<offset>]\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_rbw)
|
||||
{
|
||||
if (argc != 1) {
|
||||
usage:
|
||||
shell_printf("usage: rbw 2..600|auto\r\n");
|
||||
return;
|
||||
}
|
||||
if (strcmp(argv[0],"auto") == 0 || strcmp(argv[0],"0") == 0) {
|
||||
set_RBW(0);
|
||||
} else {
|
||||
int a = my_atoi(argv[0]);
|
||||
if (a < 2 || a>600)
|
||||
goto usage;
|
||||
set_RBW(a);
|
||||
}
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_if)
|
||||
{
|
||||
if (argc != 1) {
|
||||
usage:
|
||||
shell_printf("usage: if {433M..435M}\r\n");
|
||||
return;
|
||||
} else {
|
||||
int a = my_atoi(argv[0]);
|
||||
if (a!= 0 &&( a < 433000000 || a>435000000))
|
||||
goto usage;
|
||||
setting.auto_IF = false;
|
||||
set_IF(a);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_v)
|
||||
|
||||
|
||||
{
|
||||
if (argc != 1) {
|
||||
shell_printf("%d\r\n", SI4432_Sel);
|
||||
return;
|
||||
}
|
||||
VFO = my_atoi(argv[0]);
|
||||
shell_printf("VFO %d\r\n", VFO);
|
||||
}
|
||||
|
||||
int xtoi(char *t)
|
||||
{
|
||||
|
||||
int v=0;
|
||||
while (*t) {
|
||||
if ('0' <= *t && *t <= '9')
|
||||
v = v*16 + *t - '0';
|
||||
else if ('a' <= *t && *t <= 'f')
|
||||
v = v*16 + *t - 'a' + 10;
|
||||
else if ('A' <= *t && *t <= 'F')
|
||||
v = v*16 + *t - 'A' + 10;
|
||||
else
|
||||
return v;
|
||||
t++;
|
||||
}
|
||||
return v;
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_y)
|
||||
{
|
||||
int rvalue;
|
||||
int lvalue = 0;
|
||||
if (argc != 1 && argc != 2) {
|
||||
shell_printf("usage: y {addr(0-95)} [value(0-FF)]\r\n");
|
||||
return;
|
||||
}
|
||||
rvalue = xtoi(argv[0]);
|
||||
SI4432_Sel = VFO;
|
||||
if (argc == 2){
|
||||
lvalue = xtoi(argv[1]);
|
||||
SI4432_Write_Byte(rvalue, lvalue);
|
||||
} else {
|
||||
lvalue = SI4432_Read_Byte(rvalue);
|
||||
shell_printf("%x\r\n", lvalue);
|
||||
}
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_selftest)
|
||||
{
|
||||
if (argc < 1 || argc > 2) {
|
||||
shell_printf("usage: selftest (1-3) [arg]\r\n");
|
||||
return;
|
||||
}
|
||||
setting.test = my_atoi(argv[0]);
|
||||
if (argc == 1)
|
||||
setting.test_argument = 0;
|
||||
else
|
||||
setting.test_argument = my_atoi(argv[1]);
|
||||
sweep_mode = SWEEP_SELFTEST;
|
||||
}
|
||||
|
||||
#ifdef __ULTRA_SA__
|
||||
VNA_SHELL_FUNCTION(cmd_x)
|
||||
{
|
||||
uint32_t reg;
|
||||
|
||||
|
||||
if (argc != 1) {
|
||||
shell_printf("usage: x value(0-FFFFFFFF)\r\n");
|
||||
return;
|
||||
}
|
||||
reg = xtoi(argv[0]);
|
||||
|
||||
if ((reg & 7) == 5) {
|
||||
if (reg & (1<<22))
|
||||
VFO = 1;
|
||||
else
|
||||
VFO = 0;
|
||||
reg &= ~0xc00000; // Force led to show lock
|
||||
reg |= 0x400000;
|
||||
}
|
||||
|
||||
ADF4351_WriteRegister32(VFO, reg);
|
||||
shell_printf("x=%x\r\n", reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_i)
|
||||
{
|
||||
int rvalue;
|
||||
return; // Don't use!!!!
|
||||
SI4432_Init();
|
||||
shell_printf("SI4432 init done\r\n");
|
||||
if (argc == 1) {
|
||||
rvalue = xtoi(argv[0]);
|
||||
set_switches(rvalue);
|
||||
set_mode(rvalue);
|
||||
shell_printf("SI4432 mode %d set\r\n", rvalue);
|
||||
}
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_o)
|
||||
{
|
||||
(void) argc;
|
||||
uint32_t value = my_atoi(argv[0]);
|
||||
if (VFO == 0)
|
||||
setting.frequency_IF = value;
|
||||
set_freq(VFO, value);
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_d)
|
||||
{
|
||||
(void) argc;
|
||||
(void) argv;
|
||||
// int32_t a = my_atoi(argv[0]);
|
||||
// setting.drive = a;
|
||||
}
|
||||
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_a)
|
||||
{
|
||||
(void)argc;
|
||||
if (argc != 1) {
|
||||
shell_printf("a=%d\r\n", frequencyStart);
|
||||
return;
|
||||
}
|
||||
int32_t value = my_atoi(argv[0]);
|
||||
frequencyStart = value;
|
||||
}
|
||||
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_b)
|
||||
{
|
||||
(void)argc;
|
||||
if (argc != 1) {
|
||||
shell_printf("b=%d\r\n", frequencyStop);
|
||||
return;
|
||||
}
|
||||
int32_t value = my_atoi(argv[0]);
|
||||
frequencyStop = value;
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_t)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_e)
|
||||
{
|
||||
(void)argc;
|
||||
if (argc != 1) {
|
||||
shell_printf("e=%d\r\n", setting.tracking);
|
||||
return;
|
||||
}
|
||||
setting.tracking = my_atoi(argv[0]);
|
||||
if (setting.tracking == -1)
|
||||
setting.tracking = false;
|
||||
else
|
||||
setting.tracking = true;
|
||||
|
||||
if (argc >1)
|
||||
frequencyExtra = my_atoi(argv[1]);
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_s)
|
||||
{
|
||||
(void)argc;
|
||||
if (argc != 1) {
|
||||
shell_printf("s=%d\r\n", points);
|
||||
return;
|
||||
}
|
||||
points = my_atoi(argv[0]);
|
||||
}
|
||||
|
||||
void sweep_remote(void)
|
||||
{
|
||||
int old_step = setting.frequency_step;
|
||||
uint32_t f_step = (frequencyStop-frequencyStart)/ points;
|
||||
setting.frequency_step = f_step;
|
||||
streamPut(shell_stream, '{');
|
||||
dirty = true;
|
||||
for (int i = 0; i<points; i++) {
|
||||
if (operation_requested)
|
||||
break;
|
||||
float val = perform(false, i, frequencyStart - setting.frequency_IF + f_step * i, false);
|
||||
streamPut(shell_stream, 'x');
|
||||
int v = val*2 + 256;
|
||||
streamPut(shell_stream, (uint8_t)(v & 0xFF));
|
||||
streamPut(shell_stream, (uint8_t)((v>>8) & 0xFF));
|
||||
// enable led
|
||||
}
|
||||
streamPut(shell_stream, '}');
|
||||
setting.frequency_step = old_step;
|
||||
sweep_mode = 0;
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_m)
|
||||
{
|
||||
(void)argc;
|
||||
(void)argv;
|
||||
|
||||
// set_mode(0);
|
||||
// setting.tracking = false; //Default test setup
|
||||
// setting.step_atten = false;
|
||||
// set_attenuation(0);
|
||||
// set_reflevel(-10);
|
||||
// set_sweep_frequency(ST_START,frequencyStart - setting.frequency_IF );
|
||||
// set_sweep_frequency(ST_STOP, frequencyStop - setting.frequency_IF);
|
||||
// draw_cal_status();
|
||||
|
||||
pause_sweep();
|
||||
// update_rbw();
|
||||
chThdSleepMilliseconds(10);
|
||||
sweep_mode = SWEEP_REMOTE;
|
||||
// update_rbw();
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_p)
|
||||
{
|
||||
(void)argc;
|
||||
return;
|
||||
int p = my_atoi(argv[0]);
|
||||
int a = my_atoi(argv[1]);
|
||||
if (p==5)
|
||||
set_attenuation(-a);
|
||||
if (p==6)
|
||||
set_mode(a);
|
||||
if (p==1)
|
||||
if (get_refer_output() != a)
|
||||
set_refer_output(a);
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_w)
|
||||
{
|
||||
(void)argc;
|
||||
int p = my_atoi(argv[0]);
|
||||
return;
|
||||
set_RBW(p);
|
||||
}
|
||||
|
||||
VNA_SHELL_FUNCTION(cmd_correction)
|
||||
{
|
||||
(void)argc;
|
||||
if (argc == 0) {
|
||||
shell_printf("index frequency value\r\n");
|
||||
for (int i=0; i<CORRECTION_POINTS; i++) {
|
||||
shell_printf("%d %d %.1f\r\n", i, config.correction_frequency[i], config.correction_value[i]);
|
||||
}
|
||||
return;
|
||||
}
|
||||
if (argc == 1 && (strcmp(argv[0],"reset") == 0)) {
|
||||
for (int i=0; i<CORRECTION_POINTS; i++) {
|
||||
config.correction_value[i] = 0.0;
|
||||
}
|
||||
shell_printf("correction table reset\r\n");
|
||||
return;
|
||||
}
|
||||
if (argc != 3) {
|
||||
shell_printf("usage: correction 0-9 frequency(Hz) value(dB)\r\n");
|
||||
return;
|
||||
}
|
||||
int i = my_atoi(argv[0]);
|
||||
uint32_t f = my_atoui(argv[1]);
|
||||
float v = my_atof(argv[2]);
|
||||
config.correction_frequency[i] = f;
|
||||
config.correction_value[i] = v;
|
||||
shell_printf("updated %d to %d %.1f\r\n", i, config.correction_frequency[i], config.correction_value[i]);
|
||||
}
|
||||
@ -0,0 +1,44 @@
|
||||
#ifndef __SI4432_H__
|
||||
|
||||
#define __SI4432_H__
|
||||
|
||||
#define byte uint8_t
|
||||
extern volatile int SI4432_Sel; // currently selected SI4432
|
||||
void SI4432_Write_Byte(byte ADR, byte DATA );
|
||||
byte SI4432_Read_Byte( byte ADR );
|
||||
|
||||
void SI4432_Init(void);
|
||||
float SI4432_RSSI(uint32_t i, int s);
|
||||
#ifdef __SIMULATION__
|
||||
float Simulated_SI4432_RSSI(uint32_t i, int s);
|
||||
#endif
|
||||
void SI4432_Set_Frequency ( long Freq );
|
||||
void SI4432_Transmit(int d);
|
||||
void SI4432_Receive(void);
|
||||
float SI4432_SET_RBW(float WISH);
|
||||
void PE4302_Write_Byte(unsigned char DATA );
|
||||
void PE4302_init(void);
|
||||
|
||||
#ifdef __ULTRA_SA__
|
||||
extern int ADF4351_LE[];
|
||||
extern int debug;
|
||||
void ADF4351_Setup(void);
|
||||
|
||||
|
||||
void ADF4351_WriteRegister32(int channel, const uint32_t value);
|
||||
void ADF4351_set_frequency(int channel, uint32_t freq, int drive_strength);
|
||||
void ADF4351_prep_frequency(int channel, uint32_t freq, int drive_strength);
|
||||
//int ADF4351_set_frequency_with_offset(uint32_t freq, int offset, uint8_t drive_strength);
|
||||
void ADF4351_Set(int channel);
|
||||
void ADF4351_enable_output(void);
|
||||
void ADF4351_disable_output(void);
|
||||
void ADF4351_spur_mode(int S);
|
||||
void ADF4351_R_counter(int R);
|
||||
void ADF4351_channel_spacing(int spacing);
|
||||
void ADF4351_CP(int p);
|
||||
void ADF4351_level(int p);
|
||||
int ADF4351_locked(void);
|
||||
#endif
|
||||
|
||||
|
||||
#endif //__SI4432_H__
|
||||
@ -1,473 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com
|
||||
* Modified by DiSlord dislordlive@gmail.com
|
||||
* All rights reserved.
|
||||
*
|
||||
* This is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* The software is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with GNU Radio; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
#include "hal.h"
|
||||
#include "nanovna.h"
|
||||
#include "si5351.h"
|
||||
|
||||
// Enable cache for SI5351 CLKX_CONTROL register, little speedup exchange
|
||||
#define USE_CLK_CONTROL_CACHE TRUE
|
||||
|
||||
// XTAL frequency on si5351
|
||||
#define XTALFREQ 26000000U
|
||||
// MCLK (processor clock if set, audio codec) frequency clock
|
||||
#define CLK2_FREQUENCY 8000000U
|
||||
|
||||
// Fixed PLL mode multiplier (used in band 1)
|
||||
#define PLL_N 32
|
||||
|
||||
// I2C address on bus (only 0x60 for Si5351A in 10-Pin MSOP)
|
||||
#define SI5351_I2C_ADDR 0x60
|
||||
|
||||
static uint8_t current_band = 0;
|
||||
static uint32_t current_freq = 0;
|
||||
static int32_t current_offset = FREQUENCY_OFFSET;
|
||||
|
||||
// Minimum value is 2, freq change apply at next dsp measure, and need skip it
|
||||
#define DELAY_NORMAL 2
|
||||
// Delay for bands (depend set band 1 more fast (can change before next dsp buffer ready, need wait additional interval)
|
||||
#define DELAY_BAND_1 3
|
||||
#define DELAY_BAND_2 2
|
||||
// Band changes need set delay after reset PLL
|
||||
#define DELAY_BANDCHANGE_1 3
|
||||
#define DELAY_BANDCHANGE_2 3
|
||||
// Delay after set new PLL values, and send reset (on band 1 unstable if less then 900, on 4000-5000 no amplitude spike on change)
|
||||
#define DELAY_RESET_PLL 5000
|
||||
|
||||
uint32_t si5351_get_frequency(void)
|
||||
{
|
||||
return current_freq;
|
||||
}
|
||||
|
||||
void si5351_set_frequency_offset(int32_t offset)
|
||||
{
|
||||
current_offset = offset;
|
||||
current_freq = 0; // reset freq, for
|
||||
}
|
||||
|
||||
static void
|
||||
si5351_bulk_write(const uint8_t *buf, int len)
|
||||
{
|
||||
i2cAcquireBus(&I2CD1);
|
||||
(void)i2cMasterTransmitTimeout(&I2CD1, SI5351_I2C_ADDR, buf, len, NULL, 0, 1000);
|
||||
i2cReleaseBus(&I2CD1);
|
||||
}
|
||||
|
||||
#if 0
|
||||
static bool si5351_bulk_read(uint8_t reg, uint8_t* buf, int len)
|
||||
{
|
||||
i2cAcquireBus(&I2CD1);
|
||||
msg_t mr = i2cMasterTransmitTimeout(&I2CD1, SI5351_I2C_ADDR, ®, 1, buf, len, 1000);
|
||||
i2cReleaseBus(&I2CD1);
|
||||
return mr == MSG_OK;
|
||||
}
|
||||
|
||||
static void si5351_wait_pll_lock(void)
|
||||
{
|
||||
uint8_t status;
|
||||
int count = 100;
|
||||
do{
|
||||
status=0xFF;
|
||||
si5351_bulk_read(0, &status, 1);
|
||||
if ((status & 0x60) == 0) // PLLA and PLLB locked
|
||||
return;
|
||||
}while (--count);
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline void
|
||||
si5351_write(uint8_t reg, uint8_t dat)
|
||||
{
|
||||
uint8_t buf[] = { reg, dat };
|
||||
si5351_bulk_write(buf, 2);
|
||||
}
|
||||
|
||||
// register addr, length, data, ...
|
||||
const uint8_t si5351_configs[] = {
|
||||
2, SI5351_REG_3_OUTPUT_ENABLE_CONTROL, 0xff,
|
||||
4, SI5351_REG_16_CLK0_CONTROL, SI5351_CLK_POWERDOWN, SI5351_CLK_POWERDOWN, SI5351_CLK_POWERDOWN,
|
||||
2, SI5351_REG_183_CRYSTAL_LOAD, SI5351_CRYSTAL_LOAD_8PF,
|
||||
// All of this init code run late on sweep
|
||||
#if 0
|
||||
// setup PLL (26MHz * 32 = 832MHz, 32/2-2=14)
|
||||
9, SI5351_REG_PLL_A, /*P3*/0, 1, /*P1*/0, 14, 0, /*P3/P2*/0, 0, 0,
|
||||
9, SI5351_REG_PLL_B, /*P3*/0, 1, /*P1*/0, 14, 0, /*P3/P2*/0, 0, 0,
|
||||
// RESET PLL
|
||||
2, SI5351_REG_177_PLL_RESET, SI5351_PLL_RESET_A | SI5351_PLL_RESET_B | 0x0C, //
|
||||
// setup multisynth (832MHz / 104 = 8MHz, 104/2-2=50)
|
||||
9, SI5351_REG_58_MULTISYNTH2, /*P3*/0, 1, /*P1*/0, 50, 0, /*P2|P3*/0, 0, 0,
|
||||
2, SI5351_REG_18_CLK2_CONTROL, SI5351_CLK_DRIVE_STRENGTH_2MA | SI5351_CLK_INPUT_MULTISYNTH_N | SI5351_CLK_INTEGER_MODE,
|
||||
#endif
|
||||
2, SI5351_REG_3_OUTPUT_ENABLE_CONTROL, ~(SI5351_CLK0_EN|SI5351_CLK1_EN|SI5351_CLK2_EN),
|
||||
0 // sentinel
|
||||
};
|
||||
|
||||
void
|
||||
si5351_init(void)
|
||||
{
|
||||
const uint8_t *p = si5351_configs;
|
||||
while (*p) {
|
||||
uint8_t len = *p++;
|
||||
si5351_bulk_write(p, len);
|
||||
p += len;
|
||||
}
|
||||
}
|
||||
|
||||
static const uint8_t disable_output[] = {
|
||||
SI5351_REG_16_CLK0_CONTROL,
|
||||
SI5351_CLK_POWERDOWN, // CLK 0
|
||||
SI5351_CLK_POWERDOWN, // CLK 1
|
||||
SI5351_CLK_POWERDOWN // CLK 2
|
||||
};
|
||||
|
||||
/* Get the appropriate starting point for the PLL registers */
|
||||
static const uint8_t msreg_base[] = {
|
||||
SI5351_REG_42_MULTISYNTH0,
|
||||
SI5351_REG_50_MULTISYNTH1,
|
||||
SI5351_REG_58_MULTISYNTH2,
|
||||
};
|
||||
static const uint8_t clkctrl[] = {
|
||||
SI5351_REG_16_CLK0_CONTROL,
|
||||
SI5351_REG_17_CLK1_CONTROL,
|
||||
SI5351_REG_18_CLK2_CONTROL
|
||||
};
|
||||
|
||||
// Reset PLL need then band changes
|
||||
static void si5351_reset_pll(uint8_t mask)
|
||||
{
|
||||
// Writing a 1<<5 will reset PLLA, 1<<7 reset PLLB, this is a self clearing bits.
|
||||
// !!! Need delay before reset PLL for apply PLL freq changes before
|
||||
chThdSleepMicroseconds(DELAY_RESET_PLL);
|
||||
si5351_write(SI5351_REG_177_PLL_RESET, mask | 0x0C);
|
||||
}
|
||||
|
||||
void si5351_disable_output(void)
|
||||
{
|
||||
si5351_write(SI5351_REG_3_OUTPUT_ENABLE_CONTROL, 0xFF);
|
||||
si5351_bulk_write(disable_output, sizeof(disable_output));
|
||||
current_band = 0;
|
||||
}
|
||||
|
||||
void si5351_enable_output(void)
|
||||
{
|
||||
si5351_write(SI5351_REG_3_OUTPUT_ENABLE_CONTROL, ~(SI5351_CLK0_EN|SI5351_CLK1_EN|SI5351_CLK2_EN));
|
||||
//si5351_reset_pll(SI5351_PLL_RESET_A | SI5351_PLL_RESET_B);
|
||||
current_freq = 0;
|
||||
current_band = 0;
|
||||
}
|
||||
|
||||
// Set PLL freq = XTALFREQ * (mult + num/denom)
|
||||
static void si5351_setupPLL(uint8_t pllSource, /* SI5351_REG_PLL_A or SI5351_REG_PLL_B */
|
||||
uint32_t mult,
|
||||
uint32_t num,
|
||||
uint32_t denom)
|
||||
{
|
||||
/* Feedback Multisynth Divider Equation
|
||||
* where: a = mult, b = num and c = denom
|
||||
* P1 register is an 18-bit value using following formula:
|
||||
* P1[17:0] = 128 * mult + int((128*num)/denom) - 512
|
||||
* P2 register is a 20-bit value using the following formula:
|
||||
* P2[19:0] = (128 * num) % denom
|
||||
* P3 register is a 20-bit value using the following formula:
|
||||
* P3[19:0] = denom
|
||||
*/
|
||||
/* Set the main PLL config registers */
|
||||
mult <<= 7;
|
||||
num <<= 7;
|
||||
uint32_t P1 = mult - 512; // Integer mode
|
||||
uint32_t P2 = 0;
|
||||
uint32_t P3 = 1;
|
||||
if (num) { // Fractional mode
|
||||
P1+= num / denom;
|
||||
P2 = num % denom;
|
||||
P3 = denom;
|
||||
}
|
||||
// Pll MSN(A|B) registers Datasheet
|
||||
uint8_t reg[9];
|
||||
reg[0] = pllSource; // SI5351_REG_PLL_A or SI5351_REG_PLL_B
|
||||
reg[1] = (P3 & 0x0FF00) >> 8; // MSN_P3[15: 8]
|
||||
reg[2] = (P3 & 0x000FF); // MSN_P3[ 7: 0]
|
||||
reg[3] = (P1 & 0x30000) >> 16; // MSN_P1[17:16]
|
||||
reg[4] = (P1 & 0x0FF00) >> 8; // MSN_P1[15: 8]
|
||||
reg[5] = (P1 & 0x000FF); // MSN_P1[ 7: 0]
|
||||
reg[6] = ((P3 & 0xF0000) >> 12) | ((P2 & 0xF0000) >> 16); // MSN_P3[19:16] | MSN_P2[19:16]
|
||||
reg[7] = (P2 & 0x0FF00) >> 8; // MSN_P2[15: 8]
|
||||
reg[8] = (P2 & 0x000FF); // MSN_P2[ 7: 0]
|
||||
si5351_bulk_write(reg, 9);
|
||||
}
|
||||
|
||||
// Set Multisynth divider = (div + num/denom) * rdiv
|
||||
static void
|
||||
si5351_setupMultisynth(uint8_t channel,
|
||||
uint32_t div, // 4,6,8, 8+ ~ 900
|
||||
uint32_t num,
|
||||
uint32_t denom,
|
||||
uint32_t rdiv, // SI5351_R_DIV_1~128
|
||||
uint8_t chctrl) // SI5351_REG_16_CLKX_CONTROL settings
|
||||
{
|
||||
/* Output Multisynth Divider Equations
|
||||
* where: a = div, b = num and c = denom
|
||||
* P1 register is an 18-bit value using following formula:
|
||||
* P1[17:0] = 128 * a + int((128*b)/c) - 512
|
||||
* P2 register is a 20-bit value using the following formula:
|
||||
* P2[19:0] = (128 * b) % c
|
||||
* P3 register is a 20-bit value using the following formula:
|
||||
* P3[19:0] = c
|
||||
*/
|
||||
/* Set the main PLL config registers */
|
||||
uint32_t P1 = 0;
|
||||
uint32_t P2 = 0;
|
||||
uint32_t P3 = 1;
|
||||
if (div == 4)
|
||||
rdiv|= SI5351_DIVBY4;
|
||||
else {
|
||||
num<<=7;
|
||||
div<<=7;
|
||||
P1 = div - 512; // Integer mode
|
||||
if (num) { // Fractional mode
|
||||
P1+= num / denom;
|
||||
P2 = num % denom;
|
||||
P3 = denom;
|
||||
}
|
||||
}
|
||||
/* Set the MSx config registers */
|
||||
uint8_t reg[9];
|
||||
reg[0] = msreg_base[channel]; // SI5351_REG_42_MULTISYNTH0, SI5351_REG_50_MULTISYNTH1, SI5351_REG_58_MULTISYNTH2
|
||||
reg[1] = (P3 & 0x0FF00)>>8; // MSx_P3[15: 8]
|
||||
reg[2] = (P3 & 0x000FF); // MSx_P3[ 7: 0]
|
||||
reg[3] = ((P1 & 0x30000)>>16)| rdiv; // Rx_DIV[2:0] | MSx_DIVBY4[1:0] | MSx_P1[17:16]
|
||||
reg[4] = (P1 & 0x0FF00)>> 8; // MSx_P1[15: 8]
|
||||
reg[5] = (P1 & 0x000FF); // MSx_P1[ 7: 0]
|
||||
reg[6] = ((P3 & 0xF0000)>>12)|((P2 & 0xF0000)>>16); // MSx_P3[19:16] | MSx_P2[19:16]
|
||||
reg[7] = (P2 & 0x0FF00)>>8; // MSx_P2[15: 8]
|
||||
reg[8] = (P2 & 0x000FF); // MSx_P2[ 7: 0]
|
||||
si5351_bulk_write(reg, 9);
|
||||
|
||||
/* Configure the clk control and enable the output */
|
||||
uint8_t dat = chctrl | SI5351_CLK_INPUT_MULTISYNTH_N;
|
||||
if (num == 0)
|
||||
dat |= SI5351_CLK_INTEGER_MODE;
|
||||
|
||||
#if USE_CLK_CONTROL_CACHE == TRUE
|
||||
// Use cache for this reg, not update if not change
|
||||
static uint8_t clk_cache[3];
|
||||
if (clk_cache[channel]!=dat) {
|
||||
si5351_write(clkctrl[channel], dat);
|
||||
clk_cache[channel]=dat;
|
||||
}
|
||||
#else
|
||||
si5351_write(clkctrl[channel], dat);
|
||||
#endif
|
||||
}
|
||||
|
||||
// Find better approximate values for n/d
|
||||
#define MAX_DENOMINATOR ((1 << 20) - 1)
|
||||
static inline void approximate_fraction(uint32_t *n, uint32_t *d)
|
||||
{
|
||||
// cf. https://github.com/python/cpython/blob/master/Lib/fractions.py#L227
|
||||
uint32_t denom = *d;
|
||||
if (denom > MAX_DENOMINATOR) {
|
||||
uint32_t num = *n;
|
||||
uint32_t p0 = 0, q0 = 1, p1 = 1, q1 = 0;
|
||||
while (denom != 0) {
|
||||
uint32_t a = num / denom;
|
||||
uint32_t b = num % denom;
|
||||
uint32_t q2 = q0 + a*q1;
|
||||
if (q2 > MAX_DENOMINATOR)
|
||||
break;
|
||||
uint32_t p2 = p0 + a*p1;
|
||||
p0 = p1; q0 = q1; p1 = p2; q1 = q2;
|
||||
num = denom; denom = b;
|
||||
}
|
||||
*n = p1;
|
||||
*d = q1;
|
||||
}
|
||||
}
|
||||
|
||||
// Setup Multisynth divider for get correct output freq if fixed PLL = pllfreq
|
||||
static void
|
||||
si5351_set_frequency_fixedpll(uint8_t channel, uint64_t pllfreq, uint32_t freq, uint32_t rdiv, uint8_t chctrl)
|
||||
{
|
||||
uint32_t denom = freq;
|
||||
uint32_t div = pllfreq / denom; // range: 8 ~ 1800
|
||||
uint32_t num = pllfreq % denom;
|
||||
approximate_fraction(&num, &denom);
|
||||
si5351_setupMultisynth(channel, div, num, denom, rdiv, chctrl);
|
||||
}
|
||||
|
||||
// Setup PLL freq if Multisynth divider fixed = div (need get output = freq/mul)
|
||||
static void
|
||||
si5351_setupPLL_freq(uint32_t pllSource, uint32_t freq, uint32_t div, uint32_t mul)
|
||||
{
|
||||
uint32_t denom = XTALFREQ * mul;
|
||||
uint64_t pllfreq = (uint64_t)freq * div;
|
||||
uint32_t multi = pllfreq / denom;
|
||||
uint32_t num = pllfreq % denom;
|
||||
approximate_fraction(&num, &denom);
|
||||
si5351_setupPLL(pllSource, multi, num, denom);
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void
|
||||
si5351_set_frequency_fixeddiv(uint8_t channel, uint32_t pll, uint32_t freq, uint32_t div,
|
||||
uint8_t chctrl, uint32_t mul)
|
||||
{
|
||||
si5351_setupPLL_freq(pll, freq, div, mul);
|
||||
si5351_setupMultisynth(channel, div, 0, 1, SI5351_R_DIV_1, chctrl);
|
||||
}
|
||||
|
||||
void
|
||||
si5351_set_frequency(int channel, uint32_t freq, uint8_t drive_strength)
|
||||
{
|
||||
if (freq <= 100000000) {
|
||||
si5351_setupPLL(SI5351_PLL_B, 32, 0, 1);
|
||||
si5351_set_frequency_fixedpll(channel, SI5351_PLL_B, PLLFREQ, freq, SI5351_R_DIV_1, drive_strength, 1);
|
||||
} else if (freq < 150000000) {
|
||||
si5351_set_frequency_fixeddiv(channel, SI5351_PLL_B, freq, 6, drive_strength, 1);
|
||||
} else {
|
||||
si5351_set_frequency_fixeddiv(channel, SI5351_PLL_B, freq, 4, drive_strength, 1);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Frequency generation divide on 3 band
|
||||
* Band 1
|
||||
* 1~100MHz fixed PLL = XTALFREQ * PLL_N, fractional divider
|
||||
* Band 2
|
||||
* 100~150MHz fractional PLL = 600- 900MHz, fixed divider 'fdiv = 6'
|
||||
* Band 3
|
||||
* 150~300MHz fractional PLL = 600-1200MHz, fixed divider 'fdiv = 4'
|
||||
*
|
||||
* For FREQ_HARMONICS = 300MHz - band range is:
|
||||
* +-----------------------------------------------------------------------------------------------------------------------+
|
||||
* | Band 1 | Band 2 | Band 3 | Band 2 | Band 3 |
|
||||
* +-----------------------------------------------------------------------------------------------------------------------+
|
||||
* | Direct mode x1 : x1 | x3 : x5 | x5-x7 | x7-x9 | x9-x11 |
|
||||
* +-----------------------------------------------------------------------------------------------------------------------+
|
||||
* | 50kHz - 100MHz | 100 - 150MHz | 150 - 300MHz | 300-450MHz | 450-900MHz | 900-1500MHz | 1500-2100MHz | 2100-2700MHz |
|
||||
* +-----------------------------------------------------------------------------------------------------------------------+
|
||||
* | f = 50kHz-300MHz | f=100-150 | f=150-300 | f=150-300 | f=214-300 | f=233-300 |
|
||||
* | of = 50kHz-300MHz |of= 60- 90 |of= 90-180 |of=128-215 |of=166-234 |of=190-246 |
|
||||
* +-----------------------------------------------------------------------------------------------------------------------+
|
||||
*/
|
||||
static inline uint8_t
|
||||
si5351_get_band(uint32_t freq)
|
||||
{
|
||||
if (freq < 100000000U) return 1;
|
||||
if (freq < 150000000U) return 2;
|
||||
return 3;
|
||||
}
|
||||
|
||||
/*
|
||||
* Maximum supported frequency = FREQ_HARMONICS * 9U
|
||||
* configure output as follows:
|
||||
* CLK0: frequency + offset
|
||||
* CLK1: frequency
|
||||
* CLK2: fixed 8MHz
|
||||
*/
|
||||
int
|
||||
si5351_set_frequency(uint32_t freq, uint8_t drive_strength)
|
||||
{
|
||||
uint8_t band;
|
||||
int delay = DELAY_NORMAL;
|
||||
if (freq == current_freq)
|
||||
return delay;
|
||||
else if (current_freq > freq) // Reset band on sweep begin (if set range 150-600, fix error then 600 MHz band 2 or 3 go back)
|
||||
current_band = 0;
|
||||
current_freq = freq;
|
||||
uint32_t ofreq = freq + current_offset;
|
||||
uint32_t mul = 1, omul = 1;
|
||||
uint32_t rdiv = SI5351_R_DIV_1;
|
||||
uint32_t fdiv;
|
||||
// Fix possible incorrect input
|
||||
drive_strength&=SI5351_CLK_DRIVE_STRENGTH_MASK;
|
||||
|
||||
if (freq >= config.harmonic_freq_threshold * 7U) {
|
||||
mul = 9;
|
||||
omul = 11;
|
||||
} else if (freq >= config.harmonic_freq_threshold * 5U) {
|
||||
mul = 7;
|
||||
omul = 9;
|
||||
} else if (freq >= config.harmonic_freq_threshold * 3U) {
|
||||
mul = 5;
|
||||
omul = 7;
|
||||
} else if (freq >= config.harmonic_freq_threshold) {
|
||||
mul = 3;
|
||||
omul = 5;
|
||||
} else if (freq <= 500000U) {
|
||||
rdiv = SI5351_R_DIV_64;
|
||||
freq<<= 6;
|
||||
ofreq<<= 6;
|
||||
} else if (freq <= 4000000U) {
|
||||
rdiv = SI5351_R_DIV_8;
|
||||
freq<<= 3;
|
||||
ofreq<<= 3;
|
||||
}
|
||||
band = si5351_get_band(freq / mul);
|
||||
switch (band) {
|
||||
case 1:
|
||||
// Setup CH0 and CH1 constant PLLA freq at band change, and set CH2 freq =
|
||||
// CLK2_FREQUENCY
|
||||
if (current_band != 1) {
|
||||
si5351_setupPLL(SI5351_REG_PLL_A, PLL_N, 0, 1);
|
||||
si5351_set_frequency_fixedpll(
|
||||
2, XTALFREQ * PLL_N, CLK2_FREQUENCY, SI5351_R_DIV_1,
|
||||
SI5351_CLK_DRIVE_STRENGTH_2MA | SI5351_CLK_PLL_SELECT_A);
|
||||
delay = DELAY_BANDCHANGE_1;
|
||||
} else {
|
||||
delay = DELAY_BAND_1;
|
||||
}
|
||||
// Calculate and set CH0 and CH1 divider
|
||||
si5351_set_frequency_fixedpll(0, (uint64_t)omul * XTALFREQ * PLL_N, ofreq, rdiv,
|
||||
drive_strength | SI5351_CLK_PLL_SELECT_A);
|
||||
si5351_set_frequency_fixedpll(1, (uint64_t)mul * XTALFREQ * PLL_N, freq, rdiv,
|
||||
drive_strength | SI5351_CLK_PLL_SELECT_A);
|
||||
break;
|
||||
case 2: // fdiv = 6
|
||||
case 3: // fdiv = 4;
|
||||
fdiv = (band == 2) ? 6 : 4;
|
||||
// Setup CH0 and CH1 constant fdiv divider at change
|
||||
if (current_band != band) {
|
||||
si5351_setupMultisynth(0, fdiv, 0, 1, SI5351_R_DIV_1,
|
||||
drive_strength | SI5351_CLK_PLL_SELECT_A);
|
||||
si5351_setupMultisynth(1, fdiv, 0, 1, SI5351_R_DIV_1,
|
||||
drive_strength | SI5351_CLK_PLL_SELECT_B);
|
||||
delay = DELAY_BANDCHANGE_2;
|
||||
} else {
|
||||
delay = DELAY_BAND_2;
|
||||
}
|
||||
// Calculate and set CH0 and CH1 PLL freq
|
||||
si5351_setupPLL_freq(SI5351_REG_PLL_A, ofreq, fdiv,
|
||||
omul); // set PLLA freq = (ofreq/omul)*fdiv
|
||||
si5351_setupPLL_freq(SI5351_REG_PLL_B, freq, fdiv,
|
||||
mul); // set PLLB freq = ( freq/ mul)*fdiv
|
||||
// Calculate CH2 freq = CLK2_FREQUENCY, depend from calculated before CH1 PLLB = (freq/mul)*fdiv
|
||||
si5351_set_frequency_fixedpll(
|
||||
2, (uint64_t)freq * fdiv, CLK2_FREQUENCY * mul, SI5351_R_DIV_1,
|
||||
SI5351_CLK_DRIVE_STRENGTH_2MA | SI5351_CLK_PLL_SELECT_B);
|
||||
break;
|
||||
}
|
||||
if (current_band != band) {
|
||||
si5351_reset_pll(SI5351_PLL_RESET_A|SI5351_PLL_RESET_B);
|
||||
current_band = band;
|
||||
}
|
||||
return delay;
|
||||
}
|
||||
@ -1,77 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com
|
||||
* All rights reserved.
|
||||
*
|
||||
* This is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* The software is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with GNU Radio; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#define SI5351_REG_3_OUTPUT_ENABLE_CONTROL 3
|
||||
#define SI5351_CLK0_EN (1<<0)
|
||||
#define SI5351_CLK1_EN (1<<1)
|
||||
#define SI5351_CLK2_EN (1<<2)
|
||||
|
||||
// Reg 16-18 CLKX_CONTROL
|
||||
#define SI5351_REG_16_CLK0_CONTROL 16
|
||||
#define SI5351_REG_17_CLK1_CONTROL 17
|
||||
#define SI5351_REG_18_CLK2_CONTROL 18
|
||||
#define SI5351_CLK_POWERDOWN (1<<7)
|
||||
#define SI5351_CLK_INTEGER_MODE (1<<6)
|
||||
#define SI5351_CLK_PLL_SELECT_A (0<<5)
|
||||
#define SI5351_CLK_PLL_SELECT_B (1<<5)
|
||||
#define SI5351_CLK_INVERT (1<<4)
|
||||
#define SI5351_CLK_INPUT_MASK (3<<2)
|
||||
#define SI5351_CLK_INPUT_XTAL (0<<2)
|
||||
#define SI5351_CLK_INPUT_CLKIN (1<<2)
|
||||
#define SI5351_CLK_INPUT_MULTISYNTH_0_4 (2<<2)
|
||||
#define SI5351_CLK_INPUT_MULTISYNTH_N (3<<2)
|
||||
#define SI5351_CLK_DRIVE_STRENGTH_MASK (3<<0)
|
||||
#define SI5351_CLK_DRIVE_STRENGTH_2MA (0<<0)
|
||||
#define SI5351_CLK_DRIVE_STRENGTH_4MA (1<<0)
|
||||
#define SI5351_CLK_DRIVE_STRENGTH_6MA (2<<0)
|
||||
#define SI5351_CLK_DRIVE_STRENGTH_8MA (3<<0)
|
||||
|
||||
#define SI5351_REG_PLL_A 26
|
||||
#define SI5351_REG_PLL_B 34
|
||||
|
||||
#define SI5351_REG_42_MULTISYNTH0 42
|
||||
#define SI5351_REG_50_MULTISYNTH1 50
|
||||
#define SI5351_REG_58_MULTISYNTH2 58
|
||||
#define SI5351_DIVBY4 (3<<2)
|
||||
#define SI5351_R_DIV_1 (0<<4)
|
||||
#define SI5351_R_DIV_2 (1<<4)
|
||||
#define SI5351_R_DIV_4 (2<<4)
|
||||
#define SI5351_R_DIV_8 (3<<4)
|
||||
#define SI5351_R_DIV_16 (4<<4)
|
||||
#define SI5351_R_DIV_32 (5<<4)
|
||||
#define SI5351_R_DIV_64 (6<<4)
|
||||
#define SI5351_R_DIV_128 (7<<4)
|
||||
|
||||
#define SI5351_REG_177_PLL_RESET 177
|
||||
#define SI5351_PLL_RESET_B (1<<7)
|
||||
#define SI5351_PLL_RESET_A (1<<5)
|
||||
|
||||
#define SI5351_REG_183_CRYSTAL_LOAD 183
|
||||
#define SI5351_CRYSTAL_LOAD_6PF (1<<6)
|
||||
#define SI5351_CRYSTAL_LOAD_8PF (2<<6)
|
||||
#define SI5351_CRYSTAL_LOAD_10PF (3<<6)
|
||||
|
||||
void si5351_init(void);
|
||||
void si5351_disable_output(void);
|
||||
void si5351_enable_output(void);
|
||||
|
||||
void si5351_set_frequency_offset(int32_t offset);
|
||||
int si5351_set_frequency(uint32_t freq, uint8_t drive_strength);
|
||||
uint32_t si5351_get_frequency(void);
|
||||
@ -1,144 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2014-2015, TAKAHASHI Tomohiro (TTRFTECH) edy555@gmail.com
|
||||
* All rights reserved.
|
||||
*
|
||||
* This is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* The software is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with GNU Radio; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
#include "hal.h"
|
||||
#include "nanovna.h"
|
||||
|
||||
#define REFCLK_8000KHZ
|
||||
#define AIC3204_ADDR 0x18
|
||||
|
||||
#define wait_ms(ms) chThdSleepMilliseconds(ms)
|
||||
|
||||
static const uint8_t conf_data[] = {
|
||||
// reg, data,
|
||||
// PLL clock config
|
||||
0x00, 0x00, /* Initialize to Page 0 */
|
||||
0x01, 0x01, /* Initialize the device through software reset */
|
||||
0x04, 0x43, /* PLL Clock High, MCLK, PLL */
|
||||
#ifdef REFCLK_8000KHZ
|
||||
/* 8.000MHz*10.7520 = 86.016MHz, 86.016MHz/(2*7*128) = 48kHz */
|
||||
0x05, 0x91, /* Power up PLL, P=1,R=1 */
|
||||
0x06, 0x0a, /* J=10 */
|
||||
0x07, 29, /* D=7520 = (29<<8) + 96 */
|
||||
0x08, 96,
|
||||
#endif
|
||||
// Clock config, default fs=48kHz
|
||||
0x0b, 0x82, /* Power up the NDAC divider with value 2 */
|
||||
0x0c, 0x87, /* Power up the MDAC divider with value 7 */
|
||||
0x0d, 0x00, /* Program the OSR of DAC to 128 */
|
||||
0x0e, 0x80,
|
||||
0x3c, 0x08, /* Set the DAC Mode to PRB_P8 */
|
||||
//0x3c, 25, /* Set the DAC Mode to PRB_P25 */
|
||||
0x1b, 0x0c, /* Set the BCLK,WCLK as output */
|
||||
0x1e, 0x80 + 28, /* Enable the BCLKN divider with value 28 */
|
||||
0x25, 0xee, /* DAC power up */
|
||||
|
||||
0x12, 0x82, /* Power up the NADC divider with value 2 */
|
||||
0x13, 0x87, /* Power up the MADC divider with value 7 */
|
||||
0x14, 0x80, /* Program the OSR of ADC to 128 */
|
||||
0x3d, 0x01, /* Select ADC PRB_R1 */
|
||||
// Data routing
|
||||
0x00, 0x01, /* Select Page 1 */
|
||||
0x01, 0x08, /* Disable Internal Crude AVdd in presence of external AVdd supply or before powering up internal AVdd LDO*/
|
||||
0x02, 0x01, /* Enable Master Analog Power Control */
|
||||
0x7b, 0x01, /* Set the REF charging time to 40ms */
|
||||
0x14, 0x25, /* HP soft stepping settings for optimal pop performance at power up Rpop used is 6k with N = 6 and soft step = 20usec. This should work with 47uF coupling capacitor. Can try N=5,6 or 7 time constants as well. Trade-off delay vs “pop” sound. */
|
||||
0x0a, 0x33, /* Set the Input Common Mode to 0.9V and Output Common Mode for Headphone to 1.65V */
|
||||
|
||||
0x3d, 0x00, /* Select ADC PTM_R4 */
|
||||
0x47, 0x32, /* Set MicPGA startup delay to 3.1ms */
|
||||
0x7b, 0x01, /* Set the REF charging time to 40ms */
|
||||
0x34, 0x10, /* Route IN2L to LEFT_P with 10K */
|
||||
0x36, 0x10, /* Route IN2R to LEFT_N with 10K */
|
||||
//0x37, 0x04, /* Route IN3R to RIGHT_P with 10K */
|
||||
//0x39, 0x04, /* Route IN3L to RIGHT_N with 10K */
|
||||
//0x3b, 0x00, /* Unmute Left MICPGA, Gain selection of 32dB to make channel gain 0dB */
|
||||
//0x3c, 0x00, /* Unmute Right MICPGA, Gain selection of 32dB to make channel gain 0dB */
|
||||
};
|
||||
|
||||
static const uint8_t conf_data_unmute[] = {
|
||||
// reg, data,
|
||||
0x00, 0x00, /* Select Page 0 */
|
||||
0x51, 0xc0, /* Power up Left and Right ADC Channels */
|
||||
0x52, 0x00, /* Unmute Left and Right ADC Digital Volume Control */
|
||||
};
|
||||
|
||||
static const uint8_t conf_data_ch3_select[] = {
|
||||
// reg, data,
|
||||
0x00, 0x01, /* Select Page 1 */
|
||||
0x37, 0x04, /* Route IN3R to RIGHT_P with input impedance of 10K */
|
||||
0x39, 0x04, /* Route IN3L to RIGHT_N with input impedance of 10K */
|
||||
};
|
||||
|
||||
static const uint8_t conf_data_ch1_select[] = {
|
||||
// reg, data,
|
||||
0x00, 0x01, /* Select Page 1 */
|
||||
0x37, 0x40, /* Route IN1R to RIGHT_P with input impedance of 10K */
|
||||
0x39, 0x10, /* Route IN1L to RIGHT_N with input impedance of 10K */
|
||||
};
|
||||
|
||||
static inline void
|
||||
tlv320aic3204_bulk_write(const uint8_t *buf, int len)
|
||||
{
|
||||
(void)i2cMasterTransmitTimeout(&I2CD1, AIC3204_ADDR, buf, len, NULL, 0, 1000);
|
||||
}
|
||||
|
||||
#if 0
|
||||
static int
|
||||
tlv320aic3204_read(uint8_t d0)
|
||||
{
|
||||
int addr = AIC3204_ADDR;
|
||||
uint8_t buf[] = { d0 };
|
||||
i2cAcquireBus(&I2CD1);
|
||||
i2cMasterTransmitTimeout(&I2CD1, addr, buf, 1, buf, 1, 1000);
|
||||
i2cReleaseBus(&I2CD1);
|
||||
return buf[0];
|
||||
}
|
||||
#endif
|
||||
|
||||
static void
|
||||
tlv320aic3204_config(const uint8_t *data, int len)
|
||||
{
|
||||
i2cAcquireBus(&I2CD1);
|
||||
for (; len--; data += 2)
|
||||
tlv320aic3204_bulk_write(data, 2);
|
||||
i2cReleaseBus(&I2CD1);
|
||||
}
|
||||
|
||||
void tlv320aic3204_init(void)
|
||||
{
|
||||
tlv320aic3204_config(conf_data, sizeof(conf_data)/2);
|
||||
wait_ms(40);
|
||||
tlv320aic3204_config(conf_data_unmute, sizeof(conf_data_unmute)/2);
|
||||
}
|
||||
|
||||
void tlv320aic3204_select(int channel)
|
||||
{
|
||||
tlv320aic3204_config(channel ? conf_data_ch1_select : conf_data_ch3_select, sizeof(conf_data_ch3_select)/2);
|
||||
}
|
||||
|
||||
void tlv320aic3204_set_gain(int lgain, int rgain)
|
||||
{
|
||||
uint8_t data[] = {
|
||||
0x00, 0x01, /* Select Page 1 */
|
||||
0x3b, lgain, /* Unmute Left MICPGA, set gain */
|
||||
0x3c, rgain, /* Unmute Right MICPGA, set gain */
|
||||
};
|
||||
tlv320aic3204_config(data, sizeof(data)/2);
|
||||
}
|
||||
Loading…
Reference in new issue