From 726156e4d79a20291f14b03bac11dd6c3c78a1a3 Mon Sep 17 00:00:00 2001 From: erikkaashoek Date: Wed, 3 Feb 2021 13:18:11 +0100 Subject: [PATCH] Modulation repaired --- sa_core.c | 4 ++-- si4432.c | 36 ++++++++++++++++++++++-------------- ui.c | 1 + 3 files changed, 25 insertions(+), 16 deletions(-) diff --git a/sa_core.c b/sa_core.c index 386e1e1..7f872f0 100644 --- a/sa_core.c +++ b/sa_core.c @@ -2405,8 +2405,8 @@ modulation_again: if (MODE_OUTPUT(setting.mode)) { // No substepping and no RSSI in output mode if (break_on_operation && operation_requested) // break subscanning if requested return(0); // abort - if (MODE_OUTPUT(setting.mode) && setting.modulation != MO_NONE && setting.modulation != MO_EXTERNAL) { // if in output mode with modulation - i = 1; // Everything set so skip LO setting + if (i == 1 && MODE_OUTPUT(setting.mode) && setting.modulation != MO_NONE && setting.modulation != MO_EXTERNAL) { // if in output mode with modulation +// i = 1; // Everything set so skip LO setting goto modulation_again; // Keep repeating sweep loop till user aborts by input } return(0); diff --git a/si4432.c b/si4432.c index 5152123..5416dd9 100644 --- a/si4432.c +++ b/si4432.c @@ -45,11 +45,11 @@ #define SI4432_SPI SPI1 //#define SI4432_SPI_SPEED SPI_BR_DIV64 //#define SI4432_SPI_SPEED SPI_BR_DIV32 -#define SI4432_SPI_SPEED SPI_BR_DIV8 +#define SI4432_SPI_SPEED SPI_BR_DIV32 //#define ADF_SPI_SPEED SPI_BR_DIV64 //#define ADF_SPI_SPEED SPI_BR_DIV32 -#define ADF_SPI_SPEED SPI_BR_DIV8 +#define ADF_SPI_SPEED SPI_BR_DIV32 static uint32_t old_spi_settings; #else @@ -1088,6 +1088,7 @@ void ADF4351_Set(int channel) for (int i = 5; i >= 0; i--) { ADF4351_WriteRegister32(channel, registers[i]); } + SPI_BR_SET(SI4432_SPI, SI4432_SPI_SPEED); } #if 0 @@ -1379,9 +1380,9 @@ static void SI4463_set_state(si446x_state_t); #define SI4463_READ_CTS (palReadLine(LINE_RX_CTS)) -int SI4463_wait_for_cts(void) +static int SI4463_wait_for_cts(void) { - set_SPI_mode(SPI_MODE_SI); +// set_SPI_mode(SPI_MODE_SI); while (!SI4463_READ_CTS) { // chThdSleepMicroseconds(100); my_microsecond_delay(1); @@ -1390,7 +1391,7 @@ int SI4463_wait_for_cts(void) } -void SI4463_write_byte(uint8_t ADR, uint8_t DATA) +static void SI4463_write_byte(uint8_t ADR, uint8_t DATA) { set_SPI_mode(SPI_MODE_SI); SI_CS_LOW; @@ -1400,7 +1401,7 @@ void SI4463_write_byte(uint8_t ADR, uint8_t DATA) SI_CS_HIGH; } -void SI4463_write_buffer(uint8_t ADR, uint8_t *DATA, int len) +static void SI4463_write_buffer(uint8_t ADR, uint8_t *DATA, int len) { set_SPI_mode(SPI_MODE_SI); SI_CS_LOW; @@ -1412,7 +1413,7 @@ void SI4463_write_buffer(uint8_t ADR, uint8_t *DATA, int len) } -uint8_t SI4463_read_byte( uint8_t ADR ) +static uint8_t SI4463_read_byte( uint8_t ADR ) { uint8_t DATA ; set_SPI_mode(SPI_MODE_SI); @@ -1423,14 +1424,15 @@ uint8_t SI4463_read_byte( uint8_t ADR ) return DATA ; } -uint8_t SI4463_get_response(void* buff, uint8_t len) +static uint8_t SI4463_get_response(void* buff, uint8_t len) { uint8_t cts = 0; - set_SPI_mode(SPI_MODE_SI); +// set_SPI_mode(SPI_MODE_SI); cts = SI4463_READ_CTS; if (!cts) { return false; } +// __disable_irq(); SI_CS_LOW; shiftOut( SI446X_CMD_READ_CMD_BUFF ); cts = (shiftIn() == 0xFF); @@ -1442,10 +1444,11 @@ uint8_t SI4463_get_response(void* buff, uint8_t len) } } SI_CS_HIGH; +// __enable_irq(); return cts; } -uint8_t SI4463_wait_response(void* buff, uint8_t len, uint8_t use_timeout) +static uint8_t SI4463_wait_response(void* buff, uint8_t len, uint8_t use_timeout) { uint16_t timeout = 40000; while(!SI4463_get_response(buff, len)) @@ -1471,12 +1474,14 @@ void SI4463_do_api(void* data, uint8_t len, void* out, uint8_t outLen) { // SPI_BR_SET(SI4432_SPI, SPI_BR_DIV8); +// __disable_irq(); SI_CS_LOW; for(uint8_t i=0;i