Merge branch 'DiSlord_test_branch'

pull/4/head
erikkaashoek 6 years ago
commit 68f31f1485

@ -1557,10 +1557,15 @@ float perform(bool break_on_operation, int i, uint32_t f, int tracking) // M
// shell_printf("%d %.3f %.3f %.1f\r\n", i, local_IF/1000000.0, lf/1000000.0, subRSSI);
// ************** trigger mode if need
#define T_LEVEL_UNDEF (1<<(16-2)) // should drop after 2 shifts left
// trigger on measure 4 point
#define T_POINTS 4
#define T_LEVEL_UNDEF (1<<(16-T_POINTS)) // should drop after 4 shifts left
#define T_LEVEL_BELOW 1
#define T_LEVEL_ABOVE 0
#define T_LEVEL_CLEAN ~(1<<2) // cleanup old trigger data
// Trigger mask, should have width T_POINTS bit
#define T_DOWN_MASK (0b0011) // 2 from up 2 to bottom
#define T_UP_MASK (0b1100) // 2 from bottom 2 to up
#define T_LEVEL_CLEAN ~(1<<T_POINTS) // cleanup old trigger data
if (i == 0 && setting.frequency_step == 0 && setting.trigger != T_AUTO) { // if in zero span mode and wait for trigger to happen and NOT in trigger mode
register uint16_t t_mode;
@ -1570,10 +1575,12 @@ float perform(bool break_on_operation, int i, uint32_t f, int tracking) // M
trigger_lvl = (setting.trigger_level - correct_RSSI) * 32;
if (setting.trigger_direction == T_UP)
t_mode = (T_LEVEL_BELOW<<1)|T_LEVEL_ABOVE; // from bottom to up
t_mode = T_UP_MASK;
else
t_mode = (T_LEVEL_ABOVE<<1)|T_LEVEL_BELOW; // from up to bottom
t_mode = T_DOWN_MASK;
uint32_t count = 32;
uint32_t additional_delay = 0;// reduce noise
if (setting.sweep_time_us >= 100*ONE_MS_TIME) additional_delay = 20;
do{ // wait for trigger to happen
pureRSSI = SI4432_Read_Byte(SI4432_REG_RSSI)<<4;
if (break_on_operation && operation_requested) // allow aborting a wait for trigger
@ -1582,8 +1589,16 @@ float perform(bool break_on_operation, int i, uint32_t f, int tracking) // M
// Store data level bitfield (remember only last 2 states)
// T_LEVEL_UNDEF mode bit drop after 2 shifts
data_level = ((data_level<<1) | (pureRSSI < trigger_lvl ? T_LEVEL_BELOW : T_LEVEL_ABOVE))&(T_LEVEL_CLEAN);
// wait trigger
}while(data_level != t_mode); // trigger level change
if (data_level == t_mode) // wait trigger
break;
// DIRTY HACK!!! FIX ME HERE
// not get data after dirty = true apply in code at first run!!!!
if (pureRSSI == 0 && --count == 0)
break;
if (additional_delay)
my_microsecond_delay(additional_delay);
}while(1);
#ifdef __FAST_SWEEP__
if (setting.spur == 0 && SI4432_step_delay == 0 && setting.repeat == 1 && setting.sweep_time_us < 100*ONE_MS_TIME) {
SI4432_Fill(MODE_SELECT(setting.mode), 1); // fast mode possible to pre-fill RSSI buffer

@ -137,7 +137,7 @@ void SI4432_Write_Byte(byte ADR, byte DATA )
// if (SI4432_guard)
// while(1) ;
// SI4432_guard = 1;
SPI2_CLK_LOW;
// SPI2_CLK_LOW;
palClearPad(GPIOC, SI_nSEL[SI4432_Sel]);
// chThdSleepMicroseconds(SELECT_DELAY);
ADR |= 0x80 ; // RW = 1
@ -152,7 +152,7 @@ void SI4432_Write_3_Byte(byte ADR, byte DATA1, byte DATA2, byte DATA3 )
// if (SI4432_guard)
// while(1) ;
// SI4432_guard = 1;
SPI2_CLK_LOW;
// SPI2_CLK_LOW;
palClearPad(GPIOC, SI_nSEL[SI4432_Sel]);
// chThdSleepMicroseconds(SELECT_DELAY);
ADR |= 0x80 ; // RW = 1
@ -170,7 +170,7 @@ byte SI4432_Read_Byte( byte ADR )
// if (SI4432_guard)
// while(1) ;
// SI4432_guard = 1;
SPI2_CLK_LOW;
// SPI2_CLK_LOW;
palClearPad(GPIOC, SI_nSEL[SI4432_Sel]);
shiftOut( ADR );
DATA = shiftIn();
@ -607,7 +607,7 @@ void SI4432_Init()
CS_SI1_HIGH;
chThdSleepMilliseconds(10); // Wait
#endif
SPI2_CLK_LOW;
//DebugLine("IO set");
SI4432_Sel = SI4432_RX;
SI4432_Sub_Init();
@ -683,7 +683,7 @@ bool PE4302_Write_Byte(unsigned char DATA )
if (old_attenuation == DATA)
return false;
// chThdSleepMicroseconds(PE4302_DELAY);
SPI2_CLK_LOW;
// SPI2_CLK_LOW;
// chThdSleepMicroseconds(PE4302_DELAY);
// PE4302_shiftOut(DATA);

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