diff --git a/NANOVNA_STM32_F303/board.h b/NANOVNA_STM32_F303/board.h
index 0811b95..a198f83 100644
--- a/NANOVNA_STM32_F303/board.h
+++ b/NANOVNA_STM32_F303/board.h
@@ -63,7 +63,8 @@
 #define GPIOA_XP				6
 #define GPIOA_YP				7
 //#define GPIOA_MCO				8
-#define GPIOA_PE_SEL            9
+#define GPIO_PE_SEL            9
+#define GPIO_PE            GPIOA
 #define GPIOA_RF_PWR 			10
 #define GPIOA_USB_DM            11
 #define GPIOA_USB_DP            12
@@ -134,7 +135,7 @@
                                      PIN_MODE_ANALOG(GPIOA_XP) |    \
                                      PIN_MODE_ANALOG(GPIOA_YP) |    \
                                      PIN_MODE_ALTERNATE(8U) | \
-                                     PIN_MODE_OUTPUT(GPIOA_PE_SEL) |           \
+                                     PIN_MODE_OUTPUT(GPIO_PE_SEL) |           \
                                      PIN_MODE_OUTPUT(GPIOA_RF_PWR) | \
                                      PIN_MODE_ALTERNATE(GPIOA_USB_DM) |  \
                                      PIN_MODE_ALTERNATE(GPIOA_USB_DP) |  \
@@ -150,7 +151,7 @@
                                      PIN_OTYPE_PUSHPULL(6U) |       \
                                      PIN_OTYPE_PUSHPULL(7U) |       \
                                      PIN_OTYPE_PUSHPULL(8U) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PE_SEL) |       \
+                                     PIN_OTYPE_PUSHPULL(GPIO_PE_SEL) |       \
                                      PIN_OTYPE_PUSHPULL(GPIOA_RF_PWR) | \
                                      PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) |  \
                                      PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) |  \
@@ -166,7 +167,7 @@
                                      PIN_OSPEED_2M(6) |          \
                                      PIN_OSPEED_2M(7) |          \
                                      PIN_OSPEED_100M(8U) | \
-                                     PIN_OSPEED_100M(GPIOA_PE_SEL) |          \
+                                     PIN_OSPEED_100M(GPIO_PE_SEL) |          \
                                      PIN_OSPEED_100M(GPIOA_RF_PWR) |         \
                                      PIN_OSPEED_100M(GPIOA_USB_DM) |     \
                                      PIN_OSPEED_100M(GPIOA_USB_DP) |     \
@@ -182,7 +183,7 @@
                                      PIN_PUPDR_FLOATING(6) |         \
                                      PIN_PUPDR_FLOATING(7) |         \
                                      PIN_PUPDR_PULLUP(8U) | \
-                                     PIN_PUPDR_PULLUP(GPIOA_PE_SEL) |         \
+                                     PIN_PUPDR_PULLUP(GPIO_PE_SEL) |         \
                                      PIN_PUPDR_PULLUP(GPIOA_RF_PWR) | \
                                      PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
                                      PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
@@ -198,7 +199,7 @@
                                      PIN_ODR_HIGH(6) |             \
                                      PIN_ODR_HIGH(7) |             \
                                      PIN_ODR_HIGH(8U) |     \
-                                     PIN_ODR_HIGH(GPIOA_PE_SEL) |             \
+                                     PIN_ODR_HIGH(GPIO_PE_SEL) |             \
                                      PIN_ODR_HIGH(GPIOA_RF_PWR) | \
                                      PIN_ODR_HIGH(GPIOA_USB_DM) |   \
                                      PIN_ODR_HIGH(GPIOA_USB_DP) |   \
@@ -214,7 +215,7 @@
                                      PIN_AFIO_AF(6, 0) |           \
                                      PIN_AFIO_AF(7, 0))
 #define VAL_GPIOA_AFRH              (PIN_AFIO_AF(8U, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PE_SEL, 0) |           \
+                                     PIN_AFIO_AF(GPIO_PE_SEL, 0) |           \
                                      PIN_AFIO_AF(GPIOA_RF_PWR, 0) |          \
                                      PIN_AFIO_AF(GPIOA_USB_DM, 14) |     \
                                      PIN_AFIO_AF(GPIOA_USB_DP, 14) |     \
diff --git a/sa_core.c b/sa_core.c
index be475a7..53a7d1a 100644
--- a/sa_core.c
+++ b/sa_core.c
@@ -1114,7 +1114,7 @@ void setupSA(void)
 #ifdef __SI4432__
   SI4432_Init();
 #endif
-  for (int i = 0; i < sizeof(old_freq)/sizeof(unsigned long) ; i++) {
+  for (unsigned int i = 0; i < sizeof(old_freq)/sizeof(unsigned long) ; i++) {
     old_freq[i] = 0;
     real_old_freq[i] = 0;
   }
@@ -1427,7 +1427,7 @@ void update_rbw(void)           // calculate the actual_rbw and the vbwSteps (#
 #ifdef __SI4463__
 //  if (setting.spur_removal && actual_rbw_x10 > 3000)      // Will depend on BPF width <------------------ TODO -------------------------
 //    actual_rbw_x10 = 3000;                         // if spur suppression reduce max rbw to fit within BPF
-  actual_rbw_x10 = SI4463_SET_RBW(actual_rbw_x10);  // see what rbw the SI4432 can realize
+  actual_rbw_x10 = set_rbw(actual_rbw_x10);  // see what rbw the SI4432 can realize
 #endif
   if (setting.frequency_step > 0 && MODE_INPUT(setting.mode)) { // When doing frequency scanning in input mode
     vbwSteps = ((int)(2 * (setting.vbw_x10 + (actual_rbw_x10/2)) / actual_rbw_x10)); // calculate # steps in between each frequency step due to rbw being less than frequency step
@@ -2277,7 +2277,7 @@ sweep_again:                                // stay in sweep loop when output mo
 #ifdef __DEBUG_AGC__                 // For debugging the AGC control
       stored_t[i] = (SI4432_Read_Byte(0x69) & 0x01f) * 3.0 - 90.0; // Display the AGC value in the stored trace
 #endif
-
+#endif
 #ifdef __SI4432__
       if (check_for_AM) {
         int AGC_value = (SI4432_Read_Byte(0x69) & 0x01f) * 3.0 - 90.0;
@@ -3826,7 +3826,7 @@ void self_test(int test)
 #endif
       setting.step_delay = setting.step_delay * 5 / 4;
       setting.offset_delay = setting.step_delay / 2;
-      setting.rbw_x10 = force_RBW(j);
+      setting.rbw_x10 = force_rbw(j);
 
       shell_printf("RBW = %f, ",setting.rbw_x10/10.0);
 #if 0
diff --git a/si4432.c b/si4432.c
index 48fd21a..bd134f4 100644
--- a/si4432.c
+++ b/si4432.c
@@ -74,8 +74,8 @@ static uint32_t new_port_moder;
 #define SPI1_SDO       ((palReadPort(GPIOB)>>GPIOB_SPI_MISO)&1)
 #define SPI1_portSDO   (palReadPort(GPIOB)&(1<<GPIOB_SPI_MISO))
 #ifdef __PE4302__
-#define CS_PE_HIGH      palSetPad(GPIOC, GPIO_PE_SEL)
-#define CS_PE_LOW      palClearPad(GPIOC, GPIO_PE_SEL)
+#define CS_PE_HIGH      palSetPad(GPIO_PE, GPIO_PE_SEL)
+#define CS_PE_LOW      palClearPad(GPIO_PE, GPIO_PE_SEL)
 #endif
 
 //#define MAXLOG 1024
@@ -2029,7 +2029,7 @@ static pureRSSI_t SI4463_RSSI_correction = float_TO_PURE_RSSI(-120);
 static int prev_band = -1;
 
 
-uint16_t SI4463_force_RBW(int f)
+uint16_t force_rbw(int f)
 {
   if (SI4463_in_tx_mode)
     return(0);
@@ -2050,12 +2050,12 @@ uint16_t SI4463_force_RBW(int f)
   return RBW_choices[f].RBWx10;                                                   // RBW achieved by SI4463 in kHz * 10
 }
 
-uint16_t SI4463_SET_RBW(uint16_t WISH)  {
+uint16_t set_rbw(uint16_t WISH)  {
   int i;
   for (i=0; i < (int)(sizeof(RBW_choices)/sizeof(RBW_t)) - 1; i++)
     if (WISH <= RBW_choices[i].RBWx10 * 15/10)
       break;
-  return SI4463_force_RBW(i);
+  return force_rbw(i);
 }