diff --git a/sa_cmd.c b/sa_cmd.c
index ce1cbc9..b9a8b63 100644
--- a/sa_cmd.c
+++ b/sa_cmd.c
@@ -784,7 +784,7 @@ VNA_SHELL_FUNCTION(cmd_scanraw)
 
   for (uint32_t i = 0; i<points; i++) {
     int val = perform(false, i, start +(freq_t)(f_step * i), false) + float_TO_PURE_RSSI(EXT_ZERO_LEVEL);
-    if (operation_requested) // break on operation in perform
+    if (operation_requested && SDU1.config->usbp->state != USB_ACTIVE) // break on operation in perform
       break;
     streamPut(shell_stream, 'x');
     streamPut(shell_stream, (uint8_t)(val & 0xFF));
diff --git a/sa_core.c b/sa_core.c
index 5644e4e..52e90cf 100644
--- a/sa_core.c
+++ b/sa_core.c
@@ -1789,10 +1789,12 @@ static  freq_t spur_table[] =                                 // Frequencies to
  10960000,
  11600000,
  12960000,
+ 14933000,
  14960000,
  16960000,
  18960000,
  21600000,
+
 // 22960000,
  24960000,
  28960000,
@@ -2003,7 +2005,7 @@ pureRSSI_t perform(bool break_on_operation, int i, freq_t f, int tracking)     /
     }
     if (MODE_INPUT(setting.mode)) {
       calculate_static_correction();
-      clock_above_48MHz();
+      if (!in_selftest) clock_above_48MHz();
       is_below = false;
     }
     //    if (MODE_OUTPUT(setting.mode) && setting.additional_step_delay_us < 500)     // Minimum wait time to prevent LO from lockup during output frequency sweep
@@ -2417,6 +2419,37 @@ modulation_again:
 #endif
     }
 
+#if 1               // No 72MHz spur avoidance yet
+        if (setting.mode == M_LOW && !in_selftest /* && !(SDU1.config->usbp->state == USB_ACTIVE) */ ) {         // Avoid 72MHz spur
+          int set_below = false;
+#ifdef TINYSA4
+          if (lf < 40000000) {
+            uint32_t tf = lf;
+            while (tf > 4000000) tf -= 4000000;
+            if (tf < 2000000 )
+              set_below = true;
+          } else
+#endif
+          if (lf > 40000000){
+            uint32_t tf = lf;
+            while (tf > 48000000) tf -= 48000000;
+            if (tf < 20000000 )
+              set_below = true;
+          }
+          if (set_below) {     // If below 48MHz
+            if (!is_below) {
+              clock_below_48MHz();
+              is_below = true;
+            }
+          } else {
+            if (is_below) {
+              clock_above_48MHz();
+              is_below = false;
+            }
+          }
+        }
+#endif
+
 // ----------- Set IF ------------------
 
     if (local_IF != 0)                  // When not in one of the high modes
@@ -3481,7 +3514,9 @@ const test_case_t test_case [] =
  {TC_MEASURE,   TPH_30MHZ,      300,    4,      -48,    10,     -65 },       // 14 Calibrate power high mode
  {TC_MEASURE,   TPH_30MHZ_SWITCH,300,    4,      -40,    10,     -65 },       // 14 Calibrate power high mode
 #define TEST_ATTEN    21
- {TC_ATTEN,      TP_30MHZ,       30,     0,      -25,    145,     -60 }      // 20 Measure atten step accuracy
+ {TC_ATTEN,      TP_30MHZ,       30,     0,      -25,    145,     -60 },      // 20 Measure atten step accuracy
+#define TEST_SPUR    22
+ {TC_BELOW,      TP_SILENT,     144,     8,      -95,    0,     0 },       // 22 Measure 48MHz spur
 };
 
 
@@ -4106,9 +4141,27 @@ void self_test(int test)
       set_sweep_frequency(ST_SPAN, 0);
       break;
     }
-    in_selftest = false;
 #endif
+  } else if (test == 6) {
+    in_selftest = true;               // Spur search
+    reset_settings(M_LOW);
+    test_prepare(TEST_SPUR);
+    setting.extra_lna = true;
+    for (int i = 0; i < 31; i++) {
+      hsical = (RCC->CR & 0xff00) >> 8;
+      RCC->CR &= RCC_CR_HSICAL;
+      RCC->CR |= ( (hsical) << 8 );
+      RCC->CR &= RCC_CR_HSITRIM | RCC_CR_HSION; /* CR Reset value.              */
+      RCC->CR |= (i << 3 ) & RCC_CR_HSITRIM;
+      set_RBW(100);
+      test_acquire(TEST_SPUR);                        // Acquire test
+      shell_printf("%d: %9.3q\n\r",i, peakFreq);
+      test_validate(TEST_SPUR);                       // Validate test
+
+    }
+
   }
+
   show_test_info = FALSE;
   in_selftest = false;
   test_wait = false;