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@ -24,7 +24,7 @@
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#include "spi.h"
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#pragma GCC push_options
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#pragma GCC optimize ("O0")
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#pragma GCC optimize ("O2")
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//#define __USE_FRR_FOR_RSSI__
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@ -345,6 +345,7 @@ static const enum {
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#define CS_ADF0_HIGH {palSetLine(LINE_LO_SEL);ADF_CS_DELAY;}
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#define CS_ADF0_LOW {palClearLine(LINE_LO_SEL);ADF_CS_DELAY;}
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bool ADF4351_dirty = false;
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void ADF4351_WriteRegister32(int channel, const uint32_t value)
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{
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@ -357,7 +358,8 @@ void ADF4351_WriteRegister32(int channel, const uint32_t value)
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SPI_WRITE_8BIT(SI4432_SPI, (value >> 16));
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SPI_WRITE_8BIT(SI4432_SPI, (value >> 8));
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SPI_WRITE_8BIT(SI4432_SPI, (value >> 0));
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while (SPI_IS_BUSY(SI4432_SPI)); // drop rx and wait tx
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ADF4351_dirty = true;
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// while (SPI_IS_BUSY(SI4432_SPI)); // drop rx and wait tx
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#else
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shiftOut((value >> 24) & 0xFF);
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shiftOut((value >> 16) & 0xFF);
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@ -365,7 +367,15 @@ void ADF4351_WriteRegister32(int channel, const uint32_t value)
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shiftOut((value >> 0) & 0xFF);
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#endif
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// unselect
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CS_ADF0_HIGH;
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// CS_ADF0_HIGH;
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}
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void ADF4351_Latch(void)
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{
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if (ADF4351_dirty == false)
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return;
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while (SPI_IS_BUSY(SI4432_SPI)); // drop rx and wait tx
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CS_ADF0_HIGH;
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}
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void sendConfig(void) {
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@ -384,28 +394,29 @@ void sendConfig(void) {
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if (reg!=reg_5) {ADF4351_WriteRegister32(id, reg); reg_5 = reg;}
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// reg 4
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// fb rf divider bs divider VCO down mtld aux sel aux en aux pwr rf en rf pwr register 4
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// fb rf divider bs divider VCO down mtld aux sel aux en aux pwr rf en rf pwr register 4
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reg = (feedbackFromDivided<<23) | (out_div<<20) | (bsDivider<<12) | (powerDown<<11) | (0<<10) | (0<<9) | (auxEnable<<8) | (auxPower<<6) | (rfEnable<<5) | (rfPower<<3) | 0b100;
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if (reg!=reg_4) {ADF4351_WriteRegister32(id, reg); reg_4 = reg;}
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if (reg!=reg_4) {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_4 = reg;}
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// reg 3
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// bscm | csr mutedel clkdiv mode clkdiv register 3
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reg = (bscm<<23) | (csr<<18) | (0<<17) | (clkDivMode<<15) | (clkDivDivider<<3) | 0b011;
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if (reg!=reg_3) {ADF4351_WriteRegister32(id, reg); reg_3 = reg;}
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if (reg!=reg_3) {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_3 = reg;}
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// reg 2 cp three reset
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// LD speed noise mode muxout ref dbr ref div2 R DB CP current LDF LDP PD pol powerdown state counter register 2
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reg = (LDS<<31) | (noiseMode<<29) | (mux<<26) | (refDouble<<25) | (refDiv2 << 24) | (R<<14) | (0<<13) | (cpCurrent<<9) | (LDF<<8) | (LDP<<7) | (1<<6) | (pdwn<<5) | (0<<4) | (0<<3) | 0b010;
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if (reg!=reg_2) {ADF4351_WriteRegister32(id, reg); reg_2 = reg;}
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if (reg!=reg_2) {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_2 = reg;}
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// reg 1
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// CP mode CP test phase frac modulus
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reg = (CP_Mode<<29) | (CP_Test<<27) | (phase<<15) | (modulus<<3) | 0b001;
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if (reg!=reg_1) {ADF4351_WriteRegister32(id, reg); reg_1 = reg;}
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if (reg!=reg_1) {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_1 = reg;}
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// reg 0 (need always send for apply some reg 1 - 5 settings
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reg = (fractional<<31) | (N<<15) | (frac<<3) | 0b000;
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/*if (reg!=reg_0)*/ {ADF4351_WriteRegister32(id, reg);/* reg_0 = reg;*/}
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/*if (reg!=reg_0)*/ {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg);/* reg_0 = reg;*/}
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ADF4351_Latch();
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} else {
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pdwn = false; //Power down is no longer active.
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uint32_t reg;
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@ -420,28 +431,29 @@ void sendConfig(void) {
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if (reg!=reg_5) {ADF4351_WriteRegister32(id, reg); reg_5 = reg;}
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// reg 4
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// fb rf divider bs divider VCO down mtld aux sel aux en aux pwr rf en rf pwr register 4
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// fb rf divider bs divider VCO down mtld aux sel aux en aux pwr rf en rf pwr register 4
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reg = (feedbackFromDivided<<23) | (out_div<<20) | (bsDivider<<12) | (0<<11) | (0<<10) | (0<<9) | (auxEnable<<8) | (auxPower<<6) | (rfEnable<<5) | (rfPower<<3) | 0b100;
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if (reg!=reg_4) {ADF4351_WriteRegister32(id, reg); reg_4 = reg;}
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if (reg!=reg_4) { ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_4 = reg;}
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// reg 3
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// csr clkdiv mode clkdiv register 3
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reg = (csr<<18) | (clkDivMode<<15) | (clkDivDivider<<3) | 0b011;
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if (reg!=reg_3) {ADF4351_WriteRegister32(id, reg); reg_3 = reg;}
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if (reg!=reg_3) {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_3 = reg;}
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// reg 2 cp three reset
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// noise mode muxout ref dbr ref div2 R DB CP current LDF LDP PD pol powerdown state counter register 2
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reg = (noiseMode<<29) | (mux<<26) | (refDouble<<25) | (refDiv2 << 24) | (R<<14) | (0<<13) | (cpCurrent<<9) | (LDF<<8) | (LDP<<7) | (1<<6) | (pdwn<<5) | (0<<4) | (0<<3) | 0b010;
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if (reg!=reg_2) {ADF4351_WriteRegister32(id, reg); reg_2 = reg;}
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if (reg!=reg_2) {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_2 = reg;}
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// reg 1
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// prescaler phase frac modulus
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reg = (prescaler<<27) | (phase<<15) | (modulus<<3) | 0b001;
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if (reg!=reg_1) {ADF4351_WriteRegister32(id, reg); reg_1 = reg;}
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if (reg!=reg_1) {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg); reg_1 = reg;}
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// reg 0 (need always send for apply some reg 1 - 5 settings
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reg = (N<<15) | (frac<<3) | 0b000;
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/*if (reg!=reg_0)*/ {ADF4351_WriteRegister32(id, reg);/* reg_0 = reg;*/}
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/*if (reg!=reg_0)*/ {ADF4351_Latch(); ADF4351_WriteRegister32(id, reg);/* reg_0 = reg;*/}
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ADF4351_Latch();
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}
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if (SI4432_SPI_SPEED != ADF_SPI_SPEED)
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SPI_BR_SET(SI4432_SPI, SI4432_SPI_SPEED);
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@ -453,7 +465,7 @@ void sendPowerdown(bool p) {
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return;
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pdwn = p;
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uint32_t reg = (noiseMode<<29) | (0b001<<26) | (refDouble<<25) | (refDiv2 << 24) | (R<<14) | (cpCurrent<<9) | (0<<8) | (0<<7) | (1<<6) | (pdwn<<5) | 0b010;
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if (reg!=reg_2) {ADF4351_WriteRegister32(id, reg); reg_2 = reg;}
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if (reg!=reg_2) {ADF4351_WriteRegister32(id, reg); reg_2 = reg;ADF4351_Latch(); }
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}
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