Fix AIC NADC to 1

Fix 300-900MHz gain to 50

main.c

@@ -337,7 +337,7 @@ VNA_SHELL_FUNCTION(cmd_reset)
 
 const uint8_t gain_table[][2] = {
     {  0,  0 },     // 1st:    0 ~  300MHz
-    { 40, 40 },     // 2nd:  300 ~  900MHz
+    { 50, 50 },     // 2nd:  300 ~  900MHz
     { 75, 75 },     // 3th:  900 ~ 1500MHz
     { 85, 85 },     // 4th: 1500 ~ 1800MHz
     { 95, 95 },     // 5th: 2100 ~ 2400MHz

tlv320aic3204.c

@@ -165,7 +165,7 @@ static const uint8_t conf_data[] = {
   0x3c, 0x01,     // Set the DAC Mode to PRB_P1
   0x25, 0x00,     // DAC power up
 
-  0x12, 0x82,     // Power up the NADC divider with value 2
+  0x12, 0x81,     // Power up the NADC divider with value 1
   0x13, 0x87,     // Power up the MADC divider with value 7
   0x14, 0x40,     // ADC Oversampling (AOSR) set OSR of ADC to 64
   0x3d, 0x01,     // Select ADC PRB_R1 (AOSR = 64 (Use with PRB_R1 to PRB_R12, ADC Filter Type A or B))