From d732807ee34107c65206ae3a2062a307973dea81 Mon Sep 17 00:00:00 2001 From: Andy CA6JAU Date: Sun, 15 Nov 2020 20:22:13 -0300 Subject: [PATCH] Change some ADF7021 register values for M17 (experimental) --- ADF7021.cpp | 6 +++--- ADF7021.h | 14 +++++++------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/ADF7021.cpp b/ADF7021.cpp index 4298f46..4e1af57 100644 --- a/ADF7021.cpp +++ b/ADF7021.cpp @@ -424,7 +424,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset) break; case STATE_YSF: - // Dev: +1 symb 2700/900 Hz, symb rate = 4800 + // Dev: +1 symb 900 Hz, symb rate = 4800 ADF7021_REG3 = (m_LoDevYSF ? ADF7021_REG3_YSF_L : ADF7021_REG3_YSF_H); ADF7021_REG10 = ADF7021_REG10_YSF; @@ -505,7 +505,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset) break; case STATE_M17: - // Dev: +1 symb 2400 Hz, symb rate = 4800 + // Dev: +1 symb 800 Hz, symb rate = 4800 ADF7021_REG3 = ADF7021_REG3_M17; ADF7021_REG10 = ADF7021_REG10_M17; @@ -517,7 +517,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset) ADF7021_REG4 |= (uint32_t) 0b11 << 8; ADF7021_REG4 |= (uint32_t) ADF7021_DISC_BW_M17 << 10; // Disc BW ADF7021_REG4 |= (uint32_t) ADF7021_POST_BW_M17 << 20; // Post dem BW - ADF7021_REG4 |= (uint32_t) 0b00 << 30; // IF filter (12.5 kHz) + ADF7021_REG4 |= (uint32_t) 0b10 << 30; // IF filter (25 kHz) ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13 ADF7021_REG13 |= (uint32_t) ADF7021_SLICER_TH_M17 << 4; // slicer threshold diff --git a/ADF7021.h b/ADF7021.h index 76d0893..7b58c5f 100644 --- a/ADF7021.h +++ b/ADF7021.h @@ -106,7 +106,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf #define ADF7021_REG3_YSF_H 0x2A4CC093 #define ADF7021_REG3_P25 0x2A4C80D3 #define ADF7021_REG3_NXDN 0x2A4CC113 -#define ADF7021_REG3_M17 0x2A4C80D3 // XXX FIXME +#define ADF7021_REG3_M17 0x2A4CC093 #endif #define ADF7021_REG3_POCSAG 0x2A4F0093 @@ -118,7 +118,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf #define ADF7021_DISC_BW_YSF_H 516U // K=28 #define ADF7021_DISC_BW_P25 394U // K=32 #define ADF7021_DISC_BW_NXDN 295U // K=32 -#define ADF7021_DISC_BW_M17 393U // K=32 XXX FIXME +#define ADF7021_DISC_BW_M17 571U // K=31 #define ADF7021_DISC_BW_POCSAG 406U // K=22 // Post demodulator bandwith (REG 04) @@ -127,7 +127,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf #define ADF7021_POST_BW_YSF 20U #define ADF7021_POST_BW_P25 6U #define ADF7021_POST_BW_NXDN 7U -#define ADF7021_POST_BW_M17 20U // XXX FIXME +#define ADF7021_POST_BW_M17 20U // Test #define ADF7021_POST_BW_POCSAG 1U // IF filter (REG 05) @@ -229,7 +229,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf #define ADF7021_DISC_BW_YSF_H 430U // K=28 #define ADF7021_DISC_BW_P25 493U // K=32 #define ADF7021_DISC_BW_NXDN 246U // K=32 -#define ADF7021_DISC_BW_M17 491U // K=32 XXX FIXME +#define ADF7021_DISC_BW_M17 476U // K=31 #define ADF7021_DISC_BW_POCSAG 338U // K=22 // Post demodulator bandwith (REG 04) @@ -238,7 +238,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf #define ADF7021_POST_BW_YSF 20U #define ADF7021_POST_BW_P25 6U #define ADF7021_POST_BW_NXDN 8U -#define ADF7021_POST_BW_M17 20U // XXX FIXME +#define ADF7021_POST_BW_M17 20U // Test #define ADF7021_POST_BW_POCSAG 1U // IF filter (REG 05) @@ -294,7 +294,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf #define ADF7021_SLICER_TH_YSF_H 69U #define ADF7021_SLICER_TH_P25 43U #define ADF7021_SLICER_TH_NXDN 26U -#define ADF7021_SLICER_TH_M17 26U // XXX FIXME +#define ADF7021_SLICER_TH_M17 59U // Test #else @@ -304,7 +304,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf #define ADF7021_SLICER_TH_YSF_H 75U #define ADF7021_SLICER_TH_P25 47U #define ADF7021_SLICER_TH_NXDN 26U -#define ADF7021_SLICER_TH_M17 26U // XXX FIXME +#define ADF7021_SLICER_TH_M17 59U // Test #endif