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Merge pull request #144 from g4klx/master

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Add M17 support
pull/146/head
Andy CA6JAU 4 years ago committed by GitHub
parent 436cebb7a4 931cfde894
commit d4cb546a7c
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35 changed files with 935 additions and 91 deletions
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161
ADF7021.cpp
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@ -1,4 +1,5 @@
/*
* Copyright (C) 2020,2021 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
* Copyright (C) 2016,2017,2018,2019,2020 by Andy Uribe CA6JAU
* Copyright (C) 2017 by Danilo DB4PLE
@ -48,14 +49,13 @@ uint16_t m_dmrDev;
uint16_t m_ysfDev;
uint16_t m_p25Dev;
uint16_t m_nxdnDev;
uint16_t m_m17Dev;
uint16_t m_pocsagDev;
static void Send_AD7021_control_shift()
{
int AD7021_counter;
for(AD7021_counter = 31; AD7021_counter >= 0; AD7021_counter--) {
if(bitRead(AD7021_control_word, AD7021_counter) == HIGH)
for (int AD7021_counter = 31; AD7021_counter >= 0; AD7021_counter--) {
if (bitRead(AD7021_control_word, AD7021_counter) == HIGH)
io.SDATA_pin(HIGH);
else
io.SDATA_pin(LOW);
@ -65,6 +65,7 @@ static void Send_AD7021_control_shift()
io.dlybit();
io.SCLK_pin(LOW);
}
// to keep SDATA signal at defined level when idle (not required)
io.SDATA_pin(LOW);
}
@ -80,9 +81,8 @@ void Send_AD7021_control(bool doSle)
{
Send_AD7021_control_shift();
if (doSle) {
if (doSle)
Send_AD7021_control_slePulse();
}
}
#if defined(DUPLEX)
@ -97,9 +97,8 @@ void Send_AD7021_control2(bool doSle)
{
Send_AD7021_control_shift();
if (doSle) {
if (doSle)
Send_AD7021_control_sle2Pulse();
}
}
#endif
@ -108,15 +107,14 @@ uint16_t CIO::readRSSI()
{
uint32_t AD7021_RB;
uint16_t RB_word = 0U;
int AD7021_counter;
uint8_t RB_code, gain_code, gain_corr;
// Register 7, readback enable, ADC RSSI mode
AD7021_RB = 0x0147;
// Send control register
for(AD7021_counter = 8; AD7021_counter >= 0; AD7021_counter--) {
if(bitRead(AD7021_RB, AD7021_counter) == HIGH)
for (int AD7021_counter = 8; AD7021_counter >= 0; AD7021_counter--) {
if (bitRead(AD7021_RB, AD7021_counter) == HIGH)
SDATA_pin(HIGH);
else
SDATA_pin(LOW);
@ -141,16 +139,15 @@ uint16_t CIO::readRSSI()
dlybit();
// Read SREAD pin
for(AD7021_counter = 17; AD7021_counter >= 0; AD7021_counter--) {
for (int AD7021_counter = 17; AD7021_counter >= 0; AD7021_counter--) {
SCLK_pin(HIGH);
dlybit();
if( (AD7021_counter != 17) && (AD7021_counter != 0) )
RB_word |= ( (SREAD_pin() & 0x01) << (AD7021_counter-1) );
if ((AD7021_counter != 17) && (AD7021_counter != 0))
RB_word |= ((SREAD_pin() & 0x01) << (AD7021_counter - 1));
SCLK_pin(LOW);
dlybit();
}
#if defined(DUPLEX)
@ -221,7 +218,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
#endif
// Toggle CE pin for ADF7021 reset
if(reset) {
if (reset) {
CE_pin(LOW);
delay_reset();
CE_pin(HIGH);
@ -229,28 +226,24 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
}
// Check frequency band
if( (m_frequency_tx >= VHF1_MIN) && (m_frequency_tx < VHF1_MAX) ) {
if ((m_frequency_tx >= VHF1_MIN) && (m_frequency_tx < VHF1_MAX)) {
ADF7021_REG1 = ADF7021_REG1_VHF1; // VHF1, external VCO
div2 = 1U;
}
else if( (m_frequency_tx >= VHF2_MIN) && (m_frequency_tx < VHF2_MAX) ) {
} else if ((m_frequency_tx >= VHF2_MIN) && (m_frequency_tx < VHF2_MAX)) {
ADF7021_REG1 = ADF7021_REG1_VHF2; // VHF1, external VCO
div2 = 1U;
}
else if( (m_frequency_tx >= UHF1_MIN)&&(m_frequency_tx < UHF1_MAX) ) {
} else if ((m_frequency_tx >= UHF1_MIN)&&(m_frequency_tx < UHF1_MAX)) {
ADF7021_REG1 = ADF7021_REG1_UHF1; // UHF1, internal VCO
div2 = 1U;
}
else if( (m_frequency_tx >= UHF2_MIN)&&(m_frequency_tx < UHF2_MAX) ) {
} else if ((m_frequency_tx >= UHF2_MIN)&&(m_frequency_tx < UHF2_MAX)) {
ADF7021_REG1 = ADF7021_REG1_UHF2; // UHF2, internal VCO
div2 = 2U;
}
else {
} else {
ADF7021_REG1 = ADF7021_REG1_UHF1; // UHF1, internal VCO
div2 = 1U;
}
if(div2 == 1U)
if (div2 == 1U)
f_div = 2U;
else
f_div = 1U;
@ -273,14 +266,17 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
case STATE_NXDN:
AFC_OFFSET = AFC_OFFSET_NXDN;
break;
case STATE_M17:
AFC_OFFSET = AFC_OFFSET_M17;
break;
default:
break;
}
if( div2 == 1U )
if (div2 == 1U)
divider = (m_frequency_rx - 100000 + AFC_OFFSET) / (ADF7021_PFD / 2U);
else
divider = (m_frequency_rx - 100000 + (2*AFC_OFFSET)) / ADF7021_PFD;
divider = (m_frequency_rx - 100000 + (2 * AFC_OFFSET)) / ADF7021_PFD;
m_RX_N_divider = floor(divider);
divider = (divider - m_RX_N_divider) * 32768;
@ -297,7 +293,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_RX_REG0 |= (uint32_t) m_RX_N_divider << 19; // frequency;
ADF7021_RX_REG0 |= (uint32_t) m_RX_F_divider << 4; // frequency;
if( div2 == 1U )
if (div2 == 1U)
divider = m_frequency_tx / (ADF7021_PFD / 2U);
else
divider = m_frequency_tx / ADF7021_PFD;
@ -419,7 +415,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
break;
case STATE_YSF:
// Dev: +1 symb 900 Hz, symb rate = 4800
// Dev: +1 symb 900/450 Hz, symb rate = 4800
ADF7021_REG3 = (m_LoDevYSF ? ADF7021_REG3_YSF_L : ADF7021_REG3_YSF_H);
ADF7021_REG10 = ADF7021_REG10_YSF;
@ -499,6 +495,33 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
#endif
break;
case STATE_M17:
// Dev: +1 symb 800 Hz, symb rate = 4800
ADF7021_REG3 = ADF7021_REG3_M17;
ADF7021_REG10 = ADF7021_REG10_M17;
// K=32
ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4
ADF7021_REG4 |= (uint32_t) 0b011 << 4; // mode, 4FSK
ADF7021_REG4 |= (uint32_t) 0b0 << 7;
ADF7021_REG4 |= (uint32_t) 0b11 << 8;
ADF7021_REG4 |= (uint32_t) ADF7021_DISC_BW_M17 << 10; // Disc BW
ADF7021_REG4 |= (uint32_t) ADF7021_POST_BW_M17 << 20; // Post dem BW
ADF7021_REG4 |= (uint32_t) 0b10 << 30; // IF filter (25 kHz)
ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13
ADF7021_REG13 |= (uint32_t) ADF7021_SLICER_TH_M17 << 4; // slicer threshold
ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data (and RC alpha = 0.5)
ADF7021_REG2 |= (uint32_t) (m_m17Dev / div2) << 19; // deviation
#if defined(ADF7021_DISABLE_RC_4FSK)
ADF7021_REG2 |= (uint32_t) 0b011 << 4; // modulation (4FSK)
#else
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
#endif
break;
default:
break;
}
@ -591,7 +614,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
}
#if defined(DUPLEX)
if(m_duplex && (modemState != STATE_CWID && modemState != STATE_POCSAG))
if (m_duplex && (modemState != STATE_CWID && modemState != STATE_POCSAG))
ifConf2(modemState);
#endif
}
@ -653,7 +676,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
break;
case STATE_YSF:
// Dev: +1 symb 900 Hz, symb rate = 4800
// Dev: +1 symb 900/450 Hz, symb rate = 4800
ADF7021_REG3 = (m_LoDevYSF ? ADF7021_REG3_YSF_L : ADF7021_REG3_YSF_H);
ADF7021_REG10 = ADF7021_REG10_YSF;
@ -721,6 +744,29 @@ void CIO::ifConf2(MMDVM_STATE modemState)
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
break;
case STATE_M17:
// Dev: +1 symb 800 Hz, symb rate = 4800
ADF7021_REG3 = ADF7021_REG3_M17;
ADF7021_REG10 = ADF7021_REG10_M17;
// K=32
ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4
ADF7021_REG4 |= (uint32_t) 0b011 << 4; // mode, 4FSK
ADF7021_REG4 |= (uint32_t) 0b0 << 7;
ADF7021_REG4 |= (uint32_t) 0b11 << 8;
ADF7021_REG4 |= (uint32_t) ADF7021_DISC_BW_M17 << 10; // Disc BW
ADF7021_REG4 |= (uint32_t) ADF7021_POST_BW_M17 << 20; // Post dem BW
ADF7021_REG4 |= (uint32_t) 0b10 << 30; // IF filter (25 kHz)
ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13
ADF7021_REG13 |= (uint32_t) ADF7021_SLICER_TH_M17 << 4; // slicer threshold
ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data (and RC alpha = 0.5)
ADF7021_REG2 |= (uint32_t) (m_m17Dev / div2) << 19; // deviation
ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
break;
default:
break;
}
@ -807,25 +853,23 @@ void CIO::interrupt()
// possibly this is a design problem of the RF7021 board or too long wires
// on the breadboard build
// but normally this will not hurt too much
if (clk == last_clk) {
if (clk == last_clk)
return;
} else {
else
last_clk = clk;
}
// we set the TX bit at TXD low, sampling of ADF7021 happens at rising clock
if (m_tx && clk == 0U) {
m_txBuffer.get(bit, m_control);
even = !even;
#if defined(BIDIR_DATA_PIN)
if(bit)
if (bit)
RXD_pin_write(HIGH);
else
RXD_pin_write(LOW);
#else
if(bit)
if (bit)
TXD_pin(HIGH);
else
TXD_pin(LOW);
@ -857,7 +901,7 @@ void CIO::interrupt()
// we sample the RX bit at rising TXD clock edge, so TXD must be 1 and we are not in tx mode
if (!m_tx && clk == 1U && !m_duplex) {
if(RXD_pin())
if (RXD_pin())
bit = 1U;
else
bit = 0U;
@ -865,7 +909,7 @@ void CIO::interrupt()
m_rxBuffer.put(bit, m_control);
}
if (torx_request == true && even == ADF7021_EVEN_BIT && m_tx && clk == 0U) {
if (torx_request && even == ADF7021_EVEN_BIT && m_tx && clk == 0U) {
// that is absolutely crucial in 4FSK, see datasheet:
// enable sle after 1/4 tBit == 26uS when sending MSB (even == false) and clock is low
delay_us(26U);
@ -891,10 +935,10 @@ void CIO::interrupt()
m_modeTimerCnt++;
m_int1counter++;
if(m_scanPauseCnt >= SCAN_PAUSE)
if (m_scanPauseCnt >= SCAN_PAUSE)
m_scanPauseCnt = 0U;
if(m_scanPauseCnt != 0U)
if (m_scanPauseCnt != 0U)
m_scanPauseCnt++;
}
@ -903,8 +947,8 @@ void CIO::interrupt2()
{
uint8_t bit = 0U;
if(m_duplex) {
if(RXD2_pin())
if (m_duplex) {
if (RXD2_pin())
bit = 1U;
else
bit = 0U;
@ -948,7 +992,7 @@ void CIO::setRX(bool doSle)
Data_dir_out(false); // Data pin input mode
#endif
if(!doSle) {
if (!doSle) {
torx_request = true;
while(torx_request) { asm volatile ("nop"); }
}
@ -959,7 +1003,7 @@ void CIO::setPower(uint8_t power)
m_power = power >> 2;
}
void CIO::setDeviations(uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, bool ysfLoDev)
void CIO::setDeviations(uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t m17TXLevel, uint8_t pocsagTXLevel, bool ysfLoDev)
{
m_dstarDev = uint16_t((ADF7021_DEV_DSTAR * uint16_t(dstarTXLevel)) / 128U);
m_dmrDev = uint16_t((ADF7021_DEV_DMR * uint16_t(dmrTXLevel)) / 128U);
@ -971,6 +1015,7 @@ void CIO::setDeviations(uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXL
m_p25Dev = uint16_t((ADF7021_DEV_P25 * uint16_t(p25TXLevel)) / 128U);
m_nxdnDev = uint16_t((ADF7021_DEV_NXDN * uint16_t(nxdnTXLevel)) / 128U);
m_m17Dev = uint16_t((ADF7021_DEV_M17 * uint16_t(m17TXLevel)) / 128U);
m_pocsagDev = uint16_t((ADF7021_DEV_POCSAG * uint16_t(pocsagTXLevel)) / 128U);
}
@ -980,28 +1025,24 @@ void CIO::updateCal()
float divider;
// Check frequency band
if( (m_frequency_tx >= VHF1_MIN) && (m_frequency_tx < VHF1_MAX) ) {
if ((m_frequency_tx >= VHF1_MIN) && (m_frequency_tx < VHF1_MAX)) {
ADF7021_REG1 = ADF7021_REG1_VHF1; // VHF1, external VCO
div2 = 1U;
}
else if( (m_frequency_tx >= VHF2_MIN) && (m_frequency_tx < VHF2_MAX) ) {
} else if ((m_frequency_tx >= VHF2_MIN) && (m_frequency_tx < VHF2_MAX)) {
ADF7021_REG1 = ADF7021_REG1_VHF2; // VHF1, external VCO
div2 = 1U;
}
else if( (m_frequency_tx >= UHF1_MIN)&&(m_frequency_tx < UHF1_MAX) ) {
} else if ((m_frequency_tx >= UHF1_MIN)&&(m_frequency_tx < UHF1_MAX)) {
ADF7021_REG1 = ADF7021_REG1_UHF1; // UHF1, internal VCO
div2 = 1U;
}
else if( (m_frequency_tx >= UHF2_MIN)&&(m_frequency_tx < UHF2_MAX) ) {
} else if ((m_frequency_tx >= UHF2_MIN)&&(m_frequency_tx < UHF2_MAX)) {
ADF7021_REG1 = ADF7021_REG1_UHF2; // UHF2, internal VCO
div2 = 2U;
}
else {
} else {
ADF7021_REG1 = ADF7021_REG1_UHF1; // UHF1, internal VCO
div2 = 1U;
}
if(div2 == 1U)
if (div2 == 1U)
f_div = 2U;
else
f_div = 1U;
@ -1027,7 +1068,7 @@ void CIO::updateCal()
AD7021_control_word = ADF7021_REG2;
Send_AD7021_control();
if( div2 == 1U )
if (div2 == 1U)
divider = m_frequency_tx / (ADF7021_PFD / 2U);
else
divider = m_frequency_tx / ADF7021_PFD;
@ -1090,6 +1131,11 @@ uint16_t CIO::devNXDN()
return (uint16_t)((ADF7021_PFD * m_nxdnDev) / (f_div * 65536));
}
uint16_t CIO::devM17()
{
return (uint16_t)((ADF7021_PFD * m_m17Dev) / (f_div * 65536));
}
uint16_t CIO::devPOCSAG()
{
return (uint16_t)((ADF7021_PFD * m_pocsagDev) / (f_div * 65536));
@ -1106,6 +1152,7 @@ void CIO::printConf()
DEBUG2("YSF +1 sym dev (Hz):", devYSF());
DEBUG2("P25 +1 sym dev (Hz):", devP25());
DEBUG2("NXDN +1 sym dev (Hz):", devNXDN());
DEBUG2("M17 +1 sym dev (Hz):", devM17());
DEBUG2("POCSAG dev (Hz):", devPOCSAG());
}

29
ADF7021.h
Unescape View File

@ -1,4 +1,5 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
* Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
* Copyright (C) 2017 by Danilo DB4PLE
@ -52,7 +53,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
// Support for ADF7021-N version:
// #define ADF7021_N_VER
// Enable AFC support for DMR, YSF and P25 (experimental):
// Enable AFC support for DMR, YSF, P25, and M17 (experimental):
// (AFC is already enabled by default in D-Star)
// #define ADF7021_ENABLE_4FSK_AFC
@ -65,7 +66,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
// R = 4
// DEMOD_CLK = 2.4576 MHz (DSTAR)
// DEMOD_CLK = 4.9152 MHz (DMR, YSF_L, P25)
// DEMOD_CLK = 7.3728 MHz (YSF_H)
// DEMOD_CLK = 7.3728 MHz (YSF_H, M17)
// DEMOD CLK = 3.6864 MHz (NXDN)
// DEMOD_CLK = 7.3728 MHz (POCSAG)
#define ADF7021_PFD 3686400.0
@ -87,6 +88,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_DEV_P25 22U
#endif
#define ADF7021_DEV_NXDN 13U
#define ADF7021_DEV_M17 28U
#define ADF7021_DEV_POCSAG 160U
// TX/RX CLOCK register (REG 03)
@ -97,12 +99,14 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_REG3_YSF_H 0x2A4C0493
#define ADF7021_REG3_P25 0x2A4C04D3
#define ADF7021_REG3_NXDN 0x2A4C04D3
#define ADF7021_REG3_M17 0x2A4C04D3
#else
#define ADF7021_REG3_DMR 0x2A4C80D3
#define ADF7021_REG3_YSF_L 0x2A4C80D3
#define ADF7021_REG3_YSF_H 0x2A4CC093
#define ADF7021_REG3_P25 0x2A4C80D3
#define ADF7021_REG3_NXDN 0x2A4CC113
#define ADF7021_REG3_M17 0x2A4CC093
#endif
#define ADF7021_REG3_POCSAG 0x2A4F0093
@ -114,6 +118,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_DISC_BW_YSF_H 516U // K=28
#define ADF7021_DISC_BW_P25 394U // K=32
#define ADF7021_DISC_BW_NXDN 295U // K=32
#define ADF7021_DISC_BW_M17 590U // K=32
#define ADF7021_DISC_BW_POCSAG 406U // K=22
// Post demodulator bandwith (REG 04)
@ -122,6 +127,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_POST_BW_YSF 20U
#define ADF7021_POST_BW_P25 6U
#define ADF7021_POST_BW_NXDN 7U
#define ADF7021_POST_BW_M17 7U // Test
#define ADF7021_POST_BW_POCSAG 1U
// IF filter (REG 05)
@ -139,26 +145,31 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_REG10_YSF 0x01FE473A
#define ADF7021_REG10_P25 0x01FE473A
#define ADF7021_REG10_NXDN 0x01FE473A
#define ADF7021_REG10_M17 0x01FE473A
#if defined(ADF7021_AFC_POS)
#define AFC_OFFSET_DMR -250
#define AFC_OFFSET_YSF -250
#define AFC_OFFSET_P25 -250
#define AFC_OFFSET_NXDN -250
#define AFC_OFFSET_M17 -250
#else
#define AFC_OFFSET_DMR 250
#define AFC_OFFSET_YSF 250
#define AFC_OFFSET_P25 250
#define AFC_OFFSET_NXDN 250
#define AFC_OFFSET_M17 250
#endif
#else
#define ADF7021_REG10_DMR 0x049E472A
#define ADF7021_REG10_YSF 0x049E472A
#define ADF7021_REG10_P25 0x049E472A
#define ADF7021_REG10_NXDN 0x049E472A
#define ADF7021_REG10_M17 0x049E472A
#define AFC_OFFSET_DMR 0
#define AFC_OFFSET_YSF 0
#define AFC_OFFSET_P25 0
#define AFC_OFFSET_NXDN 0
#define AFC_OFFSET_M17 0
#endif
/****** Support for 12.2880 MHz TCXO ******/
@ -166,7 +177,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
// R = 2
// DEMOD_CLK = 2.4576 MHz (DSTAR)
// DEMOD_CLK = 6.1440 MHz (DMR, YSF_H, YSF_L, P25)
// DEMOD_CLK = 6.1440 MHz (DMR, YSF_H, YSF_L, P25, M17)
// DEMOD_CLK = 3.0720 MHz (NXDN)
// DEMOD_CLK = 6.1440 MHz (POCSAG)
#define ADF7021_PFD 6144000.0
@ -188,6 +199,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_DEV_P25 13U
#endif
#define ADF7021_DEV_NXDN 8U
#define ADF7021_DEV_M17 17U
#define ADF7021_DEV_POCSAG 96U
// TX/RX CLOCK register (REG 03)
@ -198,12 +210,14 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_REG3_YSF_H 0x29EC0493
#define ADF7021_REG3_P25 0x29EC0493
#define ADF7021_REG3_NXDN 0x29EC0493
#define ADF7021_REG3_M17 0x29EC0493
#else
#define ADF7021_REG3_DMR 0x29ECA093
#define ADF7021_REG3_YSF_L 0x29ECA093
#define ADF7021_REG3_YSF_H 0x29ECA093
#define ADF7021_REG3_P25 0x29ECA093
#define ADF7021_REG3_NXDN 0x29ECA113
#define ADF7021_REG3_M17 0x29ECA093
#endif
#define ADF7021_REG3_POCSAG 0x29EE8093
@ -215,6 +229,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_DISC_BW_YSF_H 430U // K=28
#define ADF7021_DISC_BW_P25 493U // K=32
#define ADF7021_DISC_BW_NXDN 246U // K=32
#define ADF7021_DISC_BW_M17 492U // K=32
#define ADF7021_DISC_BW_POCSAG 338U // K=22
// Post demodulator bandwith (REG 04)
@ -223,6 +238,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_POST_BW_YSF 20U
#define ADF7021_POST_BW_P25 6U
#define ADF7021_POST_BW_NXDN 8U
#define ADF7021_POST_BW_M17 8U // Test
#define ADF7021_POST_BW_POCSAG 1U
// IF filter (REG 05)
@ -240,26 +256,31 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_REG10_YSF 0x01FE557A
#define ADF7021_REG10_P25 0x01FE557A
#define ADF7021_REG10_NXDN 0x01FE557A
#define ADF7021_REG10_M17 0x01FE557A
#if defined(ADF7021_AFC_POS)
#define AFC_OFFSET_DMR -250
#define AFC_OFFSET_YSF -250
#define AFC_OFFSET_P25 -250
#define AFC_OFFSET_NXDN -250
#define AFC_OFFSET_M17 -250
#else
#define AFC_OFFSET_DMR 250
#define AFC_OFFSET_YSF 250
#define AFC_OFFSET_P25 250
#define AFC_OFFSET_NXDN 250
#define AFC_OFFSET_M17 250
#endif
#else
#define ADF7021_REG10_DMR 0x049E556A
#define ADF7021_REG10_YSF 0x049E556A
#define ADF7021_REG10_P25 0x049E556A
#define ADF7021_REG10_NXDN 0x049E556A
#define ADF7021_REG10_M17 0x049E556A
#define AFC_OFFSET_DMR 0
#define AFC_OFFSET_YSF 0
#define AFC_OFFSET_P25 0
#define AFC_OFFSET_NXDN 0
#define AFC_OFFSET_M17 0
#endif
#endif
@ -273,6 +294,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_SLICER_TH_YSF_H 69U
#define ADF7021_SLICER_TH_P25 43U
#define ADF7021_SLICER_TH_NXDN 26U
#define ADF7021_SLICER_TH_M17 59U // Test
#else
@ -282,6 +304,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_SLICER_TH_YSF_H 75U
#define ADF7021_SLICER_TH_P25 47U
#define ADF7021_SLICER_TH_NXDN 26U
#define ADF7021_SLICER_TH_M17 59U // Test
#endif

3
Config.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

9
Globals.h
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017,2018,2019 by Andy Uribe CA6JAU
* Copyright (C) 2019 by Florian Wolters DF2ET
*
@ -42,6 +42,7 @@ enum MMDVM_STATE {
STATE_P25 = 4,
STATE_NXDN = 5,
STATE_POCSAG = 6,
STATE_M17 = 7,
// Dummy states start at 90
STATE_DMRDMO1K = 92,
@ -77,6 +78,8 @@ const uint8_t MARK_NONE = 0x00U;
#include "YSFTX.h"
#include "P25RX.h"
#include "P25TX.h"
#include "M17RX.h"
#include "M17TX.h"
#include "NXDNRX.h"
#include "NXDNTX.h"
#include "POCSAGTX.h"
@ -103,6 +106,7 @@ extern bool m_dmrEnable;
extern bool m_ysfEnable;
extern bool m_p25Enable;
extern bool m_nxdnEnable;
extern bool m_m17Enable;
extern bool m_pocsagEnable;
extern bool m_duplex;
@ -133,6 +137,9 @@ extern CYSFTX ysfTX;
extern CP25RX p25RX;
extern CP25TX p25TX;
extern CM17RX m17RX;
extern CM17TX m17TX;
extern CNXDNRX nxdnRX;
extern CNXDNTX nxdnTX;

32
IO.cpp
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@ -1,8 +1,8 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017,2018,2019,2020 by Andy Uribe CA6JAU
* Copyright (C) 2017 by Danilo DB4PLE
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@ -51,6 +51,7 @@ m_int2counter(0U)
YSF_pin(LOW);
P25_pin(LOW);
NXDN_pin(LOW);
M17_pin(LOW);
POCSAG_pin(LOW);
COS_pin(LOW);
DEB_pin(LOW);
@ -89,6 +90,7 @@ void CIO::selfTest()
YSF_pin(ledValue);
P25_pin(ledValue);
NXDN_pin(ledValue);
M17_pin(ledValue);
POCSAG_pin(ledValue);
COS_pin(ledValue);
@ -111,7 +113,7 @@ void CIO::process()
if (m_started) {
// Two seconds timeout
if (m_watchdog >= 19200U) {
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN) {
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN || m_modemState == STATE_M17) {
m_modemState = STATE_IDLE;
setMode(m_modemState);
}
@ -178,6 +180,8 @@ void CIO::process()
scantime = SCAN_TIME;
else if(m_modemState_prev == STATE_NXDN)
scantime = SCAN_TIME;
else if(m_modemState_prev == STATE_M17)
scantime = SCAN_TIME;
else
scantime = SCAN_TIME;
@ -221,6 +225,9 @@ void CIO::process()
case STATE_NXDN:
nxdnRX.databit(bit);
break;
case STATE_M17:
m17RX.databit(bit);
break;
default:
break;
}
@ -252,6 +259,10 @@ void CIO::start()
m_Modes[m_TotalModes] = STATE_NXDN;
m_TotalModes++;
}
if(m_m17Enable) {
m_Modes[m_TotalModes] = STATE_M17;
m_TotalModes++;
}
#if defined(ENABLE_SCAN_MODE)
if(m_TotalModes > 1U)
@ -412,6 +423,14 @@ void CIO::setMode(MMDVM_STATE modemState)
#if defined(USE_ALTERNATE_NXDN_LEDS)
}
#endif
#if defined(USE_ALTERNATE_M17_LEDS)
if (modemState != STATE_M17) {
#endif
YSF_pin(modemState == STATE_DSTAR);
P25_pin(modemState == STATE_P25);
#if defined(USE_ALTERNATE_M17_LEDS)
}
#endif
#if defined(USE_ALTERNATE_NXDN_LEDS)
if (modemState != STATE_YSF && modemState != STATE_P25) {
#endif
@ -426,6 +445,13 @@ void CIO::setMode(MMDVM_STATE modemState)
#if defined(USE_ALTERNATE_POCSAG_LEDS)
}
#endif
#if defined(USE_ALTERNATE_M17_LEDS)
if (modemState != STATE_DSTAR && modemState != STATE_P25) {
#endif
M17_pin(modemState == STATE_M17);
#if defined(USE_ALTERNATE_M17_LEDS)
}
#endif
}
void CIO::setDecode(bool dcd)

10
IO.h
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@ -1,8 +1,8 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017,2018,2019,2020 by Andy Uribe CA6JAU
* Copyright (C) 2017 by Danilo DB4PLE
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@ -98,6 +98,7 @@ public:
void YSF_pin(bool on);
void P25_pin(bool on);
void NXDN_pin(bool on);
void M17_pin(bool on);
void POCSAG_pin(bool on);
void COS_pin(bool on);
void interrupt(void);
@ -141,7 +142,7 @@ public:
#endif
void start(void);
void startInt(void);
void setDeviations(uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, bool ysfLoDev);
void setDeviations(uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t m17TXLevel, uint8_t pocsagTXLevel, bool ysfLoDev);
void updateCal(void);
#if defined(SEND_RSSI_DATA)
@ -162,6 +163,7 @@ public:
uint16_t devYSF(void);
uint16_t devP25(void);
uint16_t devNXDN(void);
uint16_t devM17(void);
uint16_t devPOCSAG(void);
void printConf();
#endif
@ -181,7 +183,7 @@ private:
uint32_t m_scanPauseCnt;
uint8_t m_scanPos;
uint8_t m_TotalModes;
MMDVM_STATE m_Modes[5];
MMDVM_STATE m_Modes[6];
bool m_ledValue;
volatile uint32_t m_watchdog;
volatile uint16_t m_int1counter;

27
IOSTM.cpp
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@ -1,4 +1,5 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
* Copyright (C) 2016,2017,2018,2019,2020 by Andy Uribe CA6JAU
* Copyright (C) 2017 by Danilo DB4PLE
@ -83,6 +84,10 @@
#define PIN_NXDN_LED GPIO_Pin_8
#define PORT_NXDN_LED GPIOA
// XXX FIXME
#define PIN_M17_LED GPIO_Pin_8
#define PORT_M17_LED GPIOA
#define PIN_POCSAG_LED GPIO_Pin_5
#define PORT_POCSAG_LED GPIOA
@ -173,6 +178,14 @@
#endif
#define PORT_NXDN_LED GPIOA
// XXX FIXME
#if defined(STM32_USB_HOST)
#define PIN_M17_LED GPIO_Pin_1
#else
#define PIN_M17_LED GPIO_Pin_7
#endif
#define PORT_M17_LED GPIOA
#define PIN_POCSAG_LED GPIO_Pin_5
#define PORT_POCSAG_LED GPIOA
@ -248,6 +261,10 @@
#define PIN_NXDN_LED GPIO_Pin_8
#define PORT_NXDN_LED GPIOA
// XXX FIXME
#define PIN_M17_LED GPIO_Pin_8
#define PORT_M17_LED GPIOA
#define PIN_POCSAG_LED GPIO_Pin_7
#define PORT_POCSAG_LED GPIOA
@ -734,6 +751,16 @@ void CIO::NXDN_pin(bool on)
#endif
}
void CIO::M17_pin(bool on)
{
#if defined(USE_ALTERNATE_M17_LEDS)
GPIO_WriteBit(PORT_DSTAR_LED, PIN_DSTAR_LED, on ? Bit_SET : Bit_RESET);
GPIO_WriteBit(PORT_P25_LED, PIN_P25_LED, on ? Bit_SET : Bit_RESET);
#else
GPIO_WriteBit(PORT_M17_LED, PIN_M17_LED, on ? Bit_SET : Bit_RESET);
#endif
}
void CIO::POCSAG_pin(bool on)
{
#if defined(USE_ALTERNATE_POCSAG_LEDS)

41
M17Defines.h
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@ -0,0 +1,41 @@
/*
* Copyright (C) 2016,2017,2018,2020,2021 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(M17DEFINES_H)
#define M17DEFINES_H
const unsigned int M17_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int M17_FRAME_LENGTH_BITS = 384U;
const unsigned int M17_FRAME_LENGTH_BYTES = M17_FRAME_LENGTH_BITS / 8U;
const unsigned int M17_SYNC_LENGTH_BITS = 16U;
const unsigned int M17_SYNC_LENGTH_BYTES = M17_SYNC_LENGTH_BITS / 8U;
const uint8_t M17_LINK_SETUP_SYNC_BYTES[] = {0x55U, 0xF7U};
const uint8_t M17_STREAM_SYNC_BYTES[] = {0xFFU, 0x5DU};
const uint8_t M17_EOT_SYNC_BYTES[] = {0x55U, 0x5DU};
const uint8_t M17_SYNC_BYTES_LENGTH = 2U;
const uint16_t M17_LINK_SETUP_SYNC_BITS = 0x55F7U;
const uint16_t M17_STREAM_SYNC_BITS = 0xFF5DU;
const uint16_t M17_EOT_SYNC_BITS = 0x555DU;
#endif

203
M17RX.cpp
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@ -0,0 +1,203 @@
/*
* Copyright (C) 2009-2018,2020,2021 by Jonathan Naylor G4KLX
* Copyright (C) 2016-2018 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "M17RX.h"
#include "Utils.h"
const uint8_t MAX_SYNC_BIT_START_ERRS = 0U;
const uint8_t MAX_SYNC_BIT_RUN_ERRS = 2U;
const unsigned int MAX_SYNC_FRAMES = 3U + 1U;
const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
#define WRITE_BIT1(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
CM17RX::CM17RX() :
m_state(M17RXS_NONE),
m_bitBuffer(0x00U),
m_outBuffer(),
m_buffer(NULL),
m_bufferPtr(0U),
m_lostCount(0U)
{
m_buffer = m_outBuffer + 1U;
}
void CM17RX::reset()
{
m_state = M17RXS_NONE;
m_bitBuffer = 0x00U;
m_bufferPtr = 0U;
m_lostCount = 0U;
}
void CM17RX::databit(bool bit)
{
switch (m_state) {
case M17RXS_LINK_SETUP:
case M17RXS_STREAM:
processData(bit);
break;
default:
processNone(bit);
break;
}
}
void CM17RX::processNone(bool bit)
{
m_bitBuffer <<= 1;
if (bit)
m_bitBuffer |= 0x01U;
// Exact matching of the link setup sync bit sequence
if (countBits16(m_bitBuffer ^ M17_LINK_SETUP_SYNC_BITS) <= MAX_SYNC_BIT_START_ERRS) {
DEBUG1("M17RX: link setup sync found in None");
for (uint8_t i = 0U; i < M17_SYNC_BYTES_LENGTH; i++)
m_buffer[i] = M17_LINK_SETUP_SYNC_BYTES[i];
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = M17_SYNC_LENGTH_BITS;
m_state = M17RXS_LINK_SETUP;
io.setDecode(true);
return;
}
// Exact matching of the stream sync bit sequence
if (countBits16(m_bitBuffer ^ M17_STREAM_SYNC_BITS) <= MAX_SYNC_BIT_START_ERRS) {
DEBUG1("M17RX: stream sync found in None");
for (uint8_t i = 0U; i < M17_SYNC_BYTES_LENGTH; i++)
m_buffer[i] = M17_STREAM_SYNC_BYTES[i];
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = M17_SYNC_LENGTH_BITS;
m_state = M17RXS_STREAM;
io.setDecode(true);
return;
}
}
void CM17RX::processData(bool bit)
{
m_bitBuffer <<= 1;
if (bit)
m_bitBuffer |= 0x01U;
WRITE_BIT1(m_buffer, m_bufferPtr, bit);
m_bufferPtr++;
if (m_bufferPtr > M17_FRAME_LENGTH_BITS)
reset();
// Only search for the syncs in the right place +-1 bit
if (m_bufferPtr >= (M17_SYNC_LENGTH_BITS - 1U) && m_bufferPtr <= (M17_SYNC_LENGTH_BITS + 1U)) {
// Fuzzy matching of the link setup sync bit sequence
if (countBits16(m_bitBuffer ^ M17_LINK_SETUP_SYNC_BITS) <= MAX_SYNC_BIT_RUN_ERRS) {
DEBUG2("M17RX: found link setup sync, pos", m_bufferPtr - M17_SYNC_LENGTH_BITS);
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = M17_SYNC_LENGTH_BITS;
m_state = M17RXS_LINK_SETUP;
return;
}
// Fuzzy matching of the stream sync bit sequence
if (countBits16(m_bitBuffer ^ M17_STREAM_SYNC_BITS) <= MAX_SYNC_BIT_RUN_ERRS) {
DEBUG2("M17RX: found stream sync, pos", m_bufferPtr - M17_SYNC_LENGTH_BITS);
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = M17_SYNC_LENGTH_BITS;
m_state = M17RXS_STREAM;
return;
}
// Fuzzy matching of the EOT sync bit sequence
if (countBits16(m_bitBuffer ^ M17_EOT_SYNC_BITS) <= MAX_SYNC_BIT_RUN_ERRS) {
DEBUG2("M17RX: found eot sync, pos", m_bufferPtr - M17_SYNC_LENGTH_BITS);
io.setDecode(false);
serial.writeM17EOT();
reset();
return;
}
}
// Send a frame to the host if the required number of bits have been received
if (m_bufferPtr == M17_FRAME_LENGTH_BITS) {
// We've not seen a sync for too long, signal RXLOST and change to RX_NONE
m_lostCount--;
if (m_lostCount == 0U) {
DEBUG1("M17RX: sync timed out, lost lock");
io.setDecode(false);
serial.writeM17Lost();
reset();
} else {
// Write data to host
m_outBuffer[0U] = m_lostCount == (MAX_SYNC_FRAMES - 1U) ? 0x01U : 0x00U;
switch (m_state) {
case M17RXS_LINK_SETUP:
writeRSSILinkSetup(m_outBuffer);
break;
case M17RXS_STREAM:
writeRSSIStream(m_outBuffer);
break;
default:
break;
}
// Start the next frame
::memset(m_outBuffer, 0x00U, M17_FRAME_LENGTH_BYTES + 3U);
m_bufferPtr = 0U;
}
}
}
void CM17RX::writeRSSILinkSetup(uint8_t* data)
{
#if defined(SEND_RSSI_DATA)
uint16_t rssi = io.readRSSI();
data[49U] = (rssi >> 8) & 0xFFU;
data[50U] = (rssi >> 0) & 0xFFU;
serial.writeM17LinkSetup(data, M17_FRAME_LENGTH_BYTES + 3U);
#else
serial.writeM17LinkSetup(data, M17_FRAME_LENGTH_BYTES + 1U);
#endif
}
void CM17RX::writeRSSIStream(uint8_t* data)
{
#if defined(SEND_RSSI_DATA)
uint16_t rssi = io.readRSSI();
data[49U] = (rssi >> 8) & 0xFFU;
data[50U] = (rssi >> 0) & 0xFFU;
serial.writeM17Stream(data, M17_FRAME_LENGTH_BYTES + 3U);
#else
serial.writeM17Stream(data, M17_FRAME_LENGTH_BYTES + 1U);
#endif
}

54
M17RX.h
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@ -0,0 +1,54 @@
/*
* Copyright (C) 2015-2018,2020,2021 by Jonathan Naylor G4KLX
* Copyright (C) 2016-2018 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(M17RX_H)
#define M17RX_H
#include "M17Defines.h"
enum M17RX_STATE {
M17RXS_NONE,
M17RXS_LINK_SETUP,
M17RXS_STREAM
};
class CM17RX {
public:
CM17RX();
void databit(bool bit);
void reset();
private:
M17RX_STATE m_state;
uint16_t m_bitBuffer;
uint8_t m_outBuffer[M17_FRAME_LENGTH_BYTES + 3U];
uint8_t* m_buffer;
uint16_t m_bufferPtr;
uint16_t m_lostCount;
void processNone(bool bit);
void processData(bool bit);
void writeRSSILinkSetup(uint8_t* data);
void writeRSSIStream(uint8_t* data);
};
#endif

124
M17TX.cpp
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@ -0,0 +1,124 @@
/*
* Copyright (C) 2009-2018,2020,2021 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "M17TX.h"
#include "M17Defines.h"
const uint8_t M17_SYNC = 0x77U;
const uint8_t M17_PREAMBLE = 0x77U;
CM17TX::CM17TX() :
m_buffer(1500U),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(240U), // 200ms
m_delay(false)
{
}
void CM17TX::process()
{
if (m_buffer.getData() == 0U && m_poLen == 0U)
return;
if (m_poLen == 0U) {
if (!m_tx) {
m_delay = true;
m_poLen = m_txDelay;
} else {
m_delay = false;
for (uint8_t i = 0U; i < M17_FRAME_LENGTH_BYTES; i++)
m_poBuffer[m_poLen++] = m_buffer.get();
}
m_poPtr = 0U;
}
if (m_poLen > 0U) {
uint16_t space = io.getSpace();
while (space > 8U) {
if (m_delay) {
writeByte(M17_SYNC);
m_poPtr++;
} else
writeByte(m_poBuffer[m_poPtr++]);
space -= 8U;
if (m_poPtr >= m_poLen) {
if (m_delay) {
m_delay = false;
m_poPtr = 0U;
m_poLen = 3U;
} else {
m_poPtr = 0U;
m_poLen = 0U;
m_delay = false;
return;
}
}
}
}
}
uint8_t CM17TX::writeData(const uint8_t* data, uint8_t length)
{
if (length != (M17_FRAME_LENGTH_BYTES + 1U))
return 4U;
uint16_t space = m_buffer.getSpace();
if (space < M17_FRAME_LENGTH_BYTES)
return 5U;
for (uint8_t i = 0U; i < M17_FRAME_LENGTH_BYTES; i++)
m_buffer.put(data[i + 1U]);
return 0U;
}
void CM17TX::writeByte(uint8_t c)
{
uint8_t bit;
uint8_t mask = 0x80U;
for (uint8_t i = 0U; i < 8U; i++, c <<= 1) {
if ((c & mask) == mask)
bit = 1U;
else
bit = 0U;
io.write(&bit, 1);
}
}
void CM17TX::setTXDelay(uint8_t delay)
{
m_txDelay = 600U + uint16_t(delay) * 12U; // 500ms + tx delay
}
uint8_t CM17TX::getSpace() const
{
return m_buffer.getSpace() / M17_FRAME_LENGTH_BYTES;
}

50
M17TX.h
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@ -0,0 +1,50 @@
/*
* Copyright (C) 2015,2016,2017,2020,2021 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(M17TX_H)
#define M17TX_H
#include "Config.h"
#include "SerialRB.h"
class CM17TX {
public:
CM17TX();
uint8_t writeData(const uint8_t* data, uint8_t length);
void process();
void setTXDelay(uint8_t delay);
uint8_t getSpace() const;
private:
CSerialRB m_buffer;
uint8_t m_poBuffer[1200U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
bool m_delay;
void writeByte(uint8_t c);
};
#endif

9
MMDVM_HS.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Mathis Schmieder DB9MAT
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2016,2017,2018,2019 by Andy Uribe CA6JAU
@ -43,6 +43,7 @@ bool m_dmrEnable = true;
bool m_ysfEnable = true;
bool m_p25Enable = true;
bool m_nxdnEnable = true;
bool m_m17Enable = true;
bool m_pocsagEnable = true;
bool m_duplex = false;
@ -70,6 +71,9 @@ CYSFTX ysfTX;
CP25RX p25RX;
CP25TX p25TX;
CM17RX m17RX;
CM17TX m17TX;
CNXDNRX nxdnRX;
CNXDNTX nxdnTX;
@ -125,6 +129,9 @@ void loop()
if (m_nxdnEnable && m_modemState == STATE_NXDN)
nxdnTX.process();
if (m_m17Enable && m_modemState == STATE_M17)
m17TX.process();
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process();

9
MMDVM_HS.ino
Unescape View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2016,2017 by Andy Uribe CA6JAU
*
@ -38,6 +38,7 @@ bool m_dmrEnable = true;
bool m_ysfEnable = true;
bool m_p25Enable = true;
bool m_nxdnEnable = true;
bool m_m17Enable = true;
bool m_pocsagEnable = true;
bool m_duplex = false;
@ -65,6 +66,9 @@ CYSFTX ysfTX;
CP25RX p25RX;
CP25TX p25TX;
CM17RX m17RX;
CM17TX m17TX;
CNXDNRX nxdnRX;
CNXDNTX nxdnTX;
@ -115,6 +119,9 @@ void loop()
if (m_nxdnEnable && m_modemState == STATE_NXDN)
nxdnTX.process();
if (m_m17Enable && m_modemState == STATE_M17)
m17TX.process();
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process();

188
SerialPort.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2013,2015,2016,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2013,2015,2016,2018,2020,2021 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2016,2017,2018,2019 by Andy Uribe CA6JAU
* Copyright (C) 2019 by Florian Wolters DF2ET
@ -60,6 +60,12 @@ const uint8_t MMDVM_P25_LOST = 0x32U;
const uint8_t MMDVM_NXDN_DATA = 0x40U;
const uint8_t MMDVM_NXDN_LOST = 0x41U;
const uint8_t MMDVM_M17_LINK_SETUP = 0x45U;
const uint8_t MMDVM_M17_STREAM = 0x46U;
const uint8_t MMDVM_M17_PACKET = 0x47U;
const uint8_t MMDVM_M17_LOST = 0x48U;
const uint8_t MMDVM_M17_EOT = 0x49U;
const uint8_t MMDVM_POCSAG_DATA = 0x50U;
const uint8_t MMDVM_ACK = 0x70U;
@ -126,7 +132,7 @@ void CSerialPort::getStatus()
// Send all sorts of interesting internal values
reply[0U] = MMDVM_FRAME_START;
reply[1U] = 13U;
reply[1U] = 14U;
reply[2U] = MMDVM_GET_STATUS;
reply[3U] = 0x00U;
@ -142,6 +148,8 @@ void CSerialPort::getStatus()
reply[3U] |= 0x10U;
if (m_pocsagEnable)
reply[3U] |= 0x20U;
if (m_m17Enable)
reply[3U] |= 0x80U;
reply[4U] = uint8_t(m_modemState);
@ -196,7 +204,12 @@ void CSerialPort::getStatus()
else
reply[12U] = 0U;
writeInt(1U, reply, 13);
if (m_m17Enable)
reply[13U] = m17TX.getSpace();
else
reply[13U] = 0U;
writeInt(1U, reply, 14);
}
void CSerialPort::getVersion()
@ -226,7 +239,7 @@ void CSerialPort::getVersion()
uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
{
if (length < 13U)
if (length < 23U)
return 4U;
bool ysfLoDev = (data[0U] & 0x08U) == 0x08U;
@ -240,6 +253,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
bool p25Enable = (data[1U] & 0x08U) == 0x08U;
bool nxdnEnable = (data[1U] & 0x10U) == 0x10U;
bool pocsagEnable = (data[1U] & 0x20U) == 0x20U;
bool m17Enable = (data[1U] & 0x40U) == 0x40U;
uint8_t txDelay = data[2U];
if (txDelay > 50U)
@ -247,7 +261,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_INTCAL && modemState != STATE_RSSICAL && modemState != STATE_POCSAGCAL)
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_M17 && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_INTCAL && modemState != STATE_RSSICAL && modemState != STATE_POCSAGCAL)
return 4U;
if (modemState == STATE_DSTAR && !dstarEnable)
return 4U;
@ -261,6 +275,8 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
return 4U;
if (modemState == STATE_POCSAG && !pocsagEnable)
return 4U;
if (modemState == STATE_M17 && !m17Enable)
return 4U;
uint8_t colorCode = data[6U];
if (colorCode > 15U)
@ -276,22 +292,18 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
uint8_t dmrTXLevel = data[10U];
uint8_t ysfTXLevel = data[11U];
uint8_t p25TXLevel = data[12U];
uint8_t nxdnTXLevel = 128U;
uint8_t pocsagTXLevel = 128U;
uint8_t nxdnTXLevel = data[15U];
uint8_t pocsagTXLevel = data[17U];
uint8_t m17TXLevel = data[21U];
if (length >= 16U)
nxdnTXLevel = data[15U];
if (length >= 18U)
pocsagTXLevel = data[17U];
io.setDeviations(dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, ysfLoDev);
io.setDeviations(dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, m17TXLevel, pocsagTXLevel, ysfLoDev);
m_dstarEnable = dstarEnable;
m_dmrEnable = dmrEnable;
m_ysfEnable = ysfEnable;
m_p25Enable = p25Enable;
m_nxdnEnable = nxdnEnable;
m_m17Enable = m17Enable;
m_pocsagEnable = pocsagEnable;
if (modemState == STATE_DMRCAL || modemState == STATE_DMRDMO1K || modemState == STATE_RSSICAL || modemState == STATE_INTCAL) {
@ -332,6 +344,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
ysfTX.setTXDelay(txDelay);
p25TX.setTXDelay(txDelay);
nxdnTX.setTXDelay(txDelay);
m17TX.setTXDelay(txDelay);
pocsagTX.setTXDelay(txDelay);
dmrDMOTX.setTXDelay(txDelay);
@ -357,6 +370,8 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
io.ifConf(STATE_P25, true);
else if(m_nxdnEnable)
io.ifConf(STATE_NXDN, true);
else if(m_m17Enable)
io.ifConf(STATE_M17, true);
else if(m_pocsagEnable)
io.ifConf(STATE_POCSAG, true);
}
@ -383,7 +398,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
if (modemState == m_modemState)
return 0U;
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_RSSICAL && modemState != STATE_INTCAL && modemState != STATE_POCSAGCAL)
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_M17 && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_DMRDMO1K && modemState != STATE_RSSICAL && modemState != STATE_INTCAL && modemState != STATE_POCSAGCAL)
return 4U;
if (modemState == STATE_DSTAR && !m_dstarEnable)
return 4U;
@ -395,6 +410,8 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
return 4U;
if (modemState == STATE_NXDN && !m_nxdnEnable)
return 4U;
if (modemState == STATE_M17 && !m_m17Enable)
return 4U;
if (modemState == STATE_POCSAG && !m_pocsagEnable)
return 4U;
@ -469,6 +486,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
m17RX.reset();
cwIdTX.reset();
break;
case STATE_DSTAR:
@ -481,6 +499,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
m17RX.reset();
cwIdTX.reset();
break;
case STATE_YSF:
@ -493,6 +512,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
dstarRX.reset();
p25RX.reset();
nxdnRX.reset();
m17RX.reset();
cwIdTX.reset();
break;
case STATE_P25:
@ -505,6 +525,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
dstarRX.reset();
ysfRX.reset();
nxdnRX.reset();
m17RX.reset();
cwIdTX.reset();
break;
case STATE_NXDN:
@ -517,6 +538,20 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
m17RX.reset();
cwIdTX.reset();
break;
case STATE_M17:
DEBUG1("Mode set to M17");
#if defined(DUPLEX)
dmrIdleRX.reset();
dmrRX.reset();
#endif
dmrDMORX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break;
case STATE_POCSAG:
@ -530,6 +565,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
m17RX.reset();
cwIdTX.reset();
break;
default:
@ -831,6 +867,48 @@ void CSerialPort::process()
}
break;
case MMDVM_M17_LINK_SETUP:
if (m_m17Enable) {
if (m_modemState == STATE_IDLE || m_modemState == STATE_M17)
err = m17TX.writeData(m_buffer + 3U, m_len - 3U);
}
if (err == 0U) {
if (m_modemState == STATE_IDLE)
setMode(STATE_M17);
} else {
DEBUG2("Received invalid M17 link setup data", err);
sendNAK(err);
}
break;
case MMDVM_M17_STREAM:
if (m_m17Enable) {
if (m_modemState == STATE_IDLE || m_modemState == STATE_M17)
err = m17TX.writeData(m_buffer + 3U, m_len - 3U);
}
if (err == 0U) {
if (m_modemState == STATE_IDLE)
setMode(STATE_M17);
} else {
DEBUG2("Received invalid M17 stream data", err);
sendNAK(err);
}
break;
case MMDVM_M17_EOT:
if (m_m17Enable) {
if (m_modemState == STATE_IDLE || m_modemState == STATE_M17)
err = m17TX.writeData(m_buffer + 3U, m_len - 3U);
}
if (err == 0U) {
if (m_modemState == STATE_IDLE)
setMode(STATE_M17);
} else {
DEBUG2("Received invalid M17 EOT", err);
sendNAK(err);
}
break;
case MMDVM_POCSAG_DATA:
if (m_pocsagEnable) {
if (m_modemState == STATE_IDLE || m_modemState == STATE_POCSAG) {
@ -1186,6 +1264,86 @@ void CSerialPort::writeNXDNLost()
writeInt(1U, reply, 3);
}
void CSerialPort::writeM17LinkSetup(const uint8_t* data, uint8_t length)
{
if (m_modemState != STATE_M17 && m_modemState != STATE_IDLE)
return;
if (!m_m17Enable)
return;
uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START;
reply[1U] = 0U;
reply[2U] = MMDVM_M17_LINK_SETUP;
uint8_t count = 3U;
for (uint8_t i = 0U; i < length; i++, count++)
reply[count] = data[i];
reply[1U] = count;
writeInt(1U, reply, count);
}
void CSerialPort::writeM17Stream(const uint8_t* data, uint8_t length)
{
if (m_modemState != STATE_M17 && m_modemState != STATE_IDLE)
return;
if (!m_m17Enable)
return;
uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START;
reply[1U] = 0U;
reply[2U] = MMDVM_M17_STREAM;
uint8_t count = 3U;
for (uint8_t i = 0U; i < length; i++, count++)
reply[count] = data[i];
reply[1U] = count;
writeInt(1U, reply, count);
}
void CSerialPort::writeM17EOT()
{
if (m_modemState != STATE_M17 && m_modemState != STATE_IDLE)
return;
if (!m_m17Enable)
return;
uint8_t reply[3U];
reply[0U] = MMDVM_FRAME_START;
reply[1U] = 3U;
reply[2U] = MMDVM_M17_EOT;
writeInt(1U, reply, 3);
}
void CSerialPort::writeM17Lost()
{
if (m_modemState != STATE_M17 && m_modemState != STATE_IDLE)
return;
if (!m_m17Enable)
return;
uint8_t reply[3U];
reply[0U] = MMDVM_FRAME_START;
reply[1U] = 3U;
reply[2U] = MMDVM_M17_LOST;
writeInt(1U, reply, 3);
}
#if defined(SEND_RSSI_DATA)
void CSerialPort::writeRSSIData(const uint8_t* data, uint8_t length)

7
SerialPort.h
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2018,2020,2021 by Jonathan Naylor G4KLX
* Copyright (C) 2018 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@ -52,6 +52,11 @@ public:
void writeNXDNData(const uint8_t* data, uint8_t length);
void writeNXDNLost();
void writeM17LinkSetup(const uint8_t* data, uint8_t length);
void writeM17Stream(const uint8_t* data, uint8_t length);
void writeM17EOT();
void writeM17Lost();
#if defined(SEND_RSSI_DATA)
void writeRSSIData(const uint8_t* data, uint8_t length);
#endif

11
Utils.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2015 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@ -31,6 +31,15 @@ uint8_t countBits8(uint8_t bits)
return BITS_TABLE[bits];
}
uint8_t countBits16(uint16_t bits)
{
uint8_t* p = (uint8_t*)&bits;
uint8_t n = 0U;
n += BITS_TABLE[p[0U]];
n += BITS_TABLE[p[1U]];
return n;
}
uint8_t countBits32(uint32_t bits)
{
uint8_t* p = (uint8_t*)&bits;

4
Utils.h
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@ -34,6 +34,8 @@
uint8_t countBits8(uint8_t bits);
uint8_t countBits16(uint16_t bits);
uint8_t countBits32(uint32_t bits);
uint8_t countBits64(uint64_t bits);

3
configs/D2RG_MMDVM_HS.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/MMDVM_HS_Dual_Hat-12mhz.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
#define USE_ALTERNATE_POCSAG_LEDS

3
configs/MMDVM_HS_Dual_Hat.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
#define USE_ALTERNATE_POCSAG_LEDS

3
configs/MMDVM_HS_Hat-12mhz.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
#define USE_ALTERNATE_POCSAG_LEDS

3
configs/MMDVM_HS_Hat.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
#define USE_ALTERNATE_POCSAG_LEDS

3
configs/NanoDV_NPI.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/NanoDV_USB.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/Nano_hotSPOT.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/ZUMspot_Libre.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/ZUMspot_RPi.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/ZUMspot_USB.h
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@ -94,6 +94,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/ZUMspot_dualband.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/ZUMspot_duplex.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/generic_duplex_gpio.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/generic_duplex_usb.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

3
configs/generic_gpio.h
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@ -95,6 +95,9 @@
// Use the YSF and P25 LEDs for NXDN
// #define USE_ALTERNATE_NXDN_LEDS
// Use the D-Star and P25 LEDs for M17
// #define USE_ALTERNATE_M17_LEDS
// Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS

7
version.h
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@ -1,5 +1,6 @@
/*
* Copyright (C) 2017,2018,2019,2020 by Andy Uribe CA6JAU
* Copyright (C) 2020,2021 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -23,9 +24,9 @@
#include "ADF7021.h"
#define VER_MAJOR "1"
#define VER_MINOR "5"
#define VER_REV "2"
#define VERSION_DATE "20201108"
#define VER_MINOR "6"
#define VER_REV "0"
#define VERSION_DATE "20210919"
#if defined(ZUMSPOT_ADF7021)
#define BOARD_INFO "ZUMspot"

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