From bfe158788688b6b9972e44c343b5e6ba09d953c3 Mon Sep 17 00:00:00 2001 From: Andy CA6JAU Date: Mon, 27 Mar 2017 14:02:53 -0300 Subject: [PATCH] Updating comments --- ADF7021.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/ADF7021.cpp b/ADF7021.cpp index 444820e..161e643 100644 --- a/ADF7021.cpp +++ b/ADF7021.cpp @@ -275,9 +275,9 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset) ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13 ADF7021_REG13 |= (uint32_t) ADF7021_SLICER_TH_DMR << 4; // slicer threshold - ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data + ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data (and RC alpha = 0.5) ADF7021_REG2 |= (uint32_t) (ADF7021_DEV_DMR / div2) << 19; // deviation - ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (4FSK) + ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) break; case STATE_YSF: @@ -298,9 +298,9 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset) ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13 ADF7021_REG13 |= (uint32_t) (m_LoDevYSF ? ADF7021_SLICER_TH_YSF_L : ADF7021_SLICER_TH_YSF_H) << 4; // slicer threshold - ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data + ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data (and RC alpha = 0.5) ADF7021_REG2 |= (uint32_t) ((m_LoDevYSF ? ADF7021_DEV_YSF_L : ADF7021_DEV_YSF_H) / div2) << 19; // deviation - ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (4FSK) + ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) break; case STATE_P25: @@ -321,9 +321,9 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset) ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13 ADF7021_REG13 |= (uint32_t) ADF7021_SLICER_TH_P25 << 4; // slicer threshold - ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data + ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data (and RC alpha = 0.5) ADF7021_REG2 |= (uint32_t) (ADF7021_DEV_P25 / div2) << 19; // deviation - ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (4FSK) + ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK) break; default: