Moving specific ADF7021 code to ADF7021.cpp

pull/10/head
Andy CA6JAU 9 years ago
parent 99eb2fa11a
commit b8aa455eac

@ -29,6 +29,11 @@
#include "ADF7021.h"
#include <math.h>
volatile bool totx_request = false;
volatile bool torx_request = false;
volatile bool even = true;
static uint32_t last_clk = 2;
volatile uint32_t AD7021_control_word;
uint32_t ADF7021_RX_REG0;
@ -162,9 +167,9 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
// Toggle CE pin for ADF7021 reset
if(reset) {
CE_pin(LOW);
delay_rx();
delay_reset();
CE_pin(HIGH);
delay_rx();
delay_reset();
}
// Check frequency band
@ -360,9 +365,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
Send_AD7021_control();
// Delay for coarse IF filter calibration
delay_rx();
delay_rx();
delay_rx();
delay_ifcal_coarse();
// Frequency RX (0)
setRX();
@ -400,6 +403,117 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
}
void CIO::interrupt()
{
uint8_t bit = 0;
if (!m_started)
return;
uint8_t clk = CLK_pin();
// this is to prevent activation by spurious interrupts
// which seem to happen if you send out an control word
// needs investigation
// this workaround will fail if only rising or falling edge
// is used to trigger the interrupt !!!!
// TODO: figure out why sending the control word seems to issue interrupts
// possibly this is a design problem of the RF7021 board or too long wires
// on the breadboard build
// but normally this will not hurt too much
if (clk == last_clk) {
return;
} else {
last_clk = clk;
}
// we set the TX bit at TXD low, sampling of ADF7021 happens at rising clock
if (m_tx && clk == 0) {
m_txBuffer.get(bit);
even = !even;
// use this for tracking issues
// P25_pin(even);
#if defined(BIDIR_DATA_PIN)
if(bit)
RXD_pin_write(HIGH);
else
RXD_pin_write(LOW);
#else
if(bit)
TXD_pin(HIGH);
else
TXD_pin(LOW);
#endif
// wait a brief period before raising SLE
if (totx_request == true) {
asm volatile("nop \n\t"
"nop \n\t"
"nop \n\t"
);
// SLE Pulse, should be moved out of here into class method
// according to datasheet in 4FSK we have to deliver this before 1/4 tbit == 26uS
SLE_pin(HIGH);
asm volatile("nop \n\t"
"nop \n\t"
"nop \n\t"
);
SLE_pin(LOW);
SDATA_pin(LOW);
// now do housekeeping
totx_request = false;
// first tranmittted bit is always the odd bit
even = false;
}
}
// we sample the RX bit at rising TXD clock edge, so TXD must be 1 and we are not in tx mode
if (!m_tx && clk == 1) {
if(RXD_pin())
bit = 1;
else
bit = 0;
m_rxBuffer.put(bit);
}
if (torx_request == true && even == false && m_tx && clk == 0) {
// that is absolutely crucial in 4FSK, see datasheet:
// enable sle after 1/4 tBit == 26uS when sending MSB (even == false) and clock is low
delay_us(26);
// SLE Pulse, should be moved out of here into class method
SLE_pin(HIGH);
asm volatile("nop \n\t"
"nop \n\t"
"nop \n\t"
);
SLE_pin(LOW);
SDATA_pin(LOW);
// now do housekeeping
m_tx = false;
torx_request = false;
//last tranmittted bit is always the even bit
// since the current bit is a transitional "don't care" bit, never transmitted
even = true;
}
m_watchdog++;
m_modeTimerCnt++;
if(m_scanPauseCnt >= SCAN_PAUSE)
m_scanPauseCnt = 0;
if(m_scanPauseCnt != 0)
m_scanPauseCnt++;
}
//======================================================================================================================
void CIO::setTX()
{
@ -416,6 +530,8 @@ void CIO::setTX()
Data_dir_out(true); // Data pin output mode
#endif
totx_request = true;
while(CLK_pin());
}
//======================================================================================================================
@ -432,7 +548,11 @@ void CIO::setRX(bool doSle)
#if defined(BIDIR_DATA_PIN)
Data_dir_out(false); // Data pin input mode
#endif
if(!doSle) {
torx_request = true;
while(torx_request) { asm volatile ("nop"); }
}
}
void CIO::setLoDevYSF(bool on)

133
IO.cpp

@ -21,20 +21,10 @@
#include "Globals.h"
#include "IO.h"
#if defined(ADF7021)
#include "ADF7021.h"
#endif
uint32_t m_frequency_rx;
uint32_t m_frequency_tx;
uint8_t m_power;
// TODO: move to IO class as members
volatile bool totx_request = false;
volatile bool torx_request = false;
volatile bool even = true;
static uint32_t last_clk = 2;
CIO::CIO():
m_started(false),
m_rxBuffer(RX_RINGBUFFER_SIZE),
@ -102,11 +92,8 @@ void CIO::process()
}
// Switch off the transmitter if needed
if (m_txBuffer.getData() == 0U && m_tx) {
if (m_txBuffer.getData() == 0U && m_tx)
setRX(false);
torx_request = true;
while(torx_request) { asm volatile ("nop"); }
}
if(m_modemState_prev == STATE_DSTAR)
scantime = SCAN_TIME;
@ -149,118 +136,6 @@ void CIO::process()
}
}
}
void CIO::interrupt()
{
uint8_t bit = 0;
if (!m_started)
return;
uint8_t clk = CLK_pin();
// this is to prevent activation by spurious interrupts
// which seem to happen if you send out an control word
// needs investigation
// this workaround will fail if only rising or falling edge
// is used to trigger the interrupt !!!!
// TODO: figure out why sending the control word seems to issue interrupts
// possibly this is a design problem of the RF7021 board or too long wires
// on the breadboard build
// but normally this will not hurt too much
if (clk == last_clk) {
return;
} else {
last_clk = clk;
}
// we set the TX bit at TXD low, sampling of ADF7021 happens at rising clock
if (m_tx && clk == 0) {
m_txBuffer.get(bit);
even = !even;
// use this for tracking issues
// P25_pin(even);
#if defined(BIDIR_DATA_PIN)
if(bit)
RXD_pin_write(HIGH);
else
RXD_pin_write(LOW);
#else
if(bit)
TXD_pin(HIGH);
else
TXD_pin(LOW);
#endif
// wait a brief period before raising SLE
if (totx_request == true) {
asm volatile("nop \n\t"
"nop \n\t"
"nop \n\t"
);
// SLE Pulse, should be moved out of here into class method
// according to datasheet in 4FSK we have to deliver this before 1/4 tbit == 26uS
SLE_pin(HIGH);
asm volatile("nop \n\t"
"nop \n\t"
"nop \n\t"
);
SLE_pin(LOW);
SDATA_pin(LOW);
// now do housekeeping
totx_request = false;
// first tranmittted bit is always the odd bit
even = false;
}
}
// we sample the RX bit at rising TXD clock edge, so TXD must be 1 and we are not in tx mode
if (!m_tx && clk == 1) {
if(RXD_pin())
bit = 1;
else
bit = 0;
m_rxBuffer.put(bit);
}
if (torx_request == true && even == false && m_tx && clk == 0) {
// that is absolutely crucial in 4FSK, see datasheet:
// enable sle after 1/4 tBit == 26uS when sending MSB (even == false) and clock is low
delay_us(26);
// SLE Pulse, should be moved out of here into class method
SLE_pin(HIGH);
asm volatile("nop \n\t"
"nop \n\t"
"nop \n\t"
);
SLE_pin(LOW);
SDATA_pin(LOW);
// now do housekeeping
m_tx = false;
torx_request = false;
//last tranmittted bit is always the even bit
// since the current bit is a transitional "don't care" bit, never transmitted
even = true;
}
m_watchdog++;
m_modeTimerCnt++;
if(m_scanPauseCnt >= SCAN_PAUSE)
m_scanPauseCnt = 0;
if(m_scanPauseCnt != 0)
m_scanPauseCnt++;
}
void CIO::start()
@ -302,7 +177,6 @@ void CIO::start()
startInt();
m_started = true;
}
void CIO::write(uint8_t* data, uint16_t length)
@ -316,13 +190,8 @@ void CIO::write(uint8_t* data, uint16_t length)
// Switch the transmitter on if needed
if (!m_tx) {
setTX();
totx_request = true;
// not sure if needed, would be better if handled in interrupt (like torx_request)
// or move into setTX()
while(CLK_pin());
m_tx = true;
}
}
uint16_t CIO::getSpace() const

@ -101,7 +101,8 @@ public:
// Misc functions
void dlybit(void);
void delay_rx(void);
void delay_ifcal_coarse(void);
void delay_reset(void);
void delay_us(uint32_t us);
private:

@ -116,12 +116,12 @@ extern "C" {
}
}
void CIO::delay_rx() {
#if defined (__STM32F1__)
delayMicroseconds(290);
#else
delayMicroseconds(150);
#endif
void CIO::delay_ifcal_coarse() {
delayMicroseconds(300);
}
void CIO::delay_reset() {
delayMicroseconds(300);
}
void CIO::Init()

@ -569,12 +569,12 @@ static inline void delay_us(uint32_t us) {
: "r0");
}
void CIO::delay_rx() {
#if defined(BIDIR_DATA_PIN)
delay_us(290);
#else
delay_us(340);
#endif
void CIO::delay_ifcal_coarse() {
delay_us(300);
}
void CIO::delay_reset() {
delay_us(300);
}
void CIO::delay_us(uint32_t us) {

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