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@ -1,8 +1,8 @@
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/*
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* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
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* Copyright (C) 2016,2017,2018,2019 by Andy Uribe CA6JAU
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* Copyright (C) 2017 by Danilo DB4PLE
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*
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* Copyright (C) 2017 by Danilo DB4PLE
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*
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* Some of the code is based on work of Guus Van Dooren PE1PLM:
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* https://github.com/ki6zum/gmsk-dstar/blob/master/firmware/dvmega/dvmega.ino
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*
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@ -216,6 +216,10 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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m_frequency_rx = m_pocsag_freq_tx;
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}
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#if defined (ZUMSPOT_ADF7021)
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io.checkBand(m_frequency_rx, m_frequency_tx);
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#endif
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// Toggle CE pin for ADF7021 reset
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if(reset) {
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CE_pin(LOW);
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@ -321,7 +325,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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case STATE_CWID:
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// CW ID base configuration: DMR
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// Dev: +1 symb (variable), symb rate = 4800
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ADF7021_REG3 = ADF7021_REG3_DMR;
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ADF7021_REG10 = ADF7021_REG10_DMR;
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@ -510,7 +514,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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// DEMOD (4)
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AD7021_control_word = ADF7021_REG4;
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Send_AD7021_control();
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// IF fine cal (6)
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AD7021_control_word = ADF7021_REG6;
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Send_AD7021_control();
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@ -518,7 +522,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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// IF coarse cal (5)
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AD7021_control_word = ADF7021_REG5;
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Send_AD7021_control();
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// Delay for filter calibration
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delay_IFcal();
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@ -528,7 +532,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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// MODULATION (2)
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ADF7021_REG2 |= (uint32_t) 0b0010; // register 2
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ADF7021_REG2 |= (uint32_t) m_power << 13; // power level
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ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA
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ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA
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AD7021_control_word = ADF7021_REG2;
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Send_AD7021_control();
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@ -569,7 +573,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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Send_AD7021_control();
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#if defined(TEST_TX)
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PTT_pin(HIGH);
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PTT_pin(HIGH);
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AD7021_control_word = ADF7021_TX_REG0;
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Send_AD7021_control();
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// TEST MODE (TX carrier only) (15)
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@ -751,7 +755,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
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// MODULATION (2)
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ADF7021_REG2 |= (uint32_t) 0b0010; // register 2
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ADF7021_REG2 |= (uint32_t) (m_power & 0x3F) << 13; // power level
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ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA
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ADF7021_REG2 |= (uint32_t) 0b110001 << 7; // PA
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AD7021_control_word = ADF7021_REG2;
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Send_AD7021_control2();
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@ -801,7 +805,7 @@ void CIO::interrupt()
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// is used to trigger the interrupt !!!!
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// TODO: figure out why sending the control word seems to issue interrupts
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// possibly this is a design problem of the RF7021 board or too long wires
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// on the breadboard build
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// on the breadboard build
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// but normally this will not hurt too much
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if (clk == last_clk) {
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return;
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@ -828,14 +832,14 @@ void CIO::interrupt()
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#endif
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// wait a brief period before raising SLE
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if (totx_request == true) {
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if (totx_request == true) {
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asm volatile("nop \n\t"
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"nop \n\t"
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"nop \n\t"
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);
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// SLE Pulse, should be moved out of here into class method
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// according to datasheet in 4FSK we have to deliver this before 1/4 tbit == 26uS
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// SLE Pulse, should be moved out of here into class method
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// according to datasheet in 4FSK we have to deliver this before 1/4 tbit == 26uS
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SLE_pin(HIGH);
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asm volatile("nop \n\t"
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"nop \n\t"
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@ -861,12 +865,12 @@ void CIO::interrupt()
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m_rxBuffer.put(bit, m_control);
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}
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if (torx_request == true && even == ADF7021_EVEN_BIT && m_tx && clk == 0U) {
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if (torx_request == true && even == ADF7021_EVEN_BIT && m_tx && clk == 0U) {
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// that is absolutely crucial in 4FSK, see datasheet:
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// enable sle after 1/4 tBit == 26uS when sending MSB (even == false) and clock is low
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// enable sle after 1/4 tBit == 26uS when sending MSB (even == false) and clock is low
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delay_us(26U);
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// SLE Pulse, should be moved out of here into class method
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// SLE Pulse, should be moved out of here into class method
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SLE_pin(HIGH);
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asm volatile("nop \n\t"
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"nop \n\t"
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@ -913,11 +917,11 @@ void CIO::interrupt2()
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#endif
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void CIO::setTX()
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{
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{
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// PTT pin on (doing it earlier helps to measure timing impact)
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PTT_pin(HIGH);
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PTT_pin(HIGH);
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// Send register 0 for TX operation, but do not activate yet.
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// Send register 0 for TX operation, but do not activate yet.
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// This is done in the interrupt at the correct time
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AD7021_control_word = ADF7021_TX_REG0;
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Send_AD7021_control(false);
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@ -931,15 +935,15 @@ void CIO::setTX()
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}
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void CIO::setRX(bool doSle)
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{
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{
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// PTT pin off (doing it earlier helps to measure timing impact)
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PTT_pin(LOW);
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// Send register 0 for RX operation, but do not activate yet.
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// Send register 0 for RX operation, but do not activate yet.
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// This is done in the interrupt at the correct time
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AD7021_control_word = ADF7021_RX_REG0;
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Send_AD7021_control(doSle);
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#if defined(BIDIR_DATA_PIN)
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Data_dir_out(false); // Data pin input mode
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#endif
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