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MMDVM_HS
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Merge branch 'master' into duplex

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pull/14/head
Andy CA6JAU 9 years ago
parent 6603ef3c21 afc6cb6c47
commit 041c776105
5 changed files with 120 additions and 79 deletions
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25
ADF7021.cpp
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@ -251,6 +251,10 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
ADF7021_TX_REG0 |= (uint32_t) N_divider << 19; // frequency;
ADF7021_TX_REG0 |= (uint32_t) F_divider << 4; // frequency;
#if defined(TEST_TX)
modemState = STATE_DSTAR;
#endif
switch (modemState) {
case STATE_DSTAR:
// Dev: 1200 Hz, symb rate = 4800
@ -377,8 +381,12 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
AD7021_control_word = ADF7021_REG2;
Send_AD7021_control();
// TEST MODE (disabled) (15)
AD7021_control_word = 0x000E000F;
// TEST DAC (14)
#if defined(TEST_DAC)
AD7021_control_word = 0x0000001E;
#else
AD7021_control_word = 0x0000000E;
#endif
Send_AD7021_control();
// AGC (auto, defaults) (9)
@ -400,7 +408,18 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
// 3FSK/4FSK DEMOD (13)
AD7021_control_word = ADF7021_REG13;
Send_AD7021_control();
#if defined(TEST_TX)
PTT_pin(HIGH);
AD7021_control_word = ADF7021_TX_REG0;
Send_AD7021_control();
// TEST MODE (TX carrier only) (15)
AD7021_control_word = 0x000E010F;
#else
// TEST MODE (disabled) (15)
AD7021_control_word = 0x000E000F;
#endif
Send_AD7021_control();
}
void CIO::interrupt()

94
ADF7021.h
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@ -34,6 +34,14 @@ http://www.analog.com/en/products/rf-microwave/integrated-transceivers-transmitt
www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
*/
/***** Test modes ****/
// Enable SWD pin to access the demodulator output signal
// See application note AN-852 and ADF7021 datasheet, page 60
// #define TEST_DAC
// Transmit the carrier frequency
// #define TEST_TX
/****** Support for 14.7456 MHz TCXO (modified RF7021SE boards) ******/
#if defined(ADF7021_14_7456)
@ -55,9 +63,15 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
// TX/RX CLOCK register (REG 03)
#define ADF7021_REG3_DSTAR 0x2A4C4193
#if defined(TEST_DAC)
#define ADF7021_REG3_DMR 0x2A4C04D3
#define ADF7021_REG3_YSF 0x2A4C04D3
#define ADF7021_REG3_P25 0x2A4C04D3
#else
#define ADF7021_REG3_DMR 0x2A4C80D3
#define ADF7021_REG3_YSF 0x2A4C80D3
#define ADF7021_REG3_P25 0x2A4C80D3
#endif
// Discriminator bandwith, demodulator (REG 04)
// Bug in ADI evaluation software, use datasheet formula (4FSK)
@ -69,7 +83,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
// Post demodulator bandwith (REG 04)
#define ADF7021_POST_BW_DSTAR 10U
#define ADF7021_POST_BW_DMR 65U
#define ADF7021_POST_BW_DMR 100U
#define ADF7021_POST_BW_YSF 20U
#define ADF7021_POST_BW_P25 6U
@ -104,76 +118,6 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define AFC_OFFSET_P25 0
#endif
/****** Support for 19.6800 MHz TCXO (original RF7021SE boards) ******/
#elif defined(ADF7021_19_6800)
// R = 4
#define ADF7021_PFD 4920000.0
// PLL (REG 01)
#define ADF7021_REG1_VHF1 0x021F5041
#define ADF7021_REG1_VHF2 0x021F5041
#define ADF7021_REG1_UHF1 0x00575041
#define ADF7021_REG1_UHF2 0x00535041
// Deviation of modulator (REG 02)
#define ADF7021_DEV_DSTAR 32U
#define ADF7021_DEV_DMR 17U
#define ADF7021_DEV_YSF_L 14U
#define ADF7021_DEV_YSF_H 27U
#define ADF7021_DEV_P25 16U
// TX/RX CLOCK register (REG 03)
#define ADF7021_REG3_DSTAR 0x2B1449E3
#define ADF7021_REG3_DMR 0x2B148123
#define ADF7021_REG3_YSF 0x2B148123
#define ADF7021_REG3_P25 0x2B148123
// Discriminator bandwith, demodulator (REG 04)
// Bug in ADI evaluation software, use datasheet formula (4FSK)
#define ADF7021_DISC_BW_DSTAR 597U // K=85
#define ADF7021_DISC_BW_DMR 393U // K=32
#define ADF7021_DISC_BW_YSF_L 394U // K=32
#define ADF7021_DISC_BW_YSF_H 344U // K=28
#define ADF7021_DISC_BW_P25 394U // K=32
// Post demodulator bandwith (REG 04)
#define ADF7021_POST_BW_DSTAR 10U
#define ADF7021_POST_BW_DMR 65U
#define ADF7021_POST_BW_YSF 20U
#define ADF7021_POST_BW_P25 6U
// IF filter (REG 05)
#define ADF7021_REG5 0x00003155
// IF CAL (coarse cal, defaults) (REG 06)
#define ADF7021_REG6 0x050972C6
// AFC (REG 10)
#define ADF7021_REG10_DSTAR 0x0C96355A
#if defined(ADF7021_ENABLE_4FSK_AFC)
#define ADF7021_REG10_DMR 0x01FE355A
#define ADF7021_REG10_YSF 0x01FE355A
#define ADF7021_REG10_P25 0x01FE355A
#if defined(ADF7021_AFC_POS)
#define AFC_OFFSET_DMR -250
#define AFC_OFFSET_YSF -250
#define AFC_OFFSET_P25 -250
#else
#define AFC_OFFSET_DMR 250
#define AFC_OFFSET_YSF 250
#define AFC_OFFSET_P25 250
#endif
#else
#define ADF7021_REG10_DMR 0x049E354A
#define ADF7021_REG10_YSF 0x049E354A
#define ADF7021_REG10_P25 0x049E354A
#define AFC_OFFSET_DMR 0
#define AFC_OFFSET_YSF 0
#define AFC_OFFSET_P25 0
#endif
/****** Support for 12.2880 MHz TCXO ******/
#elif defined(ADF7021_12_2880)
@ -195,9 +139,15 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
// TX/RX CLOCK register (REG 03)
#define ADF7021_REG3_DSTAR 0x29EC4153
#if defined(TEST_DAC)
#define ADF7021_REG3_DMR 0x29EC0493
#define ADF7021_REG3_YSF 0x29EC0493
#define ADF7021_REG3_P25 0x29EC0493
#else
#define ADF7021_REG3_DMR 0x29ECA093
#define ADF7021_REG3_YSF 0x29ECA093
#define ADF7021_REG3_P25 0x29ECA093
#endif
// Discriminator bandwith, demodulator (REG 04)
// Bug in ADI evaluation software, use datasheet formula (4FSK)
@ -209,7 +159,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
// Post demodulator bandwith (REG 04)
#define ADF7021_POST_BW_DSTAR 10U
#define ADF7021_POST_BW_DMR 65U
#define ADF7021_POST_BW_DMR 100U
#define ADF7021_POST_BW_YSF 20U
#define ADF7021_POST_BW_P25 6U

72
BUILD.txt
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@ -30,6 +30,17 @@ dtoverlay=pi3-disable-bt
- Reboot the RPi:
sudo reboot
* Enable serial port /dev/ttyAMA0 (Raspberry Pi 2 only):
- Edit /boot/cmdline.txt
sudo nano /boot/cmdline.txt
(remove the text: console=serial0,115200)
- Disable services:
sudo systemctl disable serial-getty@ttyAMA0.service
- Reboot the RPi:
sudo reboot
* Build de firmware and upload to ZUMSpot:
cd ~
- Install the necessary software tools:
@ -75,3 +86,64 @@ nano MMDVM.ini
- Execute MMDVMHost:
./MMDVMHost MMDVM.ini
2) ZUMSpot USB:
* Windows:
coming soon...
* Linux:
coming soon...
3) Makefile options:
make clean: delete all objects files *.o, for starting a new firmware building.
make: it builds a standard firmware (without USB bootloader support).
make bl: it builds a firmware with USB bootloader support.
make zumspot-pi: upload the firmware to a ZUMSpot Pi version (using internal RPi serial port)
make dfu [devser=/dev/ttyXXX]: upload firmware using USB bootloader. "devser" is optional,
and it corresponds to the USB serial port device name. This option permits to perform a reset
to enter to booloader mode (DFU). If you don't use "devser", you have to press the reset button
of the ZUMSpot just before using this command.
make serial devser=/dev/ttyXXX: upload standard firmware using serial port bootloader method.
make serial-bl devser=/dev/ttyXXX: upload firmware with USB bootloader support using serial
port bootloader method.
make stlink: upload standard firmware using ST-Link interface.
make stlink-bl: upload firmware with USB bootloader support using ST-Link interface.
make ocd: upload standard firmware using ST-Link interface. This method uses a local
openocd installation.
make ocd-bl: upload firmware with USB bootloader support using ST-Link interface. This
method uses a local openocd installation.
* Common Makefile commands:
- Serial programming (first programming, transfer the USB bootloader):
make clean
make bl
sudo make serial-bl devser=/dev/ttyUSB0
- USB programming (you have already transfered the USB bootloader):
make clean
make bl
sudo make dfu (reset ZUMSpot before) or
sudo make dfu devser=/dev/ttyACM0 (/dev/ttyACM0 is the device name of ZUMSpot USB under
Raspbian)
- ZUMSpot Pi (no USB support needed):
make clean
make
sudo make zumspot-pi
4) Config.h options:
coming soon...

2
Config.h
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@ -41,8 +41,6 @@
#define ADF7021_14_7456
// For 12.2880 MHz:
// #define ADF7021_12_2880
// Original 19.68 MHz, not working, only for experimentation:
// #define ADF7021_19_6800
// AFC is enabled by default in D-Star

6
DMRDMOTX.cpp
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@ -23,6 +23,8 @@
#include "Config.h"
#include "Globals.h"
const uint8_t DMR_SYNC = 0x5FU;
CDMRDMOTX::CDMRDMOTX() :
m_fifo(),
m_poBuffer(),
@ -43,7 +45,7 @@ void CDMRDMOTX::process()
m_delay = false;
for (unsigned int i = 0U; i < 72U; i++)
m_poBuffer[m_poLen++] = 0x00U;
m_poBuffer[m_poLen++] = DMR_SYNC;
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++)
m_poBuffer[i] = m_fifo.get();
@ -58,7 +60,7 @@ void CDMRDMOTX::process()
while (space > 8U) {
if (m_delay) {
m_poPtr++;
writeByte(0U);
writeByte(DMR_SYNC);
} else
writeByte(m_poBuffer[m_poPtr++]);

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