we need to recognise slot1 PC too

4 years ago · d5c4315dcb
parent 67e397c523
commit d5c4315dcb
1 changed files with 1 additions and 1 deletions
--- a/bridge_master.py
+++ b/bridge_master.py
@ -1967,7 +1967,7 @@ class routerHBP(HBSYSTEM):

        
        #Handle private calls (for reflectors)
-        if _call_type == 'unit' and _slot == 2 and not _data_call:
+        if _call_type == 'unit' and not _data_call:
            if (_stream_id != self.STATUS[_slot]['RX_STREAM_ID']):
                
                logger.info(_bits)