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444 lines
14 KiB
444 lines
14 KiB
/**
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* Digital Voice Modem - Host Software
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* GPLv2 Open Source. Use is subject to license terms.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* @package DVM / Host Software
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*
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*/
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//
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// Based on code from the MMDVMHost project. (https://github.com/g4klx/MMDVMHost)
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// Licensed under the GPLv2 License (https://opensource.org/licenses/GPL-2.0)
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//
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/*
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* Copyright (C) 2015,2016,2017 Jonathan Naylor, G4KLX
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* Copyright (C) 2017-2022 by Bryan Biedenkapp <gatekeep@jmp.cx>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "Defines.h"
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#include "dmr/Control.h"
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#include "dmr/acl/AccessControl.h"
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#include "dmr/lc/CSBK.h"
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#include "dmr/lc/csbk/CSBKFactory.h"
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#include "Log.h"
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using namespace dmr;
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#include <cstdio>
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#include <cassert>
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#include <algorithm>
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// ---------------------------------------------------------------------------
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// Public Class Members
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// ---------------------------------------------------------------------------
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/// <summary>
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/// Initializes a new instance of the Control class.
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/// </summary>
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/// <param name="authoritative">Flag indicating whether or not the DVM is grant authoritative.</param>
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/// <param name="colorCode">DMR access color code.</param>
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/// <param name="callHang">Amount of hangtime for a DMR call.</param>
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/// <param name="queueSize">Size of DMR data frame ring buffer.</param>
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/// <param name="embeddedLCOnly"></param>
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/// <param name="dumpTAData"></param>
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/// <param name="timeout">Transmit timeout.</param>
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/// <param name="tgHang">Amount of time to hang on the last talkgroup mode from RF.</param>
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/// <param name="modem">Instance of the Modem class.</param>
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/// <param name="network">Instance of the BaseNetwork class.</param>
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/// <param name="duplex">Flag indicating full-duplex operation.</param>
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/// <param name="ridLookup">Instance of the RadioIdLookup class.</param>
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/// <param name="tidLookup">Instance of the TalkgroupIdLookup class.</param>
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/// <param name="idenTable">Instance of the IdenTableLookup class.</param>
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/// <param name="rssiMapper">Instance of the RSSIInterpolator class.</param>
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/// <param name="jitter"></param>
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/// <param name="dumpDataPacket"></param>
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/// <param name="repeatDataPacket"></param>
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/// <param name="dumpCSBKData"></param>
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/// <param name="debug">Flag indicating whether DMR debug is enabled.</param>
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/// <param name="verbose">Flag indicating whether DMR verbose logging is enabled.</param>
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Control::Control(bool authoritative, uint32_t colorCode, uint32_t callHang, uint32_t queueSize, bool embeddedLCOnly,
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bool dumpTAData, uint32_t timeout, uint32_t tgHang, modem::Modem* modem, network::BaseNetwork* network, bool duplex,
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lookups::RadioIdLookup* ridLookup, lookups::TalkgroupIdLookup* tidLookup, lookups::IdenTableLookup* idenTable, lookups::RSSIInterpolator* rssiMapper,
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uint32_t jitter, bool dumpDataPacket, bool repeatDataPacket, bool dumpCSBKData, bool debug, bool verbose) :
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m_authoritative(authoritative),
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m_colorCode(colorCode),
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m_modem(modem),
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m_network(network),
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m_slot1(nullptr),
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m_slot2(nullptr),
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m_idenTable(idenTable),
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m_ridLookup(ridLookup),
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m_tidLookup(tidLookup),
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m_tsccSlotNo(0U),
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m_ccRunning(false),
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m_ccHalted(false),
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m_dumpCSBKData(dumpCSBKData),
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m_verbose(verbose),
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m_debug(debug)
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{
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assert(modem != nullptr);
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assert(ridLookup != nullptr);
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assert(tidLookup != nullptr);
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assert(idenTable != nullptr);
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assert(rssiMapper != nullptr);
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acl::AccessControl::init(m_ridLookup, m_tidLookup);
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Slot::init(this, authoritative, colorCode, SiteData(), embeddedLCOnly, dumpTAData, callHang, modem, network, duplex, m_ridLookup, m_tidLookup, m_idenTable, rssiMapper, jitter, verbose);
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m_slot1 = new Slot(1U, timeout, tgHang, queueSize, dumpDataPacket, repeatDataPacket, dumpCSBKData, debug, verbose);
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m_slot2 = new Slot(2U, timeout, tgHang, queueSize, dumpDataPacket, repeatDataPacket, dumpCSBKData, debug, verbose);
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}
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/// <summary>
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/// Finalizes a instance of the Control class.
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/// </summary>
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Control::~Control()
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{
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delete m_slot2;
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delete m_slot1;
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}
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/// <summary>
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/// Helper to set DMR configuration options.
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/// </summary>
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/// <param name="conf">Instance of the ConfigINI class.</param>
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/// <param name="voiceChNo">Voice Channel Number list.</param>
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/// <param name="voiceChData">Voice Channel data map.</param>
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/// <param name="netId">DMR Network ID.</param>
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/// <param name="siteId">DMR Site ID.</param>
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/// <param name="channelId">Channel ID.</param>
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/// <param name="channelNo">Channel Number.</param>
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/// <param name="printOptions"></param>
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void Control::setOptions(yaml::Node& conf, const std::vector<uint32_t> voiceChNo, const std::unordered_map<uint32_t, lookups::VoiceChData> voiceChData,
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uint32_t netId, uint8_t siteId, uint8_t channelId, uint32_t channelNo, bool printOptions)
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{
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yaml::Node systemConf = conf["system"];
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yaml::Node dmrProtocol = conf["protocols"]["dmr"];
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Slot::m_verifyReg = dmrProtocol["verifyReg"].as<bool>(false);
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uint8_t nRandWait = (uint8_t)dmrProtocol["nRandWait"].as<uint32_t>(dmr::DEFAULT_NRAND_WAIT);
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if (nRandWait > 15U)
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nRandWait = 15U;
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uint8_t backOff = (uint8_t)dmrProtocol["backOff"].as<uint32_t>(1U);
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if (backOff > 15U)
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backOff = 15U;
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yaml::Node control = dmrProtocol["control"];
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bool enableTSCC = control["enable"].as<bool>(false);
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bool dedicatedTSCC = false;
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if (enableTSCC) {
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dedicatedTSCC = control["dedicated"].as<bool>(false);
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}
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else {
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dedicatedTSCC = false;
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}
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Slot::setSiteData(voiceChNo, voiceChData, netId, siteId, channelId, channelNo, dedicatedTSCC);
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Slot::setAlohaConfig(nRandWait, backOff);
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m_tsccSlotNo = (uint8_t)control["slot"].as<uint32_t>(0U);
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switch (m_tsccSlotNo) {
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case 1U:
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m_slot1->setTSCC(enableTSCC, dedicatedTSCC);
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break;
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case 2U:
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m_slot2->setTSCC(enableTSCC, dedicatedTSCC);
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break;
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default:
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LogError(LOG_DMR, "DMR, invalid slot, TSCC disabled, slotNo = %u", m_tsccSlotNo);
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break;
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}
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uint32_t silenceThreshold = dmrProtocol["silenceThreshold"].as<uint32_t>(dmr::DEFAULT_SILENCE_THRESHOLD);
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if (silenceThreshold > MAX_DMR_VOICE_ERRORS) {
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LogWarning(LOG_DMR, "Silence threshold > %u, defaulting to %u", dmr::MAX_DMR_VOICE_ERRORS, dmr::DEFAULT_SILENCE_THRESHOLD);
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silenceThreshold = dmr::DEFAULT_SILENCE_THRESHOLD;
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}
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m_slot1->setSilenceThreshold(silenceThreshold);
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m_slot2->setSilenceThreshold(silenceThreshold);
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if (printOptions) {
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LogInfo(" TSCC Slot: %u", m_tsccSlotNo);
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if (enableTSCC) {
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LogInfo(" TSCC Aloha Random Access Wait: %u", nRandWait);
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LogInfo(" TSCC Aloha Backoff: %u", backOff);
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}
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LogInfo(" Silence Threshold: %u (%.1f%%)", silenceThreshold, float(silenceThreshold) / 1.41F);
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LogInfo(" Verify Registration: %s", Slot::m_verifyReg ? "yes" : "no");
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}
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}
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/// <summary>
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/// Sets a flag indicating whether the DMR control channel is running.
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/// </summary>
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/// <param name="ccRunning"></param>
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void Control::setCCRunning(bool ccRunning)
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{
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m_ccRunning = ccRunning;
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switch (m_tsccSlotNo) {
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case 1U:
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m_slot1->setCCRunning(ccRunning);
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break;
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case 2U:
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m_slot2->setCCRunning(ccRunning);
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break;
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default:
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LogError(LOG_NET, "DMR, invalid slot, TSCC disabled, slotNo = %u", m_tsccSlotNo);
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break;
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}
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}
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/// <summary>
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/// Sets a flag indicating whether the DMR control channel is halted.
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/// </summary>
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/// <param name="ccHalted"></param>
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void Control::setCCHalted(bool ccHalted)
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{
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m_ccHalted = ccHalted;
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switch (m_tsccSlotNo) {
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case 1U:
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m_slot1->setCCHalted(ccHalted);
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break;
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case 2U:
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m_slot2->setCCHalted(ccHalted);
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break;
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default:
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LogError(LOG_NET, "DMR, invalid slot, TSCC disabled, slotNo = %u", m_tsccSlotNo);
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break;
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}
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}
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/// <summary>
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/// Helper to process wakeup frames from the RF interface.
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/// </summary>
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/// <param name="data">DMR wakeup frame data.</param>
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/// <returns>True, if wakeup frames were processed, otherwise false.</returns>
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bool Control::processWakeup(const uint8_t* data)
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{
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assert(data != nullptr);
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// wakeups always come in on slot 1
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if (data[0U] != modem::TAG_DATA || data[1U] != (DMR_IDLE_RX | DMR_SYNC_DATA | DT_CSBK))
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return false;
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// generate a new CSBK and check validity
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std::unique_ptr<lc::CSBK> csbk = lc::csbk::CSBKFactory::createCSBK(data + 2U);
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if (csbk == nullptr)
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return false;
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uint8_t csbko = csbk->getCSBKO();
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if (csbko != CSBKO_BSDWNACT)
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return false;
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uint32_t srcId = csbk->getSrcId();
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// check the srcId against the ACL control
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bool ret = acl::AccessControl::validateSrcId(srcId);
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if (!ret) {
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LogError(LOG_RF, "DMR, invalid CSBKO_BSDWNACT, srcId = %u", srcId);
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return false;
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}
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if (m_verbose) {
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LogMessage(LOG_RF, "DMR, CSBKO_BSDWNACT, srcId = %u", srcId);
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}
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return true;
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}
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/// <summary>
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/// Process a data frame for slot, from the RF interface.
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/// </summary>
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/// <param name="data">DMR data frame buffer.</param>
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/// <param name="len">Length of data frame buffer.</param>
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/// <returns>True, if data frame was processed, otherwise false.</returns>
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bool Control::processFrame(uint32_t slotNo, uint8_t *data, uint32_t len)
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{
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assert(data != nullptr);
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switch (slotNo) {
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case 1U:
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return m_slot1->processFrame(data, len);
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case 2U:
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return m_slot2->processFrame(data, len);
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default:
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LogError(LOG_NET, "DMR, invalid slot, slotNo = %u", slotNo);
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return false;
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}
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}
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/// <summary>
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/// Get a data frame for slot, from data ring buffer.
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/// </summary>
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/// <param name="data">Buffer to put retrieved DMR data frame data.</param>
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/// <returns>Length of data retrieved from DMR ring buffer.</returns>
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uint32_t Control::getFrame(uint32_t slotNo, uint8_t* data)
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{
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assert(data != nullptr);
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switch (slotNo) {
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case 1U:
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return m_slot1->getFrame(data);
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case 2U:
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return m_slot2->getFrame(data);
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default:
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LogError(LOG_NET, "DMR, invalid slot, slotNo = %u", slotNo);
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return 0U;
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}
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}
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/// <summary>
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/// Updates the processor.
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/// </summary>
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void Control::clock()
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{
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if (m_network != nullptr) {
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data::Data data;
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bool ret = m_network->readDMR(data);
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if (ret) {
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uint32_t slotNo = data.getSlotNo();
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switch (slotNo) {
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case 1U:
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m_slot1->processNetwork(data);
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break;
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case 2U:
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m_slot2->processNetwork(data);
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break;
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default:
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LogError(LOG_NET, "DMR, invalid slot, slotNo = %u", slotNo);
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break;
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}
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}
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}
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m_slot1->clock();
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m_slot2->clock();
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}
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/// <summary>
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/// Permits a TGID on a non-authoritative host.
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/// </summary>
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/// <param name="dstId"></param>
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/// <paran name="slot"></param>
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void Control::permittedTG(uint32_t dstId, uint8_t slot)
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{
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switch (slot) {
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case 1U:
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m_slot1->permittedTG(dstId);
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break;
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case 2U:
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m_slot2->permittedTG(dstId);
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break;
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default:
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LogError(LOG_NET, "DMR, invalid slot, slotNo = %u", slot);
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break;
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}
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}
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/// <summary>
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/// Helper to return the slot carrying the TSCC.
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/// </summary>
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/// <returns>Pointer to the TSCC slot instance.</returns>
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Slot* Control::getTSCCSlot() const
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{
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switch (m_tsccSlotNo) {
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case 1U:
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return m_slot1;
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break;
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case 2U:
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return m_slot2;
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break;
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default:
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LogError(LOG_NET, "DMR, invalid slot, TSCC disabled, slotNo = %u", m_tsccSlotNo);
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return nullptr;
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}
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}
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/// <summary>
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/// Helper to write a DMR extended function packet on the RF interface.
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/// </summary>
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/// <param name="slotNo">DMR slot number.</param>
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/// <param name="func">Extended function opcode.</param>
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/// <param name="arg">Extended function argument.</param>
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/// <param name="dstId">Destination radio ID.</param>
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void Control::writeRF_Ext_Func(uint32_t slotNo, uint32_t func, uint32_t arg, uint32_t dstId)
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{
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switch (slotNo) {
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case 1U:
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m_slot1->control()->writeRF_Ext_Func(func, arg, dstId);
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break;
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case 2U:
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m_slot2->control()->writeRF_Ext_Func(func, arg, dstId);
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break;
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default:
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LogError(LOG_NET, "DMR, invalid slot, slotNo = %u", slotNo);
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break;
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}
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}
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/// <summary>
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/// Helper to write a DMR call alert packet on the RF interface.
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/// </summary>
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/// <param name="slotNo">DMR slot number.</param>
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/// <param name="srcId">Source radio ID.</param>
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/// <param name="dstId">Destination radio ID.</param>
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void Control::writeRF_Call_Alrt(uint32_t slotNo, uint32_t srcId, uint32_t dstId)
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{
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switch (slotNo) {
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case 1U:
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m_slot1->control()->writeRF_Call_Alrt(srcId, dstId);
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break;
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case 2U:
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m_slot2->control()->writeRF_Call_Alrt(srcId, dstId);
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break;
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default:
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LogError(LOG_NET, "DMR, invalid slot, slotNo = %u", slotNo);
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break;
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}
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}
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/// <summary>
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/// Flag indicating whether the processor or is busy or not.
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/// </summary>
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/// <returns>True, if processor is busy, otherwise false.</returns>
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bool Control::isBusy() const
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{
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return (m_slot1->m_rfState != RS_RF_LISTENING || m_slot1->m_netState != RS_NET_IDLE) &&
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(m_slot2->m_rfState != RS_RF_LISTENING || m_slot2->m_netState != RS_NET_IDLE);
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}
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/// <summary>
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/// Helper to change the debug and verbose state.
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/// </summary>
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/// <param name="debug">Flag indicating whether DMR debug is enabled.</param>
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/// <param name="verbose">Flag indicating whether DMR verbose logging is enabled.</param>
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void Control::setDebugVerbose(bool debug, bool verbose)
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{
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m_debug = debug;
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m_verbose = verbose;
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m_slot1->setDebugVerbose(debug, verbose);
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m_slot2->setDebugVerbose(debug, verbose);
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}
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/// <summary>
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/// Helper to change the CSBK verbose state.
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/// </summary>
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/// <param name="verbose">Flag indicating whether CSBK dumping is enabled.</param>
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void Control::setCSBKVerbose(bool verbose)
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{
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m_dumpCSBKData = verbose;
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lc::CSBK::setVerbose(verbose);
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}
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