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dvmfirmware-hs
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remove P25_LF_CAL mode;

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usb-support 2022-10-30
Bryan Biedenkapp 3 years ago
parent 95d2dcdcbf
commit 15937b3186
6 changed files with 11 additions and 37 deletions
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8
ADF7021.cpp
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@ -1018,7 +1018,7 @@ void IO::configureTxRx(DVM_STATE modemState)
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_PA_DEF << 7; // PA Enable & PA Bias
ADF7021_REG2 |= (uint32_t)(m_rfPower & 0x3FU) << 13; // PA Level (0 - Off, 63 - 13 dBm)
ADF7021_REG2 |= (uint32_t)(m_cwIdTXLevel / div2) << 19; // Freq. Deviation
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_DATA << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_CLKDAT << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_RC_5 << 30; // R-Cosine Alpha
}
break;
@ -1097,7 +1097,7 @@ void IO::configureTxRx(DVM_STATE modemState)
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_PA_DEF << 7; // PA Enable & PA Bias
ADF7021_REG2 |= (uint32_t)(m_rfPower & 0x3FU) << 13; // PA Level (0 - Off, 63 - 13 dBm)
ADF7021_REG2 |= (uint32_t)(dmrDev / div2) << 19; // Freq. Deviation
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_DATA << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_CLKDAT << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_RC_5 << 30; // R-Cosine Alpha
}
break;
@ -1176,7 +1176,7 @@ void IO::configureTxRx(DVM_STATE modemState)
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_PA_DEF << 7; // PA Enable & PA Bias
ADF7021_REG2 |= (uint32_t)(m_rfPower & 0x3FU) << 13; // PA Level (0 - Off, 63 - 13 dBm)
ADF7021_REG2 |= (uint32_t)(p25Dev / div2) << 19; // Freq. Deviation
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_DATA << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_CLKDAT << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_RC_5 << 30; // R-Cosine Alpha
}
break;
@ -1267,7 +1267,7 @@ void IO::configureTxRx(DVM_STATE modemState)
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_PA_DEF << 7; // PA Enable & PA Bias
ADF7021_REG2 |= (uint32_t)(m_rfPower & 0x3FU) << 13; // PA Level (0 - Off, 63 - 13 dBm)
ADF7021_REG2 |= (uint32_t)(nxdnDev / div2) << 19; // Freq. Deviation
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_DATA << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_INV_CLKDAT << 28; // Clock/Data Inversion
ADF7021_REG2 |= (uint32_t)ADF7021_REG2_RC_5 << 30; // R-Cosine Alpha
}
break;

2
FirmwareMain.cpp
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@ -135,7 +135,7 @@ void loop()
m_modemState == STATE_INT_CAL)
calDMR.process();
if (m_modemState == STATE_P25_CAL_1K || m_modemState == STATE_P25_LF_CAL || m_modemState == STATE_P25_CAL)
if (m_modemState == STATE_P25_CAL_1K || m_modemState == STATE_P25_CAL)
calP25.process();
if (m_modemState == STATE_NXDN_CAL)

19
SerialPort.cpp
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@ -201,7 +201,7 @@ void SerialPort::process()
if (m_modemState == STATE_DMR_DMO_CAL_1K || m_modemState == STATE_DMR_CAL_1K ||
m_modemState == STATE_DMR_LF_CAL || m_modemState == STATE_DMR_CAL)
err = calDMR.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_P25_CAL_1K || m_modemState == STATE_P25_LF_CAL || m_modemState == STATE_P25_CAL)
if (m_modemState == STATE_P25_CAL_1K || m_modemState == STATE_P25_CAL)
err = calP25.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_NXDN_CAL)
err = calNXDN.write(m_buffer + 3U, m_len - 3U);
@ -429,7 +429,7 @@ bool SerialPort::isCalState(DVM_STATE state)
// calibration mode check
if (state == STATE_P25_CAL_1K ||
state == STATE_DMR_DMO_CAL_1K || state == STATE_DMR_CAL_1K ||
state == STATE_DMR_LF_CAL || state == STATE_P25_LF_CAL ||
state == STATE_DMR_LF_CAL ||
state == STATE_RSSI_CAL ||
state == STATE_P25_CAL || state == STATE_DMR_CAL || state == STATE_NXDN_CAL ||
state == STATE_INT_CAL) {
@ -451,7 +451,7 @@ DVM_STATE SerialPort::calRelativeState(DVM_STATE state)
state == STATE_DMR_LF_CAL || state == STATE_DMR_CAL ||
state == STATE_RSSI_CAL || state == STATE_INT_CAL) {
return STATE_DMR;
} else if (state == STATE_P25_CAL_1K || state == STATE_P25_LF_CAL ||
} else if (state == STATE_P25_CAL_1K ||
state == STATE_P25_CAL) {
return STATE_P25;
} else if (state == STATE_NXDN_CAL) {
@ -994,7 +994,7 @@ uint8_t SerialPort::modemStateCheck(DVM_STATE state)
if (state != STATE_IDLE && state != STATE_DMR && state != STATE_P25 && state != STATE_NXDN &&
state != STATE_P25_CAL_1K &&
state != STATE_DMR_DMO_CAL_1K && state != STATE_DMR_CAL_1K &&
state != STATE_DMR_LF_CAL && state != STATE_P25_LF_CAL &&
state != STATE_DMR_LF_CAL &&
state != STATE_RSSI_CAL &&
state != STATE_P25_CAL && state != STATE_DMR_CAL &&
state != STATE_NXDN_CAL)
@ -1200,17 +1200,6 @@ void SerialPort::setMode(DVM_STATE modemState)
#if defined(DUPLEX)
dmrIdleRX.reset();
dmrRX.reset();
#endif
dmrDMORX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break;
case STATE_P25_LF_CAL:
DEBUG1("SerialPort: setMode(): mode set to P25 80Hz Calibrate");
#if defined(DUPLEX)
dmrIdleRX.reset();
dmrRX.reset();
#endif
dmrDMORX.reset();
p25RX.reset();

2
SerialPort.h
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@ -54,7 +54,7 @@ enum DVM_STATE {
// Calibration States
STATE_INT_CAL = 90U,
STATE_P25_LF_CAL = 91U,
STATE_P25_CAL_1K = 92U,
STATE_DMR_DMO_CAL_1K = 93U,

2
p25/CalP25.cpp
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@ -85,7 +85,7 @@ CalP25::CalP25() :
/// </summary>
void CalP25::process()
{
if (m_modemState == STATE_P25_CAL || m_modemState == STATE_P25_LF_CAL) {
if (m_modemState == STATE_P25_CAL) {
m_state = P25CAL1K_IDLE;
if (m_transmit) {

15
p25/P25TX.cpp
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@ -236,21 +236,6 @@ void P25TX::createCal()
m_poLen = P25_LDU_FRAME_LENGTH_BYTES;
}
// 80 Hz square wave generation
if (m_modemState == STATE_P25_LF_CAL) {
for (unsigned int i = 0U; i < 108U; i++) {
m_poBuffer[i] = 0x55U; // +3, +3, ... pattern
}
m_poBuffer[109U] = 0x5FU; // +3, +3, -3, -3 pattern
for (unsigned int i = 110U; i < 216U; i++) {
m_poBuffer[i] = 0xFFU; // -3, -3, ... pattern
}
m_poLen = P25_LDU_FRAME_LENGTH_BYTES;
}
m_poLen = P25_LDU_FRAME_LENGTH_BYTES;
m_poPtr = 0U;
}

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